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/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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/*++
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Copyright (c) Realtek Semiconductor Corp. All rights reserved.
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Module Name:
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HalPwrSeqCmd.c
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Abstract:
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Implement HW Power sequence configuration CMD handling routine for Realtek devices.
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Major Change History:
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When Who What
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---------- --------------- -------------------------------
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2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
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2011-07-07 Roger Create.
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--*/
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#include <HalPwrSeqCmd.h>
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/*
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* Description:
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* This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
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*
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* Assumption:
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* We should follow specific format which was released from HW SD.
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*
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* 2011.07.07, added by Roger.
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* */
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u8 HalPwrSeqCmdParsing(
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PADAPTER padapter,
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u8 CutVersion,
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u8 FabVersion,
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u8 InterfaceType,
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WLAN_PWR_CFG PwrSeqCmd[])
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{
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WLAN_PWR_CFG PwrCfgCmd = {0};
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u8 bPollingBit = _FALSE;
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u8 bHWICSupport = _FALSE;
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u32 AryIdx = 0;
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u8 value = 0;
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u32 offset = 0;
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u8 flag = 0;
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u32 pollingCount = 0; /* polling autoload done. */
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u32 maxPollingCnt = 5000;
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do {
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PwrCfgCmd = PwrSeqCmd[AryIdx];
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/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
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if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
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(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
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(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
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switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
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case PWR_CMD_READ:
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break;
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case PWR_CMD_WRITE:
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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#ifdef CONFIG_SDIO_HCI
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/* */
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/* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
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/* 2011.07.07. */
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/* */
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
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/* Read Back SDIO Local value */
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value = SdioLocalCmd52Read1Byte(padapter, offset);
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value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
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value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
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/* Write Back SDIO Local value */
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SdioLocalCmd52Write1Byte(padapter, offset, value);
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} else
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#endif
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{
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#ifdef CONFIG_GSPI_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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offset = SPI_LOCAL_OFFSET | offset;
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#endif
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/* Read the value from system register */
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value = rtw_read8(padapter, offset);
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value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
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value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
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/* Write the value back to sytem register */
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rtw_write8(padapter, offset, value);
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}
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break;
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case PWR_CMD_POLLING:
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bPollingBit = _FALSE;
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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rtw_hal_get_hwreg(padapter, HW_VAR_PWR_CMD, &bHWICSupport);
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if (bHWICSupport && offset == 0x06) {
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flag = 0;
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maxPollingCnt = 100000;
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} else
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maxPollingCnt = 5000;
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#ifdef CONFIG_GSPI_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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offset = SPI_LOCAL_OFFSET | offset;
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#endif
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do {
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#ifdef CONFIG_SDIO_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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value = SdioLocalCmd52Read1Byte(padapter, offset);
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else
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#endif
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value = rtw_read8(padapter, offset);
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value = value & GET_PWR_CFG_MASK(PwrCfgCmd);
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if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
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bPollingBit = _TRUE;
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else
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rtw_udelay_os(10);
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if (pollingCount++ > maxPollingCnt) {
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RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
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/* For PCIE + USB package poll power bit timeout issue only modify 8821AE and 8723BE */
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if (bHWICSupport && offset == 0x06 && flag == 0) {
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RTW_ERR("[WARNING] PCIE polling(0x%X) timeout(%d), Toggle 0x04[3] and try again.\n", offset, maxPollingCnt);
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if (IS_HARDWARE_TYPE_8723DE(padapter))
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PlatformEFIOWrite1Byte(padapter, 0x40, (PlatformEFIORead1Byte(padapter, 0x40)) & (~BIT3));
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PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) | BIT3);
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PlatformEFIOWrite1Byte(padapter, 0x04, PlatformEFIORead1Byte(padapter, 0x04) & ~BIT3);
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if (IS_HARDWARE_TYPE_8723DE(padapter))
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PlatformEFIOWrite1Byte(padapter, 0x40, PlatformEFIORead1Byte(padapter, 0x40)|BIT3);
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/* Retry Polling Process one more time */
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pollingCount = 0;
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flag = 1;
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} else {
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return _FALSE;
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}
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}
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} while (!bPollingBit);
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break;
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case PWR_CMD_DELAY:
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if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
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rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
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else
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rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000);
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break;
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case PWR_CMD_END:
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/* When this command is parsed, end the process */
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return _TRUE;
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break;
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default:
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break;
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}
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}
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AryIdx++;/* Add Array Index */
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} while (1);
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return _TRUE;
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}
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,279 @@
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/******************************************************************************
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*
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* Copyright(c) 2016 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#include <hal_btcoex_wifionly.h>
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#if (CONFIG_BTCOEX_SUPPORT_WIFI_ONLY_CFG == 1)
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#include "btc/mp_precomp.h"
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struct wifi_only_cfg GLBtCoexistWifiOnly;
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void halwifionly_write1byte(void *pwifionlyContext, u32 RegAddr, u8 Data)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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rtw_write8(Adapter, RegAddr, Data);
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}
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void halwifionly_write2byte(void *pwifionlyContext, u32 RegAddr, u16 Data)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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rtw_write16(Adapter, RegAddr, Data);
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}
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void halwifionly_write4byte(void *pwifionlyContext, u32 RegAddr, u32 Data)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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rtw_write32(Adapter, RegAddr, Data);
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}
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u8 halwifionly_read1byte(void *pwifionlyContext, u32 RegAddr)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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return rtw_read8(Adapter, RegAddr);
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}
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u16 halwifionly_read2byte(void * pwifionlyContext, u32 RegAddr)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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return rtw_read16(Adapter, RegAddr);
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}
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u32 halwifionly_read4byte(void *pwifionlyContext, u32 RegAddr)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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return rtw_read32(Adapter, RegAddr);
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}
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void halwifionly_bitmaskwrite1byte(void *pwifionlyContext, u32 regAddr, u8 bitMask, u8 data)
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{
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u8 originalValue, bitShift = 0;
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u8 i;
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|
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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if (bitMask != 0xff) {
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originalValue = rtw_read8(Adapter, regAddr);
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|
for (i = 0; i <= 7; i++) {
|
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if ((bitMask >> i) & 0x1)
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break;
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}
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bitShift = i;
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data = ((originalValue) & (~bitMask)) | (((data << bitShift)) & bitMask);
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|
}
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rtw_write8(Adapter, regAddr, data);
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}
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void halwifionly_phy_set_rf_reg(void *pwifionlyContext, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
|
||||||
|
PADAPTER Adapter = pwifionlycfg->Adapter;
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phy_set_rf_reg(Adapter, eRFPath, RegAddr, BitMask, Data);
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}
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void halwifionly_phy_set_bb_reg(void *pwifionlyContext, u32 RegAddr, u32 BitMask, u32 Data)
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{
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struct wifi_only_cfg *pwifionlycfg = (struct wifi_only_cfg *)pwifionlyContext;
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PADAPTER Adapter = pwifionlycfg->Adapter;
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phy_set_bb_reg(Adapter, RegAddr, BitMask, Data);
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}
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void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter)
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{
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|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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|
u8 is_5g = _FALSE;
|
||||||
|
|
||||||
|
if (pHalData->current_band_type == BAND_ON_5G)
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||||||
|
is_5g = _TRUE;
|
||||||
|
|
||||||
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if (IS_HARDWARE_TYPE_8822B(padapter)) {
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#ifdef CONFIG_RTL8822B
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ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
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|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
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#ifdef CONFIG_RTL8821C
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||||||
|
else if (IS_HARDWARE_TYPE_8821C(padapter))
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||||||
|
ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
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#endif
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||||||
|
|
||||||
|
#ifdef CONFIG_RTL8822C
|
||||||
|
else if (IS_HARDWARE_TYPE_8822C(padapter))
|
||||||
|
ex_hal8822c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
|
#endif
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||||||
|
|
||||||
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#ifdef CONFIG_RTL8814B
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||||||
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else if (IS_HARDWARE_TYPE_8814B(padapter))
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||||||
|
ex_hal8814b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
|
#endif
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||||||
|
|
||||||
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#ifdef CONFIG_RTL8723F
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||||||
|
else if (IS_HARDWARE_TYPE_8723F(padapter))
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||||||
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ex_hal8723f_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
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#endif
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||||||
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}
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||||||
|
|
||||||
|
void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
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||||||
|
{
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||||||
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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||||||
|
u8 is_5g = _FALSE;
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||||||
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|
||||||
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if (pHalData->current_band_type == BAND_ON_5G)
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||||||
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is_5g = _TRUE;
|
||||||
|
|
||||||
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if (IS_HARDWARE_TYPE_8822B(padapter)) {
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||||||
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#ifdef CONFIG_RTL8822B
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||||||
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ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
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#endif
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||||||
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}
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||||||
|
|
||||||
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#ifdef CONFIG_RTL8821C
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||||||
|
else if (IS_HARDWARE_TYPE_8821C(padapter))
|
||||||
|
ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8822C
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||||||
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else if (IS_HARDWARE_TYPE_8822C(padapter))
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||||||
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ex_hal8822c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
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||||||
|
#endif
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||||||
|
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||||||
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#ifdef CONFIG_RTL8814B
|
||||||
|
else if (IS_HARDWARE_TYPE_8814B(padapter))
|
||||||
|
ex_hal8814b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
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void hal_btcoex_wifionly_connect_notify(PADAPTER padapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||||
|
u8 is_5g = _FALSE;
|
||||||
|
|
||||||
|
if (pHalData->current_band_type == BAND_ON_5G)
|
||||||
|
is_5g = _TRUE;
|
||||||
|
|
||||||
|
if (IS_HARDWARE_TYPE_8822B(padapter)) {
|
||||||
|
#ifdef CONFIG_RTL8822B
|
||||||
|
ex_hal8822b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8821C
|
||||||
|
else if (IS_HARDWARE_TYPE_8821C(padapter))
|
||||||
|
ex_hal8821c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8822C
|
||||||
|
else if (IS_HARDWARE_TYPE_8822C(padapter))
|
||||||
|
ex_hal8822c_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8814B
|
||||||
|
else if (IS_HARDWARE_TYPE_8814B(padapter))
|
||||||
|
ex_hal8814b_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8723F
|
||||||
|
else if (IS_HARDWARE_TYPE_8723F(padapter))
|
||||||
|
ex_hal8723f_wifi_only_connectnotify(&GLBtCoexistWifiOnly, is_5g);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
|
||||||
|
{
|
||||||
|
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
|
||||||
|
|
||||||
|
if (IS_HARDWARE_TYPE_8723B(padapter)) {
|
||||||
|
#ifdef CONFIG_RTL8723B
|
||||||
|
ex_hal8723b_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8822B
|
||||||
|
else if (IS_HARDWARE_TYPE_8822B(padapter))
|
||||||
|
ex_hal8822b_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8821C
|
||||||
|
else if (IS_HARDWARE_TYPE_8821C(padapter))
|
||||||
|
ex_hal8821c_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8822C
|
||||||
|
else if (IS_HARDWARE_TYPE_8822C(padapter))
|
||||||
|
ex_hal8822c_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8814B
|
||||||
|
else if (IS_HARDWARE_TYPE_8814B(padapter))
|
||||||
|
ex_hal8814b_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTL8723F
|
||||||
|
else if (IS_HARDWARE_TYPE_8723F(padapter))
|
||||||
|
ex_hal8723f_wifi_only_hw_config(pwifionlycfg);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)
|
||||||
|
{
|
||||||
|
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
|
||||||
|
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
|
||||||
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||||
|
|
||||||
|
_rtw_memset(&GLBtCoexistWifiOnly, 0, sizeof(GLBtCoexistWifiOnly));
|
||||||
|
|
||||||
|
pwifionlycfg->Adapter = padapter;
|
||||||
|
|
||||||
|
#ifdef CONFIG_PCI_HCI
|
||||||
|
pwifionlycfg->chip_interface = WIFIONLY_INTF_PCI;
|
||||||
|
#elif defined(CONFIG_USB_HCI)
|
||||||
|
pwifionlycfg->chip_interface = WIFIONLY_INTF_USB;
|
||||||
|
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||||
|
pwifionlycfg->chip_interface = WIFIONLY_INTF_SDIO;
|
||||||
|
#else
|
||||||
|
pwifionlycfg->chip_interface = WIFIONLY_INTF_UNKNOWN;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
pwifionly_haldata->customer_id = CUSTOMER_NORMAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
void hal_btcoex_wifionly_AntInfoSetting(PADAPTER padapter)
|
||||||
|
{
|
||||||
|
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
|
||||||
|
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
|
||||||
|
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||||
|
|
||||||
|
pwifionly_haldata->efuse_pg_antnum = pHalData->EEPROMBluetoothAntNum;
|
||||||
|
pwifionly_haldata->efuse_pg_antpath = pHalData->ant_path;
|
||||||
|
pwifionly_haldata->rfe_type = pHalData->rfe_type;
|
||||||
|
pwifionly_haldata->ant_div_cfg = pHalData->AntDivCfg;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,142 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2007 - 2017 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#ifndef __COMMON_C2H_H__
|
||||||
|
#define __COMMON_C2H_H__
|
||||||
|
|
||||||
|
#define C2H_TYPE_REG 0
|
||||||
|
#define C2H_TYPE_PKT 1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* C2H event format:
|
||||||
|
* Fields TRIGGER PAYLOAD SEQ PLEN ID
|
||||||
|
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
|
||||||
|
*/
|
||||||
|
#define C2H_ID(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 4)
|
||||||
|
#define C2H_PLEN(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 4, 4)
|
||||||
|
#define C2H_SEQ(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
|
||||||
|
#define C2H_PAYLOAD(_c2h) (((u8*)(_c2h)) + 2)
|
||||||
|
|
||||||
|
#define SET_C2H_ID(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 4, _val)
|
||||||
|
#define SET_C2H_PLEN(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 4, 4, _val)
|
||||||
|
#define SET_C2H_SEQ(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1 , 0, 8, _val)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* C2H event format:
|
||||||
|
* Fields TRIGGER PLEN PAYLOAD SEQ ID
|
||||||
|
* BITS [127:120] [119:112] [111:16] [15:8] [7:0]
|
||||||
|
*/
|
||||||
|
#define C2H_ID_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 8)
|
||||||
|
#define C2H_SEQ_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
|
||||||
|
#define C2H_PAYLOAD_88XX(_c2h) (((u8*)(_c2h)) + 2)
|
||||||
|
#define C2H_PLEN_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 14, 0, 8)
|
||||||
|
#define C2H_TRIGGER_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 15, 0, 8)
|
||||||
|
|
||||||
|
#define SET_C2H_ID_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 8, _val)
|
||||||
|
#define SET_C2H_SEQ_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1, 0, 8, _val)
|
||||||
|
#define SET_C2H_PLEN_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 14, 0, 8, _val)
|
||||||
|
|
||||||
|
typedef enum _C2H_EVT {
|
||||||
|
C2H_DBG = 0x00,
|
||||||
|
C2H_LB = 0x01,
|
||||||
|
C2H_TXBF = 0x02,
|
||||||
|
C2H_CCX_TX_RPT = 0x03,
|
||||||
|
C2H_AP_REQ_TXRPT = 0x04,
|
||||||
|
C2H_FW_SCAN_COMPLETE = 0x7,
|
||||||
|
C2H_BT_INFO = 0x09,
|
||||||
|
C2H_BT_MP_INFO = 0x0B,
|
||||||
|
C2H_RA_RPT = 0x0C,
|
||||||
|
C2H_SPC_STAT = 0x0D,
|
||||||
|
C2H_RA_PARA_RPT = 0x0E,
|
||||||
|
C2H_FW_CHNL_SWITCH_COMPLETE = 0x10,
|
||||||
|
C2H_IQK_FINISH = 0x11,
|
||||||
|
C2H_MAILBOX_STATUS = 0x15,
|
||||||
|
C2H_P2P_RPORT = 0x16,
|
||||||
|
C2H_MCC = 0x17,
|
||||||
|
C2H_MAC_HIDDEN_RPT = 0x19,
|
||||||
|
C2H_MAC_HIDDEN_RPT_2 = 0x1A,
|
||||||
|
C2H_BCN_EARLY_RPT = 0x1E,
|
||||||
|
C2H_DEFEATURE_DBG = 0x22,
|
||||||
|
C2H_CUSTOMER_STR_RPT = 0x24,
|
||||||
|
C2H_CUSTOMER_STR_RPT_2 = 0x25,
|
||||||
|
C2H_WLAN_INFO = 0x27,
|
||||||
|
#ifdef RTW_PER_CMD_SUPPORT_FW
|
||||||
|
C2H_PER_RATE_RPT = 0x2c,
|
||||||
|
#endif
|
||||||
|
C2H_LPS_STATUS_RPT = 0x32,
|
||||||
|
C2H_SET_TXPWR_FINISH = 0x70,
|
||||||
|
C2H_DEFEATURE_RSVD = 0xFD,
|
||||||
|
C2H_EXTEND = 0xff,
|
||||||
|
} C2H_EVT;
|
||||||
|
|
||||||
|
typedef enum _EXTEND_C2H_EVT {
|
||||||
|
EXTEND_C2H_DBG_PRINT = 0
|
||||||
|
} EXTEND_C2H_EVT;
|
||||||
|
|
||||||
|
#define C2H_REG_LEN 16
|
||||||
|
|
||||||
|
/* C2H_IQK_FINISH, 0x11 */
|
||||||
|
#define IQK_OFFLOAD_LEN 1
|
||||||
|
void c2h_iqk_offload(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms);
|
||||||
|
#define rtl8812_iqk_wait c2h_iqk_offload_wait /* TODO: remove this after phydm call c2h_iqk_offload_wait instead */
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_MAC_HIDDEN_RPT
|
||||||
|
/* C2H_MAC_HIDDEN_RPT, 0x19 */
|
||||||
|
#define MAC_HIDDEN_RPT_LEN 8
|
||||||
|
int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
|
||||||
|
/* C2H_MAC_HIDDEN_RPT_2, 0x1A */
|
||||||
|
#define MAC_HIDDEN_RPT_2_LEN 5
|
||||||
|
int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
int hal_read_mac_hidden_rpt(_adapter *adapter);
|
||||||
|
#else
|
||||||
|
#define hal_read_mac_hidden_rpt(adapter) _SUCCESS
|
||||||
|
#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
|
||||||
|
|
||||||
|
/* C2H_DEFEATURE_DBG, 0x22 */
|
||||||
|
#define DEFEATURE_DBG_LEN 1
|
||||||
|
int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_CUSTOMER_STR
|
||||||
|
/* C2H_CUSTOMER_STR_RPT, 0x24 */
|
||||||
|
#define CUSTOMER_STR_RPT_LEN 8
|
||||||
|
int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
|
||||||
|
/* C2H_CUSTOMER_STR_RPT_2, 0x25 */
|
||||||
|
#define CUSTOMER_STR_RPT_2_LEN 8
|
||||||
|
int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
#endif /* CONFIG_RTW_CUSTOMER_STR */
|
||||||
|
|
||||||
|
#ifdef RTW_PER_CMD_SUPPORT_FW
|
||||||
|
/* C2H_PER_RATE_RPT, 0x2c */
|
||||||
|
int c2h_per_rate_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_LPS_ACK
|
||||||
|
/* C2H_LPS_STATUS_RPT, 0x32 */
|
||||||
|
#define LPS_STATUS_RPT_LEN 2
|
||||||
|
int c2h_lps_status_rpt(PADAPTER adapter, u8 *data, u8 len);
|
||||||
|
#endif /* CONFIG_LPS_ACK */
|
||||||
|
|
||||||
|
#ifdef CONFIG_FW_OFFLOAD_SET_TXPWR_IDX
|
||||||
|
/* C2H_SET_TXPWR_FINISH, 0x70 */
|
||||||
|
#define SET_TXPWR_FINISH_LEN 1
|
||||||
|
void c2h_txpwr_idx_offload_done(_adapter *adapter, u8 *data, u8 len);
|
||||||
|
int c2h_txpwr_idx_offload_wait(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void rtw_hal_bcn_early_rpt_c2h_handler(_adapter *adapter);
|
||||||
|
|
||||||
|
#endif /* __COMMON_C2H_H__ */
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,121 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2007 - 2017 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#ifndef __HAL_DM_H__
|
||||||
|
#define __HAL_DM_H__
|
||||||
|
|
||||||
|
#define adapter_to_phydm(adapter) (&(GET_HAL_DATA(adapter)->odmpriv))
|
||||||
|
#define dvobj_to_phydm(dvobj) adapter_to_phydm(dvobj_get_primary_adapter(dvobj))
|
||||||
|
#ifdef CONFIG_TDMADIG
|
||||||
|
void rtw_phydm_tdmadig(_adapter *adapter, u8 state);
|
||||||
|
#endif
|
||||||
|
void rtw_phydm_priv_init(_adapter *adapter);
|
||||||
|
void Init_ODM_ComInfo(_adapter *adapter);
|
||||||
|
void rtw_phydm_init(_adapter *adapter);
|
||||||
|
|
||||||
|
void rtw_hal_turbo_edca(_adapter *adapter);
|
||||||
|
u8 rtw_phydm_is_iqk_in_progress(_adapter *adapter);
|
||||||
|
|
||||||
|
void GetHalODMVar(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
HAL_ODM_VARIABLE eVariable,
|
||||||
|
void *pValue1,
|
||||||
|
void *pValue2);
|
||||||
|
void SetHalODMVar(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
HAL_ODM_VARIABLE eVariable,
|
||||||
|
void *pValue1,
|
||||||
|
BOOLEAN bSet);
|
||||||
|
|
||||||
|
void rtw_phydm_ra_registed(_adapter *adapter, struct sta_info *psta);
|
||||||
|
|
||||||
|
#ifdef CONFIG_DYNAMIC_SOML
|
||||||
|
void rtw_dyn_soml_byte_update(_adapter *adapter, u8 data_rate, u32 size);
|
||||||
|
void rtw_dyn_soml_para_set(_adapter *adapter, u8 train_num, u8 intvl,
|
||||||
|
u8 period, u8 delay);
|
||||||
|
void rtw_dyn_soml_config(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
void rtw_phydm_set_rrsr(_adapter *adapter, u32 rrsr_value, bool write_rrsr);
|
||||||
|
void rtw_phydm_dyn_rrsr_en(_adapter *adapter, bool en_rrsr);
|
||||||
|
void rtw_phydm_watchdog(_adapter *adapter, bool in_lps);
|
||||||
|
|
||||||
|
void rtw_hal_update_iqk_fw_offload_cap(_adapter *adapter);
|
||||||
|
void dump_sta_info(void *sel, struct sta_info *psta);
|
||||||
|
void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta);
|
||||||
|
|
||||||
|
void rtw_hal_phydm_cal_trigger(_adapter *adapter);
|
||||||
|
#ifdef CONFIG_DBG_RF_CAL
|
||||||
|
void rtw_hal_iqk_test(_adapter *adapter, bool recovery, bool clear, bool segment);
|
||||||
|
void rtw_hal_lck_test(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
s8 rtw_dm_get_min_rssi(_adapter *adapter);
|
||||||
|
s8 rtw_phydm_get_min_rssi(_adapter *adapter);
|
||||||
|
u8 rtw_phydm_get_cur_igi(_adapter *adapter);
|
||||||
|
bool rtw_phydm_get_edcca_flag(_adapter *adapter);
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef CONFIG_LPS_LCLK_WD_TIMER
|
||||||
|
extern void phydm_rssi_monitor_check(void *p_dm_void);
|
||||||
|
|
||||||
|
void rtw_phydm_wd_lps_lclk_hdl(_adapter *adapter);
|
||||||
|
void rtw_phydm_watchdog_in_lps_lclk(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_TDMADIG
|
||||||
|
enum rtw_tdmadig_state{
|
||||||
|
TDMADIG_INIT,
|
||||||
|
TDMADIG_NON_INIT,
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
enum phy_cnt {
|
||||||
|
FA_OFDM,
|
||||||
|
FA_CCK,
|
||||||
|
FA_TOTAL,
|
||||||
|
CCA_OFDM,
|
||||||
|
CCA_CCK,
|
||||||
|
CCA_ALL,
|
||||||
|
CRC32_OK_VHT,
|
||||||
|
CRC32_OK_HT,
|
||||||
|
CRC32_OK_LEGACY,
|
||||||
|
CRC32_OK_CCK,
|
||||||
|
CRC32_ERROR_VHT,
|
||||||
|
CRC32_ERROR_HT,
|
||||||
|
CRC32_ERROR_LEGACY,
|
||||||
|
CRC32_ERROR_CCK,
|
||||||
|
};
|
||||||
|
u32 rtw_phydm_get_phy_cnt(_adapter *adapter, enum phy_cnt cnt);
|
||||||
|
#if ((RTL8822B_SUPPORT == 1) || (RTL8821C_SUPPORT == 1) || (RTL8814B_SUPPORT == 1) || (RTL8822C_SUPPORT == 1) \
|
||||||
|
|| (RTL8723F_SUPPORT == 1))
|
||||||
|
void rtw_phydm_iqk_trigger(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
void rtw_phydm_read_efuse(_adapter *adapter);
|
||||||
|
bool rtw_phydm_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
|
||||||
|
|
||||||
|
#ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
|
||||||
|
void rtw_phydm_set_dyntxpwr(_adapter *adapter, u8 *desc, u8 mac_id);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_LPS_PG
|
||||||
|
void rtw_phydm_lps_pg_hdl(_adapter *adapter, struct sta_info *sta, bool in_lpspg);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_LPS_PWR_TRACKING
|
||||||
|
void rtw_phydm_pwr_tracking_directly(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_CTRL_TXSS_BY_TP
|
||||||
|
void rtw_phydm_trx_cfg(_adapter *adapter, bool tx_1ss);
|
||||||
|
#endif
|
||||||
|
u8 rtw_hal_runtime_trx_path_decision(_adapter *adapter);
|
||||||
|
bool rtw_phydm_rfe_ctrl_gpio(_adapter *adapter, u8 gpio_num);
|
||||||
|
#endif /* __HAL_DM_H__ */
|
||||||
|
|
@ -0,0 +1,607 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2014 - 2017 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#include <drv_types.h>
|
||||||
|
#include <hal_data.h>
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)
|
||||||
|
static void _rtw_bss_nums_count(_adapter *adapter, u8 *pbss_nums)
|
||||||
|
{
|
||||||
|
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
|
||||||
|
_queue *queue = &(pmlmepriv->scanned_queue);
|
||||||
|
struct wlan_network *pnetwork = NULL;
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
_list *plist, *phead;
|
||||||
|
_irqL irqL;
|
||||||
|
int chan_idx = -1;
|
||||||
|
|
||||||
|
if (pbss_nums == NULL) {
|
||||||
|
RTW_ERR("%s pbss_nums is null pointer\n", __func__);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
_rtw_memset(pbss_nums, 0, MAX_CHANNEL_NUM);
|
||||||
|
|
||||||
|
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
|
||||||
|
phead = get_list_head(queue);
|
||||||
|
plist = get_next(phead);
|
||||||
|
while (1) {
|
||||||
|
if (rtw_end_of_queue_search(phead, plist) == _TRUE)
|
||||||
|
break;
|
||||||
|
|
||||||
|
pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list);
|
||||||
|
if (!pnetwork)
|
||||||
|
break;
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), pnetwork->network.Configuration.DSConfig);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("%s can't get chan_idx(CH:%d)\n",
|
||||||
|
__func__, pnetwork->network.Configuration.DSConfig);
|
||||||
|
chan_idx = 0;
|
||||||
|
}
|
||||||
|
/*if (pnetwork->network.Reserved[0] != BSS_TYPE_PROB_REQ)*/
|
||||||
|
|
||||||
|
pbss_nums[chan_idx]++;
|
||||||
|
|
||||||
|
plist = get_next(plist);
|
||||||
|
}
|
||||||
|
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
|
||||||
|
}
|
||||||
|
|
||||||
|
u8 rtw_get_ch_num_by_idx(_adapter *adapter, u8 idx)
|
||||||
|
{
|
||||||
|
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||||
|
RT_CHANNEL_INFO *pch_set = rfctl->channel_set;
|
||||||
|
u8 max_chan_nums = rfctl->max_chan_nums;
|
||||||
|
|
||||||
|
if (idx >= max_chan_nums)
|
||||||
|
return 0;
|
||||||
|
return pch_set[idx].ChannelNum;
|
||||||
|
}
|
||||||
|
#endif /*defined(CONFIG_RTW_ACS) || defined(CONFIG_BACKGROUND_NOISE_MONITOR)*/
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS
|
||||||
|
void rtw_acs_version_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
_RTW_PRINT_SEL(sel, "RTK_ACS VER_%d\n", RTK_ACS_VERSION);
|
||||||
|
}
|
||||||
|
u8 rtw_phydm_clm_ratio(_adapter *adapter)
|
||||||
|
{
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
|
||||||
|
return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_CLM_RATIO);
|
||||||
|
}
|
||||||
|
u8 rtw_phydm_nhm_ratio(_adapter *adapter)
|
||||||
|
{
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
|
||||||
|
return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_ENV_RATIO);
|
||||||
|
}
|
||||||
|
|
||||||
|
u8 rtw_phydm_nhm_noise_pwr(_adapter *adapter)
|
||||||
|
{
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
|
||||||
|
return phydm_cmn_info_query(phydm, (enum phydm_info_query) PHYDM_INFO_NHM_PWR);
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtw_acs_reset(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct auto_chan_sel *pacs = &hal_data->acs;
|
||||||
|
|
||||||
|
_rtw_memset(pacs, 0, sizeof(struct auto_chan_sel));
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
rtw_acs_adv_reset(adapter);
|
||||||
|
#endif /*CONFIG_RTW_ACS_DBG*/
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
u8 rtw_is_acs_igi_valid(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct auto_chan_sel *pacs = &hal_data->acs;
|
||||||
|
|
||||||
|
if ((pacs->igi) && ((pacs->igi >= 0x1E) || (pacs->igi < 0x60)))
|
||||||
|
return _TRUE;
|
||||||
|
|
||||||
|
return _FALSE;
|
||||||
|
}
|
||||||
|
void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct auto_chan_sel *pacs = &hal_data->acs;
|
||||||
|
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||||
|
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
|
||||||
|
|
||||||
|
pacs->scan_type = scan_type;
|
||||||
|
pacs->scan_time = scan_time;
|
||||||
|
pacs->igi = igi;
|
||||||
|
pacs->bw = bw;
|
||||||
|
RTW_INFO("[ACS] ADV setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
|
||||||
|
pacs->scan_type ? 'A' : 'P', pacs->scan_time, pacs->igi, pacs->bw);
|
||||||
|
}
|
||||||
|
void rtw_acs_adv_reset(_adapter *adapter)
|
||||||
|
{
|
||||||
|
rtw_acs_adv_setting(adapter, SCAN_ACTIVE, 0, 0, 0);
|
||||||
|
}
|
||||||
|
#endif /*CONFIG_RTW_ACS_DBG*/
|
||||||
|
|
||||||
|
void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
#if (RTK_ACS_VERSION == 3)
|
||||||
|
struct clm_para_info clm_para;
|
||||||
|
struct nhm_para_info nhm_para;
|
||||||
|
struct env_trig_rpt trig_rpt;
|
||||||
|
|
||||||
|
scan_time_ms -= 10;
|
||||||
|
|
||||||
|
init_acs_clm(clm_para, scan_time_ms);
|
||||||
|
|
||||||
|
if (pid == NHM_PID_IEEE_11K_HIGH)
|
||||||
|
init_11K_high_nhm(nhm_para, scan_time_ms);
|
||||||
|
else if (pid == NHM_PID_IEEE_11K_LOW)
|
||||||
|
init_11K_low_nhm(nhm_para, scan_time_ms);
|
||||||
|
else
|
||||||
|
init_acs_nhm(nhm_para, scan_time_ms);
|
||||||
|
|
||||||
|
hal_data->acs.trig_rst = phydm_env_mntr_trigger(phydm, &nhm_para, &clm_para, &trig_rpt);
|
||||||
|
if (hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS)) {
|
||||||
|
hal_data->acs.trig_rpt.clm_rpt_stamp = trig_rpt.clm_rpt_stamp;
|
||||||
|
hal_data->acs.trig_rpt.nhm_rpt_stamp = trig_rpt.nhm_rpt_stamp;
|
||||||
|
/*RTW_INFO("[ACS] trigger success (rst = 0x%02x, clm_stamp:%d, nhm_stamp:%d)\n",
|
||||||
|
hal_data->acs.trig_rst, hal_data->acs.trig_rpt.clm_rpt_stamp, hal_data->acs.trig_rpt.nhm_rpt_stamp);*/
|
||||||
|
} else
|
||||||
|
RTW_ERR("[ACS] trigger failed (rst = 0x%02x)\n", hal_data->acs.trig_rst);
|
||||||
|
#else
|
||||||
|
phydm_ccx_monitor_trigger(phydm, scan_time_ms);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
hal_data->acs.trigger_ch = scan_chan;
|
||||||
|
hal_data->acs.triggered = _TRUE;
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
RTW_INFO("[ACS] Trigger CH:%d, Times:%d\n", hal_data->acs.trigger_ch, scan_time_ms);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
void rtw_acs_get_rst(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
int chan_idx = -1;
|
||||||
|
u8 cur_chan = hal_data->acs.trigger_ch;
|
||||||
|
|
||||||
|
if (cur_chan == 0)
|
||||||
|
return;
|
||||||
|
|
||||||
|
if (!hal_data->acs.triggered)
|
||||||
|
return;
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), cur_chan);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("[ACS] %s can't get chan_idx(CH:%d)\n", __func__, cur_chan);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
#if (RTK_ACS_VERSION == 3)
|
||||||
|
if (!(hal_data->acs.trig_rst == (NHM_SUCCESS | CLM_SUCCESS))) {
|
||||||
|
RTW_ERR("[ACS] get_rst return, due to acs trigger failed\n");
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
{
|
||||||
|
struct env_mntr_rpt rpt = {0};
|
||||||
|
u8 rst;
|
||||||
|
|
||||||
|
rst = phydm_env_mntr_result(phydm, &rpt);
|
||||||
|
if ((rst == (NHM_SUCCESS | CLM_SUCCESS)) &&
|
||||||
|
(rpt.clm_rpt_stamp == hal_data->acs.trig_rpt.clm_rpt_stamp) &&
|
||||||
|
(rpt.nhm_rpt_stamp == hal_data->acs.trig_rpt.nhm_rpt_stamp)){
|
||||||
|
hal_data->acs.clm_ratio[chan_idx] = rpt.clm_ratio;
|
||||||
|
hal_data->acs.nhm_ratio[chan_idx] = rpt.nhm_env_ratio;
|
||||||
|
hal_data->acs.env_mntr_rpt[chan_idx] = (rpt.nhm_noise_pwr -100);
|
||||||
|
_rtw_memcpy(&hal_data->acs.nhm[chan_idx][0], rpt.nhm_result, NHM_RPT_NUM);
|
||||||
|
|
||||||
|
/*RTW_INFO("[ACS] get_rst success (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
|
||||||
|
rst,
|
||||||
|
hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
|
||||||
|
hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);*/
|
||||||
|
} else {
|
||||||
|
RTW_ERR("[ACS] get_rst failed (rst = 0x%02x, clm_stamp:%d:%d, nhm_stamp:%d:%d)\n",
|
||||||
|
rst,
|
||||||
|
hal_data->acs.trig_rpt.clm_rpt_stamp, rpt.clm_rpt_stamp,
|
||||||
|
hal_data->acs.trig_rpt.nhm_rpt_stamp, rpt.nhm_rpt_stamp);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#else
|
||||||
|
phydm_ccx_monitor_result(phydm);
|
||||||
|
|
||||||
|
hal_data->acs.clm_ratio[chan_idx] = rtw_phydm_clm_ratio(adapter);
|
||||||
|
hal_data->acs.nhm_ratio[chan_idx] = rtw_phydm_nhm_ratio(adapter);
|
||||||
|
#endif
|
||||||
|
hal_data->acs.triggered = _FALSE;
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
RTW_INFO("[ACS] Result CH:%d, CLM:%d NHM:%d\n",
|
||||||
|
cur_chan, hal_data->acs.clm_ratio[chan_idx], hal_data->acs.nhm_ratio[chan_idx]);
|
||||||
|
RTW_INFO("[ACS] Result NHM(dBm):%d\n",
|
||||||
|
hal_data->acs.env_mntr_rpt[chan_idx] );
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void _rtw_phydm_acs_select_best_chan(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||||
|
u8 ch_idx;
|
||||||
|
u8 ch_idx_24g = 0xFF, ch_idx_5g = 0xFF;
|
||||||
|
u8 min_itf_24g = 0xFF, min_itf_5g = 0xFF;
|
||||||
|
u8 *pbss_nums = hal_data->acs.bss_nums;
|
||||||
|
u8 *pclm_ratio = hal_data->acs.clm_ratio;
|
||||||
|
u8 *pnhm_ratio = hal_data->acs.nhm_ratio;
|
||||||
|
u8 *pinterference_time = hal_data->acs.interference_time;
|
||||||
|
u8 max_chan_nums = rfctl->max_chan_nums;
|
||||||
|
|
||||||
|
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
|
||||||
|
if (pbss_nums[ch_idx])
|
||||||
|
pinterference_time[ch_idx] = (pclm_ratio[ch_idx] / 2) + (pnhm_ratio[ch_idx] / 2);
|
||||||
|
else
|
||||||
|
pinterference_time[ch_idx] = (pclm_ratio[ch_idx] / 3) + ((pnhm_ratio[ch_idx] * 2) / 3);
|
||||||
|
|
||||||
|
if (rtw_get_ch_num_by_idx(adapter, ch_idx) < 14) {
|
||||||
|
if (pinterference_time[ch_idx] < min_itf_24g) {
|
||||||
|
min_itf_24g = pinterference_time[ch_idx];
|
||||||
|
ch_idx_24g = ch_idx;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if (pinterference_time[ch_idx] < min_itf_5g) {
|
||||||
|
min_itf_5g = pinterference_time[ch_idx];
|
||||||
|
ch_idx_5g = ch_idx;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if (ch_idx_24g != 0xFF)
|
||||||
|
hal_data->acs.best_chan_24g = rtw_get_ch_num_by_idx(adapter, ch_idx_24g);
|
||||||
|
|
||||||
|
if (ch_idx_5g != 0xFF)
|
||||||
|
hal_data->acs.best_chan_5g = rtw_get_ch_num_by_idx(adapter, ch_idx_5g);
|
||||||
|
|
||||||
|
hal_data->acs.trigger_ch = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtw_acs_info_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||||
|
u8 max_chan_nums = rfctl->max_chan_nums;
|
||||||
|
u8 ch_idx, ch_num;
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION);
|
||||||
|
_RTW_PRINT_SEL(sel, "Best 24G Channel:%d\n", hal_data->acs.best_chan_24g);
|
||||||
|
_RTW_PRINT_SEL(sel, "Best 5G Channel:%d\n\n", hal_data->acs.best_chan_5g);
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
_RTW_PRINT_SEL(sel, "Advanced setting - scan_type:%c, ch_ms:%d(ms), igi:0x%02x, bw:%d\n",
|
||||||
|
hal_data->acs.scan_type ? 'A' : 'P', hal_data->acs.scan_time, hal_data->acs.igi, hal_data->acs.bw);
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "BW 20MHz\n");
|
||||||
|
_RTW_PRINT_SEL(sel, "%5s %3s %3s %3s(%%) %3s(%%) %3s\n",
|
||||||
|
"Index", "CH", "BSS", "CLM", "NHM", "ITF");
|
||||||
|
|
||||||
|
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
|
||||||
|
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
|
||||||
|
_RTW_PRINT_SEL(sel, "%5d %3d %3d %6d %6d %3d\n",
|
||||||
|
ch_idx, ch_num, hal_data->acs.bss_nums[ch_idx],
|
||||||
|
hal_data->acs.clm_ratio[ch_idx],
|
||||||
|
hal_data->acs.nhm_ratio[ch_idx],
|
||||||
|
hal_data->acs.interference_time[ch_idx]);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
void rtw_acs_select_best_chan(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
_rtw_bss_nums_count(adapter, hal_data->acs.bss_nums);
|
||||||
|
_rtw_phydm_acs_select_best_chan(adapter);
|
||||||
|
rtw_acs_info_dump(RTW_DBGDUMP, adapter);
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtw_acs_start(_adapter *adapter)
|
||||||
|
{
|
||||||
|
rtw_acs_reset(adapter);
|
||||||
|
if (GET_ACS_STATE(adapter) != ACS_ENABLE)
|
||||||
|
SET_ACS_STATE(adapter, ACS_ENABLE);
|
||||||
|
}
|
||||||
|
void rtw_acs_stop(_adapter *adapter)
|
||||||
|
{
|
||||||
|
SET_ACS_STATE(adapter, ACS_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
int chan_idx = -1;
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("[ACS] Get CLM fail, can't get chan_idx(CH:%d)\n", chan);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return hal_data->acs.clm_ratio[chan_idx];
|
||||||
|
}
|
||||||
|
u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
if (ch_idx >= MAX_CHANNEL_NUM) {
|
||||||
|
RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return hal_data->acs.clm_ratio[ch_idx];
|
||||||
|
}
|
||||||
|
u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
int chan_idx = -1;
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("[ACS] Get NHM fail, can't get chan_idx(CH:%d)\n", chan);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return hal_data->acs.nhm_ratio[chan_idx];
|
||||||
|
}
|
||||||
|
u8 rtw_acs_get_nhm_noise_pwr_by_ch_idx(_adapter *adapter, u8 ch_idx)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
if (ch_idx >= MAX_CHANNEL_NUM) {
|
||||||
|
RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return hal_data->acs.env_mntr_rpt[ch_idx];
|
||||||
|
}
|
||||||
|
|
||||||
|
u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
if (ch_idx >= MAX_CHANNEL_NUM) {
|
||||||
|
RTW_ERR("%s [ACS] ch_idx(%d) is invalid\n", __func__, ch_idx);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
return hal_data->acs.nhm_ratio[ch_idx];
|
||||||
|
}
|
||||||
|
void rtw_acs_chan_info_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||||
|
u8 max_chan_nums = rfctl->max_chan_nums;
|
||||||
|
u8 ch_idx, ch_num;
|
||||||
|
u8 utilization;
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "BW 20MHz\n");
|
||||||
|
_RTW_PRINT_SEL(sel, "%5s %3s %7s(%%) %12s(%%) %11s(%%) %9s(%%) %8s(%%)\n",
|
||||||
|
"Index", "CH", "Quality", "Availability", "Utilization",
|
||||||
|
"WIFI Util", "Interference Util");
|
||||||
|
|
||||||
|
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
|
||||||
|
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
|
||||||
|
utilization = hal_data->acs.clm_ratio[ch_idx] + hal_data->acs.nhm_ratio[ch_idx];
|
||||||
|
_RTW_PRINT_SEL(sel, "%5d %3d %7d %12d %12d %12d %12d\n",
|
||||||
|
ch_idx, ch_num,
|
||||||
|
(100-hal_data->acs.interference_time[ch_idx]),
|
||||||
|
(100-utilization),
|
||||||
|
utilization,
|
||||||
|
hal_data->acs.clm_ratio[ch_idx],
|
||||||
|
hal_data->acs.nhm_ratio[ch_idx]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
void rtw_acs_current_info_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
u8 ch, cen_ch, bw, offset;
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "========== ACS (VER-%d) ==========\n", RTK_ACS_VERSION);
|
||||||
|
|
||||||
|
ch = rtw_get_oper_ch(adapter);
|
||||||
|
bw = rtw_get_oper_bw(adapter);
|
||||||
|
offset = rtw_get_oper_choffset(adapter);
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "Current Channel:%d\n", ch);
|
||||||
|
if ((bw == CHANNEL_WIDTH_80) ||(bw == CHANNEL_WIDTH_40)) {
|
||||||
|
cen_ch = rtw_get_center_ch(ch, bw, offset);
|
||||||
|
_RTW_PRINT_SEL(sel, "Center Channel:%d\n", cen_ch);
|
||||||
|
}
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "Current BW %s\n", ch_width_str(bw));
|
||||||
|
if (0)
|
||||||
|
_RTW_PRINT_SEL(sel, "Current IGI 0x%02x\n", rtw_phydm_get_cur_igi(adapter));
|
||||||
|
_RTW_PRINT_SEL(sel, "CLM:%d, NHM:%d\n\n",
|
||||||
|
hal_data->acs.cur_ch_clm_ratio, hal_data->acs.cur_ch_nhm_ratio);
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtw_acs_update_current_info(_adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
|
||||||
|
hal_data->acs.cur_ch_clm_ratio = rtw_phydm_clm_ratio(adapter);
|
||||||
|
hal_data->acs.cur_ch_nhm_ratio = rtw_phydm_nhm_ratio(adapter);
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
rtw_acs_current_info_dump(RTW_DBGDUMP, adapter);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
/*
|
||||||
|
rsni
|
||||||
|
para1:rcpi=>RSSI in dbm
|
||||||
|
para2:anpi=>nhm in dbm
|
||||||
|
range:0~255
|
||||||
|
255: is not available (defined by 802.11k spec)
|
||||||
|
|
||||||
|
*/
|
||||||
|
u8 rtw_acs_get_rsni(_adapter *adapter, s8 rcpi, u8 ch)
|
||||||
|
{
|
||||||
|
struct dm_struct *phydm = adapter_to_phydm(adapter);
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
u8 rsni = 255;
|
||||||
|
s8 anpi = 0;
|
||||||
|
int chan_idx = -1;
|
||||||
|
|
||||||
|
if(ch == 0)
|
||||||
|
goto exit;
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), ch);
|
||||||
|
if(chan_idx == -1)
|
||||||
|
goto exit;
|
||||||
|
|
||||||
|
anpi = rtw_acs_get_nhm_noise_pwr_by_ch_idx(adapter, chan_idx);
|
||||||
|
if((rcpi != 0) && (anpi != 0))
|
||||||
|
rsni = phydm_env_mntr_get_802_11_k_rsni(phydm, rcpi, anpi);
|
||||||
|
RTW_DBG("[ACS][RSNI]ch=%d chan_idx=%d RSNI=%u RSSI=%d NHM=%d\n", ch, chan_idx, rsni,rcpi, anpi);
|
||||||
|
exit:
|
||||||
|
return rsni;
|
||||||
|
}
|
||||||
|
#endif /*CONFIG_RTW_ACS*/
|
||||||
|
|
||||||
|
#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
|
||||||
|
void rtw_noise_monitor_version_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
_RTW_PRINT_SEL(sel, "RTK_NOISE_MONITOR VER_%d\n", RTK_NOISE_MONITOR_VERSION);
|
||||||
|
}
|
||||||
|
void rtw_nm_enable(_adapter *adapter)
|
||||||
|
{
|
||||||
|
SET_NM_STATE(adapter, NM_ENABLE);
|
||||||
|
}
|
||||||
|
void rtw_nm_disable(_adapter *adapter)
|
||||||
|
{
|
||||||
|
SET_NM_STATE(adapter, NM_DISABLE);
|
||||||
|
}
|
||||||
|
void rtw_noise_info_dump(void *sel, _adapter *adapter)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
|
||||||
|
u8 max_chan_nums = rfctl->max_chan_nums;
|
||||||
|
u8 ch_idx, ch_num;
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "========== NM (VER-%d) ==========\n", RTK_NOISE_MONITOR_VERSION);
|
||||||
|
|
||||||
|
_RTW_PRINT_SEL(sel, "%5s %3s %3s %10s", "Index", "CH", "BSS", "Noise(dBm)\n");
|
||||||
|
|
||||||
|
_rtw_bss_nums_count(adapter, hal_data->nm.bss_nums);
|
||||||
|
|
||||||
|
for (ch_idx = 0; ch_idx < max_chan_nums; ch_idx++) {
|
||||||
|
ch_num = rtw_get_ch_num_by_idx(adapter, ch_idx);
|
||||||
|
_RTW_PRINT_SEL(sel, "%5d %3d %3d %10d\n",
|
||||||
|
ch_idx, ch_num, hal_data->nm.bss_nums[ch_idx],
|
||||||
|
hal_data->nm.noise[ch_idx]);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
struct dm_struct *phydm = &hal_data->odmpriv;
|
||||||
|
int chan_idx = -1;
|
||||||
|
s16 noise = 0;
|
||||||
|
|
||||||
|
#ifdef DBG_NOISE_MONITOR
|
||||||
|
RTW_INFO("[NM] chan(%d)-PauseDIG:%s, IGIValue:0x%02x, max_time:%d (ms)\n",
|
||||||
|
chan, (is_pause_dig) ? "Y" : "N", igi_value, max_time);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
noise = odm_inband_noise_monitor(phydm, is_pause_dig, igi_value, max_time); /*dBm*/
|
||||||
|
|
||||||
|
hal_data->nm.noise[chan_idx] = noise;
|
||||||
|
|
||||||
|
#ifdef DBG_NOISE_MONITOR
|
||||||
|
RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, hal_data->nm.noise[chan_idx]);
|
||||||
|
|
||||||
|
RTW_INFO("[NM] noise_a = %d, noise_b = %d noise_all:%d\n",
|
||||||
|
phydm->noise_level.noise[RF_PATH_A],
|
||||||
|
phydm->noise_level.noise[RF_PATH_B],
|
||||||
|
phydm->noise_level.noise_all);
|
||||||
|
#endif /*DBG_NOISE_MONITOR*/
|
||||||
|
}
|
||||||
|
|
||||||
|
s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
s16 noise = 0;
|
||||||
|
int chan_idx = -1;
|
||||||
|
|
||||||
|
chan_idx = rtw_chset_search_ch(adapter_to_chset(adapter), chan);
|
||||||
|
if ((chan_idx == -1) || (chan_idx >= MAX_CHANNEL_NUM)) {
|
||||||
|
RTW_ERR("[NM] Get noise fail, can't get chan_idx(CH:%d)\n", chan);
|
||||||
|
return noise;
|
||||||
|
}
|
||||||
|
noise = hal_data->nm.noise[chan_idx];
|
||||||
|
|
||||||
|
#ifdef DBG_NOISE_MONITOR
|
||||||
|
RTW_INFO("[NM] %s chan_%d, noise = %d (dBm)\n", __func__, chan, noise);
|
||||||
|
#endif/*DBG_NOISE_MONITOR*/
|
||||||
|
return noise;
|
||||||
|
}
|
||||||
|
s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx)
|
||||||
|
{
|
||||||
|
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
|
||||||
|
s16 noise = 0;
|
||||||
|
|
||||||
|
if (ch_idx >= MAX_CHANNEL_NUM) {
|
||||||
|
RTW_ERR("[NM] %s ch_idx(%d) is invalid\n", __func__, ch_idx);
|
||||||
|
return noise;
|
||||||
|
}
|
||||||
|
noise = hal_data->nm.noise[ch_idx];
|
||||||
|
|
||||||
|
#ifdef DBG_NOISE_MONITOR
|
||||||
|
RTW_INFO("[NM] %s ch_idx %d, noise = %d (dBm)\n", __func__, ch_idx, noise);
|
||||||
|
#endif/*DBG_NOISE_MONITOR*/
|
||||||
|
return noise;
|
||||||
|
}
|
||||||
|
|
||||||
|
s16 rtw_noise_measure_curchan(_adapter *padapter)
|
||||||
|
{
|
||||||
|
s16 noise = 0;
|
||||||
|
u8 igi_value = 0x1E;
|
||||||
|
u32 max_time = 100;/* ms */
|
||||||
|
u8 is_pause_dig = _TRUE;
|
||||||
|
u8 cur_chan = rtw_get_oper_ch(padapter);
|
||||||
|
|
||||||
|
if (rtw_linked_check(padapter) == _FALSE)
|
||||||
|
return noise;
|
||||||
|
|
||||||
|
rtw_ps_deny(padapter, PS_DENY_IOCTL);
|
||||||
|
LeaveAllPowerSaveModeDirect(padapter);
|
||||||
|
rtw_noise_measure(padapter, cur_chan, is_pause_dig, igi_value, max_time);
|
||||||
|
noise = rtw_noise_query_by_chan_num(padapter, cur_chan);
|
||||||
|
rtw_ps_deny_cancel(padapter, PS_DENY_IOCTL);
|
||||||
|
|
||||||
|
return noise;
|
||||||
|
}
|
||||||
|
#endif /*CONFIG_BACKGROUND_NOISE_MONITOR*/
|
||||||
|
|
||||||
|
|
@ -0,0 +1,173 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2007 - 2017 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#ifndef __HAL_DM_ACS_H__
|
||||||
|
#define __HAL_DM_ACS_H__
|
||||||
|
#ifdef CONFIG_RTW_ACS
|
||||||
|
#define RTK_ACS_VERSION 3
|
||||||
|
|
||||||
|
#if (RTK_ACS_VERSION == 3)
|
||||||
|
enum NHM_PID {
|
||||||
|
NHM_PID_ACS,
|
||||||
|
NHM_PID_IEEE_11K_HIGH,
|
||||||
|
NHM_PID_IEEE_11K_LOW,
|
||||||
|
};
|
||||||
|
|
||||||
|
#define init_clm_param(clm, app, lv, time) \
|
||||||
|
do {\
|
||||||
|
clm.clm_app = app;\
|
||||||
|
clm.clm_lv = lv;\
|
||||||
|
clm.mntr_time = time;\
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#define init_nhm_param(nhm, txon, cca, cnt_opt, app, lv, time) \
|
||||||
|
do {\
|
||||||
|
nhm.incld_txon = txon;\
|
||||||
|
nhm.incld_cca = cca;\
|
||||||
|
nhm.div_opt = cnt_opt;\
|
||||||
|
nhm.nhm_app = app;\
|
||||||
|
nhm.nhm_lv = lv;\
|
||||||
|
nhm.mntr_time = time;\
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
|
||||||
|
#define init_acs_clm(clm, time) \
|
||||||
|
init_clm_param(clm, CLM_ACS, CLM_LV_2, time)
|
||||||
|
|
||||||
|
#define init_acs_nhm(nhm, time) \
|
||||||
|
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, NHM_ACS, NHM_LV_2, time)
|
||||||
|
|
||||||
|
#define init_11K_high_nhm(nhm, time) \
|
||||||
|
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_HIGH, NHM_LV_2, time)
|
||||||
|
|
||||||
|
#define init_11K_low_nhm(nhm, time) \
|
||||||
|
init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_LOW, NHM_LV_2, time)
|
||||||
|
|
||||||
|
|
||||||
|
#endif /*(RTK_ACS_VERSION == 3)*/
|
||||||
|
void rtw_acs_version_dump(void *sel, _adapter *adapter);
|
||||||
|
extern void phydm_ccx_monitor_trigger(void *p_dm_void, u16 monitor_time);
|
||||||
|
extern void phydm_ccx_monitor_result(void *p_dm_void);
|
||||||
|
|
||||||
|
#define GET_ACS_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->acs.state))
|
||||||
|
#define SET_ACS_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->acs.state, set_state))
|
||||||
|
#define IS_ACS_ENABLE(padapter) ((GET_ACS_STATE(padapter) == ACS_ENABLE) ? _TRUE : _FALSE)
|
||||||
|
|
||||||
|
enum ACS_STATE {
|
||||||
|
ACS_DISABLE,
|
||||||
|
ACS_ENABLE,
|
||||||
|
};
|
||||||
|
|
||||||
|
#define ACS_BW_20M BIT(0)
|
||||||
|
#define ACS_BW_40M BIT(1)
|
||||||
|
#define ACS_BW_80M BIT(2)
|
||||||
|
#define ACS_BW_160M BIT(3)
|
||||||
|
|
||||||
|
struct auto_chan_sel {
|
||||||
|
ATOMIC_T state;
|
||||||
|
u8 trigger_ch;
|
||||||
|
bool triggered;
|
||||||
|
u8 clm_ratio[MAX_CHANNEL_NUM];
|
||||||
|
u8 nhm_ratio[MAX_CHANNEL_NUM];
|
||||||
|
s8 env_mntr_rpt[MAX_CHANNEL_NUM]; /*unit:dbm*/
|
||||||
|
#if (RTK_ACS_VERSION == 3)
|
||||||
|
u8 nhm[MAX_CHANNEL_NUM][NHM_RPT_NUM];
|
||||||
|
#endif
|
||||||
|
u8 bss_nums[MAX_CHANNEL_NUM];
|
||||||
|
u8 interference_time[MAX_CHANNEL_NUM];
|
||||||
|
u8 cur_ch_clm_ratio;
|
||||||
|
u8 cur_ch_nhm_ratio;
|
||||||
|
u8 best_chan_5g;
|
||||||
|
u8 best_chan_24g;
|
||||||
|
|
||||||
|
#if (RTK_ACS_VERSION == 3)
|
||||||
|
u8 trig_rst;
|
||||||
|
struct env_trig_rpt trig_rpt;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
RT_SCAN_TYPE scan_type;
|
||||||
|
u16 scan_time;
|
||||||
|
u8 igi;
|
||||||
|
u8 bw;
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
#define rtw_acs_get_best_chan_24g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_24g)
|
||||||
|
#define rtw_acs_get_best_chan_5g(adapter) (GET_HAL_DATA(adapter)->acs.best_chan_5g)
|
||||||
|
|
||||||
|
#ifdef CONFIG_RTW_ACS_DBG
|
||||||
|
#define rtw_is_acs_passiv_scan(adapter) (((GET_HAL_DATA(adapter)->acs.scan_type) == SCAN_PASSIVE) ? _TRUE : _FALSE)
|
||||||
|
|
||||||
|
#define rtw_acs_get_adv_st(adapter) (GET_HAL_DATA(adapter)->acs.scan_time)
|
||||||
|
#define rtw_is_acs_st_valid(adapter) ((GET_HAL_DATA(adapter)->acs.scan_time) ? _TRUE : _FALSE)
|
||||||
|
|
||||||
|
#define rtw_acs_get_adv_igi(adapter) (GET_HAL_DATA(adapter)->acs.igi)
|
||||||
|
u8 rtw_is_acs_igi_valid(_adapter *adapter);
|
||||||
|
|
||||||
|
#define rtw_acs_get_adv_bw(adapter) (GET_HAL_DATA(adapter)->acs.bw)
|
||||||
|
|
||||||
|
void rtw_acs_adv_setting(_adapter *adapter, RT_SCAN_TYPE scan_type, u16 scan_time, u8 igi, u8 bw);
|
||||||
|
void rtw_acs_adv_reset(_adapter *adapter);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
u8 rtw_acs_get_clm_ratio_by_ch_num(_adapter *adapter, u8 chan);
|
||||||
|
u8 rtw_acs_get_clm_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
|
||||||
|
u8 rtw_acs_get_nhm_ratio_by_ch_num(_adapter *adapter, u8 chan);
|
||||||
|
u8 rtw_acs_get_nhm_noise_pwr_by_ch_idx(_adapter *adapter, u8 ch_idx);
|
||||||
|
u8 rtw_acs_get_num_ratio_by_ch_idx(_adapter *adapter, u8 ch_idx);
|
||||||
|
|
||||||
|
u8 rtw_phydm_clm_ratio(_adapter *adapter);
|
||||||
|
u8 rtw_phydm_nhm_ratio(_adapter *adapter);
|
||||||
|
u8 rtw_phydm_nhm_noise_pwr(_adapter *adapter);
|
||||||
|
|
||||||
|
void rtw_acs_reset(_adapter *adapter);
|
||||||
|
void rtw_acs_trigger(_adapter *adapter, u16 scan_time_ms, u8 scan_chan, enum NHM_PID pid);
|
||||||
|
void rtw_acs_get_rst(_adapter *adapter);
|
||||||
|
void rtw_acs_select_best_chan(_adapter *adapter);
|
||||||
|
void rtw_acs_info_dump(void *sel, _adapter *adapter);
|
||||||
|
void rtw_acs_update_current_info(_adapter *adapter);
|
||||||
|
void rtw_acs_chan_info_dump(void *sel, _adapter *adapter);
|
||||||
|
void rtw_acs_current_info_dump(void *sel, _adapter *adapter);
|
||||||
|
|
||||||
|
void rtw_acs_start(_adapter *adapter);
|
||||||
|
void rtw_acs_stop(_adapter *adapter);
|
||||||
|
u8 rtw_acs_get_rsni(_adapter *adapter, s8 rcpi, u8 ch);
|
||||||
|
#endif /*CONFIG_RTW_ACS*/
|
||||||
|
|
||||||
|
#ifdef CONFIG_BACKGROUND_NOISE_MONITOR
|
||||||
|
#define RTK_NOISE_MONITOR_VERSION 3
|
||||||
|
#define GET_NM_STATE(padapter) (ATOMIC_READ(&GET_HAL_DATA(padapter)->nm.state))
|
||||||
|
#define SET_NM_STATE(padapter, set_state) (ATOMIC_SET(&GET_HAL_DATA(padapter)->nm.state, set_state))
|
||||||
|
#define IS_NM_ENABLE(padapter) ((GET_NM_STATE(padapter) == NM_ENABLE) ? _TRUE : _FALSE)
|
||||||
|
|
||||||
|
enum NM_STATE {
|
||||||
|
NM_DISABLE,
|
||||||
|
NM_ENABLE,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct noise_monitor {
|
||||||
|
ATOMIC_T state;
|
||||||
|
s16 noise[MAX_CHANNEL_NUM];
|
||||||
|
u8 bss_nums[MAX_CHANNEL_NUM];
|
||||||
|
};
|
||||||
|
void rtw_nm_enable(_adapter *adapter);
|
||||||
|
void rtw_nm_disable(_adapter *adapter);
|
||||||
|
void rtw_noise_measure(_adapter *adapter, u8 chan, u8 is_pause_dig, u8 igi_value, u32 max_time);
|
||||||
|
s16 rtw_noise_query_by_chan_num(_adapter *adapter, u8 chan);
|
||||||
|
s16 rtw_noise_query_by_chan_idx(_adapter *adapter, u8 ch_idx);
|
||||||
|
s16 rtw_noise_measure_curchan(_adapter *padapter);
|
||||||
|
void rtw_noise_info_dump(void *sel, _adapter *adapter);
|
||||||
|
#endif
|
||||||
|
#endif /* __HAL_DM_ACS_H__ */
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,252 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2015 - 2019 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#ifndef _HAL_HALMAC_H_
|
||||||
|
#define _HAL_HALMAC_H_
|
||||||
|
|
||||||
|
#include <drv_types.h> /* adapter_to_dvobj(), struct intf_hdl and etc. */
|
||||||
|
#include <hal_data.h> /* struct hal_spec_t */
|
||||||
|
#include "halmac/halmac_api.h" /* struct halmac_adapter* and etc. */
|
||||||
|
|
||||||
|
/* HALMAC Definition for Driver */
|
||||||
|
#define RTW_HALMAC_H2C_MAX_SIZE 8
|
||||||
|
#define RTW_HALMAC_BA_SSN_RPT_SIZE 4
|
||||||
|
|
||||||
|
#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac))
|
||||||
|
#define dvobj_to_halmac(d) ((struct halmac_adapter *)((d)->halmac))
|
||||||
|
#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p))
|
||||||
|
|
||||||
|
/* for H2C cmd */
|
||||||
|
#define MAX_H2C_BOX_NUMS 4
|
||||||
|
#define MESSAGE_BOX_SIZE 4
|
||||||
|
#define EX_MESSAGE_BOX_SIZE 4
|
||||||
|
|
||||||
|
typedef enum _RTW_HALMAC_MODE {
|
||||||
|
RTW_HALMAC_MODE_NORMAL,
|
||||||
|
RTW_HALMAC_MODE_WIFI_TEST,
|
||||||
|
} RTW_HALMAC_MODE;
|
||||||
|
|
||||||
|
union rtw_phy_para_data {
|
||||||
|
struct _mac {
|
||||||
|
u32 value; /* value to be set in bit mask(msk) */
|
||||||
|
u32 msk; /* bit mask */
|
||||||
|
u16 offset; /* address */
|
||||||
|
u8 msk_en; /* 0/1 for msk invalid/valid */
|
||||||
|
u8 size; /* Unit is bytes, and value should be 1/2/4 */
|
||||||
|
} mac;
|
||||||
|
struct _bb {
|
||||||
|
u32 value;
|
||||||
|
u32 msk;
|
||||||
|
u16 offset;
|
||||||
|
u8 msk_en;
|
||||||
|
u8 size;
|
||||||
|
} bb;
|
||||||
|
struct _rf {
|
||||||
|
u32 value;
|
||||||
|
u32 msk;
|
||||||
|
u8 offset;
|
||||||
|
u8 msk_en;
|
||||||
|
/*
|
||||||
|
* 0: path A
|
||||||
|
* 1: path B
|
||||||
|
* 2: path C
|
||||||
|
* 3: path D
|
||||||
|
*/
|
||||||
|
u8 path;
|
||||||
|
} rf;
|
||||||
|
struct _delay {
|
||||||
|
/*
|
||||||
|
* 0: microsecond (us)
|
||||||
|
* 1: millisecond (ms)
|
||||||
|
*/
|
||||||
|
u8 unit;
|
||||||
|
u16 value;
|
||||||
|
} delay;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct rtw_phy_parameter {
|
||||||
|
/*
|
||||||
|
* 0: MAC register
|
||||||
|
* 1: BB register
|
||||||
|
* 2: RF register
|
||||||
|
* 3: Delay
|
||||||
|
* 0xFF: Latest(End) command
|
||||||
|
*/
|
||||||
|
u8 cmd;
|
||||||
|
union rtw_phy_para_data data;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct rtw_halmac_bcn_ctrl {
|
||||||
|
u8 rx_bssid_fit:1; /* 0:HW handle beacon, 1:ignore */
|
||||||
|
u8 txbcn_rpt:1; /* Enable TXBCN report in ad hoc and AP mode */
|
||||||
|
u8 tsf_update:1; /* Update TSF when beacon or probe response */
|
||||||
|
u8 enable_bcn:1; /* Enable beacon related functions */
|
||||||
|
u8 rxbcn_rpt:1; /* Enable RXBCNOK report */
|
||||||
|
u8 p2p_ctwin:1; /* Enable P2P CTN WINDOWS function */
|
||||||
|
u8 p2p_bcn_area:1; /* Enable P2P BCN area on function */
|
||||||
|
};
|
||||||
|
|
||||||
|
extern struct halmac_platform_api rtw_halmac_platform_api;
|
||||||
|
|
||||||
|
/* HALMAC API for Driver(HAL) */
|
||||||
|
u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
|
||||||
|
u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
|
||||||
|
u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
|
||||||
|
void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
|
||||||
|
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||||
|
u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr);
|
||||||
|
u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr);
|
||||||
|
u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr);
|
||||||
|
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||||
|
int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
|
||||||
|
int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
|
||||||
|
int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
|
||||||
|
|
||||||
|
/* Software Information */
|
||||||
|
void rtw_halmac_get_version(char *str, u32 len);
|
||||||
|
|
||||||
|
/* Software setting before Initialization */
|
||||||
|
int rtw_halmac_preinit_sdio_io_indirect(struct dvobj_priv *d, bool enable);
|
||||||
|
|
||||||
|
/* Software Initialization */
|
||||||
|
int rtw_halmac_init_adapter(struct dvobj_priv *d, struct halmac_platform_api *pf_api);
|
||||||
|
int rtw_halmac_deinit_adapter(struct dvobj_priv *);
|
||||||
|
|
||||||
|
/* Get operations */
|
||||||
|
int rtw_halmac_get_hw_value(struct dvobj_priv *d, enum halmac_hw_id hw_id, void *pvalue);
|
||||||
|
int rtw_halmac_get_tx_fifo_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_rx_fifo_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *d, u16 *bndy);
|
||||||
|
int rtw_halmac_get_page_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_tx_agg_align_size(struct dvobj_priv *d, u16 *size);
|
||||||
|
int rtw_halmac_get_rx_agg_align_size(struct dvobj_priv *d, u8 *size);
|
||||||
|
int rtw_halmac_get_rx_drv_info_sz(struct dvobj_priv *, u8 *sz);
|
||||||
|
int rtw_halmac_get_tx_desc_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_rx_desc_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_tx_dma_ch_map(struct dvobj_priv *d, u8 *dma_ch_map, u8 map_size);
|
||||||
|
int rtw_halmac_get_ori_h2c_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_oqt_size(struct dvobj_priv *d, u8 *size);
|
||||||
|
int rtw_halmac_get_ac_queue_number(struct dvobj_priv *d, u8 *num);
|
||||||
|
int rtw_halmac_get_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
|
||||||
|
int rtw_halmac_get_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 *type);
|
||||||
|
int rtw_halmac_get_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl);
|
||||||
|
/*int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);*/
|
||||||
|
|
||||||
|
/* Set operations */
|
||||||
|
int rtw_halmac_config_rx_info(struct dvobj_priv *d, enum halmac_drv_info info);
|
||||||
|
int rtw_halmac_set_max_dl_fw_size(struct dvobj_priv *d, u32 size);
|
||||||
|
int rtw_halmac_set_mac_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
|
||||||
|
int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
|
||||||
|
int rtw_halmac_set_tx_address(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
|
||||||
|
int rtw_halmac_set_network_type(struct dvobj_priv *d, enum _hw_port hwport, u8 type);
|
||||||
|
int rtw_halmac_reset_tsf(struct dvobj_priv *d, enum _hw_port hwport);
|
||||||
|
int rtw_halmac_set_bcn_interval(struct dvobj_priv *d, enum _hw_port hwport, u32 space);
|
||||||
|
int rtw_halmac_set_bcn_ctrl(struct dvobj_priv *d, enum _hw_port hwport, struct rtw_halmac_bcn_ctrl *bcn_ctrl);
|
||||||
|
int rtw_halmac_set_aid(struct dvobj_priv *d, enum _hw_port hwport, u16 aid);
|
||||||
|
int rtw_halmac_set_bandwidth(struct dvobj_priv *d, u8 channel, u8 pri_ch_idx, u8 bw);
|
||||||
|
int rtw_halmac_set_edca(struct dvobj_priv *d, u8 queue, u8 aifs, u8 cw, u16 txop);
|
||||||
|
int rtw_halmac_set_rts_full_bw(struct dvobj_priv *d, u8 enable);
|
||||||
|
|
||||||
|
/* Functions */
|
||||||
|
int rtw_halmac_poweron(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_poweroff(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_init_hal(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
|
||||||
|
int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
|
||||||
|
int rtw_halmac_deinit_hal(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_self_verify(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_txfifo_wait_empty(struct dvobj_priv *d, u32 timeout);
|
||||||
|
int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
|
||||||
|
int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
|
||||||
|
int rtw_halmac_dlfw_mem(struct dvobj_priv *d, u8 *fw, u32 fwsize, enum fw_mem mem);
|
||||||
|
int rtw_halmac_dlfw_mem_from_file(struct dvobj_priv *d, u8 *fwpath, enum fw_mem mem);
|
||||||
|
int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
|
||||||
|
int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
|
||||||
|
int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
|
||||||
|
|
||||||
|
/* eFuse */
|
||||||
|
int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size);
|
||||||
|
int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
|
||||||
|
int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
|
||||||
|
int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||||
|
int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||||
|
int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
|
||||||
|
int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
|
||||||
|
int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
|
||||||
|
int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||||
|
int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||||
|
|
||||||
|
int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||||
|
int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
|
||||||
|
|
||||||
|
int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer);
|
||||||
|
int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
|
||||||
|
|
||||||
|
/* Specific function APIs*/
|
||||||
|
int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
|
||||||
|
int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
|
||||||
|
int rtw_halmac_p2pps(struct dvobj_priv *dvobj, PHAL_P2P_PS_PARA pp2p_ps_para);
|
||||||
|
int rtw_halmac_iqk(struct dvobj_priv *d, u8 clear, u8 segment);
|
||||||
|
int rtw_halmac_dpk(struct dvobj_priv *d, u8 *buf, u32 bufsz);
|
||||||
|
int rtw_halmac_cfg_phy_para(struct dvobj_priv *d, struct rtw_phy_parameter *para);
|
||||||
|
int rtw_halmac_led_cfg(struct dvobj_priv *d, u8 enable, u8 mode);
|
||||||
|
void rtw_halmac_led_switch(struct dvobj_priv *d, u8 on);
|
||||||
|
int rtw_halmac_bt_wake_cfg(struct dvobj_priv *d, u8 enable);
|
||||||
|
int rtw_halmac_rfe_ctrl_cfg(struct dvobj_priv *d, u8 gpio);
|
||||||
|
#ifdef CONFIG_PNO_SUPPORT
|
||||||
|
int rtw_halmac_pno_scanoffload(struct dvobj_priv *d, u32 enable);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_SDIO_HCI
|
||||||
|
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
|
||||||
|
int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
|
||||||
|
u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
|
||||||
|
int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
|
||||||
|
u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
|
||||||
|
int rtw_halmac_sdio_set_tx_format(struct dvobj_priv *d, enum halmac_sdio_tx_format format);
|
||||||
|
#endif /* CONFIG_SDIO_HCI */
|
||||||
|
|
||||||
|
#ifdef CONFIG_USB_HCI
|
||||||
|
u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
|
||||||
|
int rtw_halmac_usb_get_txagg_desc_num(struct dvobj_priv *d, u8 *num);
|
||||||
|
u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
|
||||||
|
#endif /* CONFIG_USB_HCI */
|
||||||
|
|
||||||
|
#ifdef CONFIG_SUPPORT_TRX_SHARED
|
||||||
|
void dump_trx_share_mode(void *sel, _adapter *adapter);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_BEAMFORMING
|
||||||
|
#ifdef RTW_BEAMFORMING_VERSION_2
|
||||||
|
int rtw_halmac_bf_add_mu_bfer(struct dvobj_priv *d, u16 paid, u16 csi_para,
|
||||||
|
u16 my_aid, enum halmac_csi_seg_len sel, u8 *addr);
|
||||||
|
int rtw_halmac_bf_del_mu_bfer(struct dvobj_priv *d);
|
||||||
|
|
||||||
|
int rtw_halmac_bf_cfg_sounding(struct dvobj_priv *d, enum halmac_snd_role role,
|
||||||
|
enum halmac_data_rate rate);
|
||||||
|
int rtw_halmac_bf_del_sounding(struct dvobj_priv *d, enum halmac_snd_role role);
|
||||||
|
|
||||||
|
int rtw_halmac_bf_cfg_csi_rate(struct dvobj_priv *d, u8 rssi, u8 current_rate,
|
||||||
|
u8 fixrate_en, u8 *new_rate, u8 *bmp_ofdm54);
|
||||||
|
|
||||||
|
int rtw_halmac_bf_cfg_mu_mimo(struct dvobj_priv *d, enum halmac_snd_role role,
|
||||||
|
u8 *sounding_sts, u16 grouping_bitmap, u8 mu_tx_en,
|
||||||
|
u32 *given_gid_tab, u32 *given_user_pos);
|
||||||
|
#define rtw_halmac_bf_cfg_mu_bfee(d, gid_tab, user_pos) \
|
||||||
|
rtw_halmac_bf_cfg_mu_mimo(d, HAL_BFEE, NULL, 0, 0, gid_tab, user_pos)
|
||||||
|
|
||||||
|
#endif /* RTW_BEAMFORMING_VERSION_2 */
|
||||||
|
#endif /* CONFIG_BEAMFORMING */
|
||||||
|
|
||||||
|
#endif /* _HAL_HALMAC_H_ */
|
||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,257 @@
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* Copyright(c) 2007 - 2017 Realtek Corporation.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify it
|
||||||
|
* under the terms of version 2 of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||||
|
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||||
|
* more details.
|
||||||
|
*
|
||||||
|
*****************************************************************************/
|
||||||
|
#define _HAL_PHY_C_
|
||||||
|
|
||||||
|
#include <drv_types.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Function: PHY_CalculateBitShift
|
||||||
|
*
|
||||||
|
* OverView: Get shifted position of the BitMask
|
||||||
|
*
|
||||||
|
* Input:
|
||||||
|
* u32 BitMask,
|
||||||
|
*
|
||||||
|
* Output: none
|
||||||
|
* Return: u32 Return the shift bit bit position of the mask
|
||||||
|
*/
|
||||||
|
u32
|
||||||
|
PHY_CalculateBitShift(
|
||||||
|
u32 BitMask
|
||||||
|
)
|
||||||
|
{
|
||||||
|
u32 i;
|
||||||
|
|
||||||
|
for (i = 0; i <= 31; i++) {
|
||||||
|
if (((BitMask >> i) & 0x1) == 1)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef CONFIG_RF_SHADOW_RW
|
||||||
|
/* ********************************************************************************
|
||||||
|
* Constant.
|
||||||
|
* ********************************************************************************
|
||||||
|
* 2008/11/20 MH For Debug only, RF */
|
||||||
|
static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ==> RF shadow Operation API Code Section!!!
|
||||||
|
*
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* Function: PHY_RFShadowRead
|
||||||
|
* PHY_RFShadowWrite
|
||||||
|
* PHY_RFShadowCompare
|
||||||
|
* PHY_RFShadowRecorver
|
||||||
|
* PHY_RFShadowCompareAll
|
||||||
|
* PHY_RFShadowRecorverAll
|
||||||
|
* PHY_RFShadowCompareFlagSet
|
||||||
|
* PHY_RFShadowRecorverFlagSet
|
||||||
|
*
|
||||||
|
* Overview: When we set RF register, we must write shadow at first.
|
||||||
|
* When we are running, we must compare shadow abd locate error addr.
|
||||||
|
* Decide to recorver or not.
|
||||||
|
*
|
||||||
|
* Input: NONE
|
||||||
|
*
|
||||||
|
* Output: NONE
|
||||||
|
*
|
||||||
|
* Return: NONE
|
||||||
|
*
|
||||||
|
* Revised History:
|
||||||
|
* When Who Remark
|
||||||
|
* 11/20/2008 MHC Create Version 0.
|
||||||
|
*
|
||||||
|
*---------------------------------------------------------------------------*/
|
||||||
|
u32
|
||||||
|
PHY_RFShadowRead(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset)
|
||||||
|
{
|
||||||
|
return RF_Shadow[eRFPath][Offset].Value;
|
||||||
|
|
||||||
|
} /* PHY_RFShadowRead */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowWrite(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset,
|
||||||
|
u32 Data)
|
||||||
|
{
|
||||||
|
RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
|
||||||
|
RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
|
||||||
|
|
||||||
|
} /* PHY_RFShadowWrite */
|
||||||
|
|
||||||
|
|
||||||
|
BOOLEAN
|
||||||
|
PHY_RFShadowCompare(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset)
|
||||||
|
{
|
||||||
|
u32 reg;
|
||||||
|
/* Check if we need to check the register */
|
||||||
|
if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) {
|
||||||
|
reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
|
||||||
|
/* Compare shadow and real rf register for 20bits!! */
|
||||||
|
if (RF_Shadow[eRFPath][Offset].Value != reg) {
|
||||||
|
/* Locate error position. */
|
||||||
|
RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
|
||||||
|
}
|
||||||
|
return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
|
||||||
|
}
|
||||||
|
return _FALSE;
|
||||||
|
} /* PHY_RFShadowCompare */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowRecorver(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset)
|
||||||
|
{
|
||||||
|
/* Check if the address is error */
|
||||||
|
if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) {
|
||||||
|
/* Check if we need to recorver the register. */
|
||||||
|
if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) {
|
||||||
|
rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask,
|
||||||
|
RF_Shadow[eRFPath][Offset].Value);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowRecorver */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowCompareAll(
|
||||||
|
PADAPTER Adapter)
|
||||||
|
{
|
||||||
|
enum rf_path eRFPath = RF_PATH_A;
|
||||||
|
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||||
|
|
||||||
|
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||||
|
for (Offset = 0; Offset < maxReg; Offset++)
|
||||||
|
PHY_RFShadowCompare(Adapter, eRFPath, Offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowCompareAll */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowRecorverAll(
|
||||||
|
PADAPTER Adapter)
|
||||||
|
{
|
||||||
|
enum rf_path eRFPath = RF_PATH_A;
|
||||||
|
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||||
|
|
||||||
|
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||||
|
for (Offset = 0; Offset < maxReg; Offset++)
|
||||||
|
PHY_RFShadowRecorver(Adapter, eRFPath, Offset);
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowRecorverAll */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowCompareFlagSet(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset,
|
||||||
|
u8 Type)
|
||||||
|
{
|
||||||
|
/* Set True or False!!! */
|
||||||
|
RF_Shadow[eRFPath][Offset].Compare = Type;
|
||||||
|
|
||||||
|
} /* PHY_RFShadowCompareFlagSet */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowRecorverFlagSet(
|
||||||
|
PADAPTER Adapter,
|
||||||
|
enum rf_path eRFPath,
|
||||||
|
u32 Offset,
|
||||||
|
u8 Type)
|
||||||
|
{
|
||||||
|
/* Set True or False!!! */
|
||||||
|
RF_Shadow[eRFPath][Offset].Recorver = Type;
|
||||||
|
|
||||||
|
} /* PHY_RFShadowRecorverFlagSet */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowCompareFlagSetAll(
|
||||||
|
PADAPTER Adapter)
|
||||||
|
{
|
||||||
|
enum rf_path eRFPath = RF_PATH_A;
|
||||||
|
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||||
|
|
||||||
|
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||||
|
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||||
|
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
|
||||||
|
if (Offset != 0x26 && Offset != 0x27)
|
||||||
|
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE);
|
||||||
|
else
|
||||||
|
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowCompareFlagSetAll */
|
||||||
|
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowRecorverFlagSetAll(
|
||||||
|
PADAPTER Adapter)
|
||||||
|
{
|
||||||
|
enum rf_path eRFPath = RF_PATH_A;
|
||||||
|
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||||
|
|
||||||
|
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||||
|
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||||
|
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
|
||||||
|
if (Offset != 0x26 && Offset != 0x27)
|
||||||
|
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE);
|
||||||
|
else
|
||||||
|
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowCompareFlagSetAll */
|
||||||
|
|
||||||
|
void
|
||||||
|
PHY_RFShadowRefresh(
|
||||||
|
PADAPTER Adapter)
|
||||||
|
{
|
||||||
|
enum rf_path eRFPath = RF_PATH_A;
|
||||||
|
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||||
|
|
||||||
|
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||||
|
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||||
|
RF_Shadow[eRFPath][Offset].Value = 0;
|
||||||
|
RF_Shadow[eRFPath][Offset].Compare = _FALSE;
|
||||||
|
RF_Shadow[eRFPath][Offset].Recorver = _FALSE;
|
||||||
|
RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
|
||||||
|
RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
} /* PHY_RFShadowRead */
|
||||||
|
#endif /*CONFIG_RF_SHADOW_RW*/
|
||||||
Loading…
Reference in New Issue