diff --git a/hal/efuse/efuse_mask.h b/hal/efuse/efuse_mask.h new file mode 100644 index 0000000..dc4fdce --- /dev/null +++ b/hal/efuse/efuse_mask.h @@ -0,0 +1,188 @@ +/****************************************************************************** + * + * Copyright(c) 2016 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#ifdef CONFIG_USB_HCI + + #if defined(CONFIG_RTL8188E) + #include "rtl8188e/HalEfuseMask8188E_USB.h" + #endif + + #if defined(CONFIG_RTL8812A) + #include "rtl8812a/HalEfuseMask8812A_USB.h" + #endif + + #if defined(CONFIG_RTL8821A) + #include "rtl8812a/HalEfuseMask8821A_USB.h" + #endif + + #if defined(CONFIG_RTL8192E) + #include "rtl8192e/HalEfuseMask8192E_USB.h" + #endif + + #if defined(CONFIG_RTL8723B) + #include "rtl8723b/HalEfuseMask8723B_USB.h" + #endif + + #if defined(CONFIG_RTL8814A) + #include "rtl8814a/HalEfuseMask8814A_USB.h" + #endif + + #if defined(CONFIG_RTL8703B) + #include "rtl8703b/HalEfuseMask8703B_USB.h" + #endif + + #if defined(CONFIG_RTL8723D) + #include "rtl8723d/HalEfuseMask8723D_USB.h" + #endif + + #if defined(CONFIG_RTL8188F) + #include "rtl8188f/HalEfuseMask8188F_USB.h" + #endif + + #if defined(CONFIG_RTL8188GTV) + #include "rtl8188gtv/HalEfuseMask8188GTV_USB.h" + #endif + + #if defined(CONFIG_RTL8822B) + #include "rtl8822b/HalEfuseMask8822B_USB.h" + #endif + + #if defined(CONFIG_RTL8821C) + #include "rtl8821c/HalEfuseMask8821C_USB.h" + #endif + + #if defined(CONFIG_RTL8710B) + #include "rtl8710b/HalEfuseMask8710B_USB.h" + #endif + + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_USB.h" + #endif + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_USB.h" + #endif + #if defined(CONFIG_RTL8814B) + #include "rtl8814b/HalEfuseMask8814B_USB.h" + #endif + + #if defined(CONFIG_RTL8723F) + #include "rtl8723f/HalEfuseMask8723F_USB.h" + #endif +#endif /*CONFIG_USB_HCI*/ + +#ifdef CONFIG_PCI_HCI + + #if defined(CONFIG_RTL8188E) + #include "rtl8188e/HalEfuseMask8188E_PCIE.h" + #endif + + #if defined(CONFIG_RTL8812A) + #include "rtl8812a/HalEfuseMask8812A_PCIE.h" + #endif + + #if defined(CONFIG_RTL8821A) + #include "rtl8812a/HalEfuseMask8821A_PCIE.h" + #endif + + #if defined(CONFIG_RTL8192E) + #include "rtl8192e/HalEfuseMask8192E_PCIE.h" + #endif + + #if defined(CONFIG_RTL8723B) + #include "rtl8723b/HalEfuseMask8723B_PCIE.h" + #endif + + #if defined(CONFIG_RTL8814A) + #include "rtl8814a/HalEfuseMask8814A_PCIE.h" + #endif + + #if defined(CONFIG_RTL8703B) + #include "rtl8703b/HalEfuseMask8703B_PCIE.h" + #endif + + #if defined(CONFIG_RTL8822B) + #include "rtl8822b/HalEfuseMask8822B_PCIE.h" + #endif + #if defined(CONFIG_RTL8723D) + #include "rtl8723d/HalEfuseMask8723D_PCIE.h" + #endif + #if defined(CONFIG_RTL8821C) + #include "rtl8821c/HalEfuseMask8821C_PCIE.h" + #endif + + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_PCIE.h" + #endif + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_PCIE.h" + #endif + #if defined(CONFIG_RTL8814B) + #include "rtl8814b/HalEfuseMask8814B_PCIE.h" + #endif +#endif /*CONFIG_PCI_HCI*/ +#ifdef CONFIG_SDIO_HCI + #if defined(CONFIG_RTL8723B) + #include "rtl8723b/HalEfuseMask8723B_SDIO.h" + #endif + + #if defined(CONFIG_RTL8188E) + #include "rtl8188e/HalEfuseMask8188E_SDIO.h" + #endif + + #if defined(CONFIG_RTL8703B) + #include "rtl8703b/HalEfuseMask8703B_SDIO.h" + #endif + + #if defined(CONFIG_RTL8188F) + #include "rtl8188f/HalEfuseMask8188F_SDIO.h" + #endif + + #if defined(CONFIG_RTL8188GTV) + #include "rtl8188gtv/HalEfuseMask8188GTV_SDIO.h" + #endif + + #if defined(CONFIG_RTL8723D) + #include "rtl8723d/HalEfuseMask8723D_SDIO.h" + #endif + + #if defined(CONFIG_RTL8192E) + #include "rtl8192e/HalEfuseMask8192E_SDIO.h" + #endif + + #if defined(CONFIG_RTL8821A) + #include "rtl8812a/HalEfuseMask8821A_SDIO.h" + #endif + + #if defined(CONFIG_RTL8821C) + #include "rtl8821c/HalEfuseMask8821C_SDIO.h" + #endif + + #if defined(CONFIG_RTL8822B) + #include "rtl8822b/HalEfuseMask8822B_SDIO.h" + #endif + + #if defined(CONFIG_RTL8192F) + #include "rtl8192f/HalEfuseMask8192F_SDIO.h" + #endif + + + #if defined(CONFIG_RTL8822C) + #include "rtl8822c/HalEfuseMask8822C_SDIO.h" + #endif + + #if defined(CONFIG_RTL8723F) + #include "rtl8723f/HalEfuseMask8723F_SDIO.h" + #endif +#endif /*CONFIG_SDIO_HCI*/ diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c new file mode 100644 index 0000000..db4323a --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.c @@ -0,0 +1,96 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* #include "Mp_Precomp.h" */ +/* #include "../odm_precomp.h" */ + +#include + +#include "HalEfuseMask8188E_PCIE.h" + + + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + +u8 Array_MP_8188E_MPCIE[] = { + 0xFF, + 0xF3, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x0F, + 0xF3, + 0xFF, + 0xFF, + 0x70, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u16 +EFUSE_GetArrayLen_MP_8188E_MPCIE(void) +{ + return sizeof(Array_MP_8188E_MPCIE) / sizeof(u8); +} + +void +EFUSE_GetMaskArray_MP_8188E_MPCIE( + u8 *Array +) +{ + u16 len = EFUSE_GetArrayLen_MP_8188E_MPCIE(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8188E_MPCIE[i]; +} +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MPCIE( + u16 Offset +) +{ + int r = Offset / 16; + int c = (Offset % 16) / 2; + int result = 0; + + if (c < 4) /* Upper double word */ + result = (Array_MP_8188E_MPCIE[r] & (0x10 << c)); + else + result = (Array_MP_8188E_MPCIE[r] & (0x01 << (c - 4))); + + return (result > 0) ? 0 : 1; +} diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h new file mode 100644 index 0000000..72eb440 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_PCIE.h @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + + + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + + +u16 +EFUSE_GetArrayLen_MP_8188E_MPCIE(void); + +void +EFUSE_GetMaskArray_MP_8188E_MPCIE( + u8 *Array +); + +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MPCIE(/* TC: Test Chip, MP: MP Chip */ + u16 Offset +); diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c new file mode 100644 index 0000000..48e258e --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.c @@ -0,0 +1,96 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* #include "Mp_Precomp.h" */ +/* #include "../odm_precomp.h" */ + +#include + +#include "HalEfuseMask8188E_SDIO.h" + + + +/****************************************************************************** +* MSDIO.TXT +******************************************************************************/ + +u8 Array_MP_8188E_MSDIO[] = { + 0xFF, + 0xF3, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x0F, + 0xF3, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u16 +EFUSE_GetArrayLen_MP_8188E_MSDIO(void) +{ + return sizeof(Array_MP_8188E_MSDIO) / sizeof(u8); +} + +void +EFUSE_GetMaskArray_MP_8188E_MSDIO( + u8 *Array +) +{ + u16 len = EFUSE_GetArrayLen_MP_8188E_MSDIO(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8188E_MSDIO[i]; +} +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MSDIO( + u16 Offset +) +{ + int r = Offset / 16; + int c = (Offset % 16) / 2; + int result = 0; + + if (c < 4) /* Upper double word */ + result = (Array_MP_8188E_MSDIO[r] & (0x10 << c)); + else + result = (Array_MP_8188E_MSDIO[r] & (0x01 << (c - 4))); + + return (result > 0) ? 0 : 1; +} diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h new file mode 100644 index 0000000..177b214 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_SDIO.h @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + + + +/****************************************************************************** +* MSDIO.TXT +******************************************************************************/ + + +u16 +EFUSE_GetArrayLen_MP_8188E_MSDIO(void); + +void +EFUSE_GetMaskArray_MP_8188E_MSDIO( + u8 *Array +); + +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MSDIO(/* TC: Test Chip, MP: MP Chip */ + u16 Offset +); diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c new file mode 100644 index 0000000..22250db --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.c @@ -0,0 +1,95 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* #include "Mp_Precomp.h" */ +/* #include "../odm_precomp.h" */ + +#include + +#include "HalEfuseMask8188E_USB.h" + + +/****************************************************************************** +* MUSB.TXT +******************************************************************************/ + +u8 Array_MP_8188E_MUSB[] = { + 0xFF, + 0xF3, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x0F, + 0xF3, + 0xFF, + 0xFF, + 0xFF, + 0x00, + 0x00, + 0x00, + 0xF7, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u16 +EFUSE_GetArrayLen_MP_8188E_MUSB(void) +{ + return sizeof(Array_MP_8188E_MUSB) / sizeof(u8); +} + +void +EFUSE_GetMaskArray_MP_8188E_MUSB( + u8 *Array +) +{ + u16 len = EFUSE_GetArrayLen_MP_8188E_MUSB(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8188E_MUSB[i]; +} +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MUSB( + u16 Offset +) +{ + int r = Offset / 16; + int c = (Offset % 16) / 2; + int result = 0; + + if (c < 4) /* Upper double word */ + result = (Array_MP_8188E_MUSB[r] & (0x10 << c)); + else + result = (Array_MP_8188E_MUSB[r] & (0x01 << (c - 4))); + + return (result > 0) ? 0 : 1; +} diff --git a/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h new file mode 100644 index 0000000..5fbe660 --- /dev/null +++ b/hal/efuse/rtl8188e/HalEfuseMask8188E_USB.h @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + + + +/****************************************************************************** +* MUSB.TXT +******************************************************************************/ + + +u16 +EFUSE_GetArrayLen_MP_8188E_MUSB(void); + +void +EFUSE_GetMaskArray_MP_8188E_MUSB( + u8 *Array +); + +BOOLEAN +EFUSE_IsAddressMasked_MP_8188E_MUSB(/* TC: Test Chip, MP: MP Chip */ + u16 Offset +); diff --git a/hal/hal_hci/hal_usb.c b/hal/hal_hci/hal_usb.c new file mode 100644 index 0000000..609616b --- /dev/null +++ b/hal/hal_hci/hal_usb.c @@ -0,0 +1,568 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HAL_USB_C_ + +#include +#include + +int usb_init_recv_priv(_adapter *padapter, u16 ini_in_buf_sz) +{ + struct registry_priv *regsty = adapter_to_regsty(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + int i, res = _SUCCESS; + struct recv_buf *precvbuf; + +#ifdef PLATFORM_LINUX + tasklet_init(&precvpriv->recv_tasklet, + (void(*)(unsigned long))usb_recv_tasklet, + (unsigned long)padapter); +#endif /* PLATFORM_LINUX */ + +#ifdef PLATFORM_FREEBSD +#ifdef CONFIG_RX_INDICATE_QUEUE + TASK_INIT(&precvpriv->rx_indicate_tasklet, 0, rtw_rx_indicate_tasklet, padapter); +#endif /* CONFIG_RX_INDICATE_QUEUE */ +#endif /* PLATFORM_FREEBSD */ + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +#ifdef PLATFORM_LINUX + precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); + if (precvpriv->int_in_urb == NULL) { + res = _FAIL; + RTW_INFO("alloc_urb for interrupt in endpoint fail !!!!\n"); + goto exit; + } +#endif /* PLATFORM_LINUX */ + precvpriv->int_in_buf = rtw_zmalloc(ini_in_buf_sz); + if (precvpriv->int_in_buf == NULL) { + res = _FAIL; + RTW_INFO("alloc_mem for interrupt in endpoint fail !!!!\n"); + goto exit; + } +#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */ + + /* init recv_buf */ + _rtw_init_queue(&precvpriv->free_recv_buf_queue); + _rtw_init_queue(&precvpriv->recv_buf_pending_queue); +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_RX + /* this is used only when RX_IOBUF is sk_buff */ + skb_queue_head_init(&precvpriv->free_recv_skb_queue); +#endif + + RTW_INFO("NR_RECVBUFF: %d, recvbuf_nr: %d\n", NR_RECVBUFF, regsty->recvbuf_nr); + RTW_INFO("MAX_RECVBUF_SZ: %d\n", MAX_RECVBUF_SZ); + precvpriv->pallocated_recv_buf = rtw_zmalloc(regsty->recvbuf_nr * sizeof(struct recv_buf) + 4); + if (precvpriv->pallocated_recv_buf == NULL) { + res = _FAIL; + goto exit; + } + + precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); + + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + + for (i = 0; i < regsty->recvbuf_nr ; i++) { + _rtw_init_listhead(&precvbuf->list); + +#ifdef PLATFORM_WINDOWS + _rtw_spinlock_init(&precvbuf->recvbuf_lock); +#endif + + precvbuf->alloc_sz = MAX_RECVBUF_SZ; + + res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf, precvbuf->alloc_sz); + if (res == _FAIL) + break; + + precvbuf->ref_cnt = 0; + precvbuf->adapter = padapter; + + /* rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); */ + + precvbuf++; + } + + precvpriv->free_recv_buf_queue_cnt = regsty->recvbuf_nr; + +#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) + + skb_queue_head_init(&precvpriv->rx_skb_queue); + +#ifdef CONFIG_RX_INDICATE_QUEUE + memset(&precvpriv->rx_indicate_queue, 0, sizeof(struct ifqueue)); + mtx_init(&precvpriv->rx_indicate_queue.ifq_mtx, "rx_indicate_queue", NULL, MTX_DEF); +#endif /* CONFIG_RX_INDICATE_QUEUE */ + +#ifdef CONFIG_PREALLOC_RECV_SKB + { + int i; + SIZE_PTR tmpaddr = 0; + SIZE_PTR alignment = 0; + struct sk_buff *pskb = NULL; + + RTW_INFO("NR_PREALLOC_RECV_SKB: %d\n", NR_PREALLOC_RECV_SKB); +#ifdef CONFIG_FIX_NR_BULKIN_BUFFER + RTW_INFO("Enable CONFIG_FIX_NR_BULKIN_BUFFER\n"); +#endif + + for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) { +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + pskb = rtw_alloc_skb_premem(MAX_RECVBUF_SZ); +#else + pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); +#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ + + if (pskb) { +#ifdef PLATFORM_FREEBSD + pskb->dev = padapter->pifp; +#else + pskb->dev = padapter->pnetdev; +#endif /* PLATFORM_FREEBSD */ + +#ifndef CONFIG_PREALLOC_RX_SKB_BUFFER + tmpaddr = (SIZE_PTR)pskb->data; + alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1); + skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); +#endif + skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); + } + } + } +#endif /* CONFIG_PREALLOC_RECV_SKB */ + +#endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */ + +exit: + + return res; +} + +void usb_free_recv_priv(_adapter *padapter, u16 ini_in_buf_sz) +{ + int i; + struct registry_priv *regsty = &padapter->registrypriv; + struct recv_buf *precvbuf; + struct recv_priv *precvpriv = &padapter->recvpriv; + + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + + for (i = 0; i < regsty->recvbuf_nr ; i++) { + rtw_os_recvbuf_resource_free(padapter, precvbuf); + precvbuf++; + } + + if (precvpriv->pallocated_recv_buf) + rtw_mfree(precvpriv->pallocated_recv_buf, regsty->recvbuf_nr * sizeof(struct recv_buf) + 4); + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE +#ifdef PLATFORM_LINUX + if (precvpriv->int_in_urb) + usb_free_urb(precvpriv->int_in_urb); +#endif + if (precvpriv->int_in_buf) + rtw_mfree(precvpriv->int_in_buf, ini_in_buf_sz); +#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */ + +#ifdef PLATFORM_LINUX + + if (skb_queue_len(&precvpriv->rx_skb_queue)) + RTW_WARN("rx_skb_queue not empty\n"); + + rtw_skb_queue_purge(&precvpriv->rx_skb_queue); + + if (skb_queue_len(&precvpriv->free_recv_skb_queue)) + RTW_WARN("free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); + +#if !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX) +#if defined(CONFIG_PREALLOC_RECV_SKB) && defined(CONFIG_PREALLOC_RX_SKB_BUFFER) + { + struct sk_buff *skb; + + while ((skb = skb_dequeue(&precvpriv->free_recv_skb_queue)) != NULL) { + if (rtw_free_skb_premem(skb) != 0) + rtw_skb_free(skb); + } + } +#else + rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); +#endif /* defined(CONFIG_PREALLOC_RX_SKB_BUFFER) && defined(CONFIG_PREALLOC_RECV_SKB) */ +#endif /* !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX) */ + +#endif /* PLATFORM_LINUX */ + +#ifdef PLATFORM_FREEBSD + struct sk_buff *pskb; + while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) + rtw_skb_free(pskb); + +#if !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX) + rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue); +#endif + +#ifdef CONFIG_RX_INDICATE_QUEUE + struct mbuf *m; + for (;;) { + IF_DEQUEUE(&precvpriv->rx_indicate_queue, m); + if (m == NULL) + break; + rtw_os_pkt_free(m); + } + mtx_destroy(&precvpriv->rx_indicate_queue.ifq_mtx); +#endif /* CONFIG_RX_INDICATE_QUEUE */ + +#endif /* PLATFORM_FREEBSD */ +} + +#ifdef CONFIG_FW_C2H_REG +void usb_c2h_hisr_hdl(_adapter *adapter, u8 *buf) +{ + u8 *c2h_evt = buf; + u8 id, seq, plen; + u8 *payload; + + if (rtw_hal_c2h_reg_hdr_parse(adapter, buf, &id, &seq, &plen, &payload) != _SUCCESS) + return; + + if (0) + RTW_PRINT("%s C2H == %d\n", __func__, id); + + if (rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload)) { + /* Handle directly */ + rtw_hal_c2h_handler(adapter, id, seq, plen, payload); + + /* Replace with special pointer to trigger c2h_evt_clear only */ + if (rtw_cbuf_push(adapter->evtpriv.c2h_queue, (void*)&adapter->evtpriv) != _SUCCESS) + RTW_ERR("%s rtw_cbuf_push fail\n", __func__); + } else { + c2h_evt = rtw_malloc(C2H_REG_LEN); + if (c2h_evt != NULL) { + _rtw_memcpy(c2h_evt, buf, C2H_REG_LEN); + if (rtw_cbuf_push(adapter->evtpriv.c2h_queue, (void*)c2h_evt) != _SUCCESS) + RTW_ERR("%s rtw_cbuf_push fail\n", __func__); + } else { + /* Error handling for malloc fail */ + if (rtw_cbuf_push(adapter->evtpriv.c2h_queue, (void*)NULL) != _SUCCESS) + RTW_ERR("%s rtw_cbuf_push fail\n", __func__); + } + } + _set_workitem(&adapter->evtpriv.c2h_wk); +} +#endif + +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ +int usb_write_async(struct usb_device *udev, u32 addr, void *pdata, u16 len) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + int ret; + + requesttype = VENDOR_WRITE;/* write_out */ + request = REALTEK_USB_VENQT_CMD_REQ; + index = REALTEK_USB_VENQT_CMD_IDX;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + + ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, pdata, len, requesttype); + + return ret; +} + +int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) +{ + u8 data; + int ret; + struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; + struct usb_device *udev = pdvobjpriv->pusbdev; + + data = val; + ret = usb_write_async(udev, addr, &data, 1); + + return ret; +} + +int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) +{ + u16 data; + int ret; + struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; + struct usb_device *udev = pdvobjpriv->pusbdev; + + data = val; + ret = usb_write_async(udev, addr, &data, 2); + + return ret; +} + +int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) +{ + u32 data; + int ret; + struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; + struct usb_device *udev = pdvobjpriv->pusbdev; + + data = val; + ret = usb_write_async(udev, addr, &data, 4); + + return ret; +} +#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */ + +u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 data = 0; + + + request = 0x05; + requesttype = 0x01;/* read_in */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 1; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return data; +} + +u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u16 data = 0; + + + request = 0x05; + requesttype = 0x01;/* read_in */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 2; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return data; + +} + +u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u32 data = 0; + + + request = 0x05; + requesttype = 0x01;/* read_in */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 4; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return data; +} + +int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 data; + int ret; + + + request = 0x05; + requesttype = 0x00;/* write_out */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 1; + data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return ret; +} + +int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u16 data; + int ret; + + + request = 0x05; + requesttype = 0x00;/* write_out */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 2; + data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return ret; + +} + +int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u32 data; + int ret; + + + request = 0x05; + requesttype = 0x00;/* write_out */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = 4; + data = val; + +/* WLANON PAGE0_REG needs to add an offset 0x8000 */ +#if defined(CONFIG_RTL8710B) + if(wvalue >= 0x0000 && wvalue < 0x0100) + wvalue |= 0x8000; +#endif + + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, + &data, len, requesttype); + + + return ret; + +} + +int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) +{ + u8 request; + u8 requesttype; + u16 wvalue; + u16 index; + u16 len; + u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0}; + int ret; + + + request = 0x05; + requesttype = 0x00;/* write_out */ + index = 0;/* n/a */ + + wvalue = (u16)(addr & 0x0000ffff); + len = length; + _rtw_memcpy(buf, pdata, len); + ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, + buf, len, requesttype); + + + return ret; +} + +void usb_set_intf_ops(_adapter *padapter, struct _io_ops *pops) +{ + _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); + + pops->_read8 = &usb_read8; + pops->_read16 = &usb_read16; + pops->_read32 = &usb_read32; + pops->_read_mem = &usb_read_mem; + pops->_read_port = &usb_read_port; + + pops->_write8 = &usb_write8; + pops->_write16 = &usb_write16; + pops->_write32 = &usb_write32; + pops->_writeN = &usb_writeN; + +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ + pops->_write8_async = &usb_async_write8; + pops->_write16_async = &usb_async_write16; + pops->_write32_async = &usb_async_write32; +#endif + pops->_write_mem = &usb_write_mem; + pops->_write_port = &usb_write_port; + + pops->_read_port_cancel = &usb_read_port_cancel; + pops->_write_port_cancel = &usb_write_port_cancel; + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + pops->_read_interrupt = &usb_read_interrupt; +#endif + +} diff --git a/hal/led/hal_led.c b/hal/led/hal_led.c new file mode 100644 index 0000000..95d3daa --- /dev/null +++ b/hal/led/hal_led.c @@ -0,0 +1,254 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include +#include + +#ifdef CONFIG_RTW_LED +void dump_led_config(void *sel, _adapter *adapter) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); + struct led_priv *ledpriv = adapter_to_led(adapter); + int i; + + RTW_PRINT_SEL(sel, "strategy:%u\n", ledpriv->LedStrategy); +#ifdef CONFIG_RTW_SW_LED + RTW_PRINT_SEL(sel, "bRegUseLed:%u\n", ledpriv->bRegUseLed); + RTW_PRINT_SEL(sel, "iface_en_mask:0x%02X\n", ledpriv->iface_en_mask); + for (i = 0; i < dvobj->iface_nums; i++) + RTW_PRINT_SEL(sel, "ctl_en_mask[%d]:0x%08X\n", i, ledpriv->ctl_en_mask[i]); +#endif +} + +void rtw_led_set_strategy(_adapter *adapter, u8 strategy) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + _adapter *pri_adapter = GET_PRIMARY_ADAPTER(adapter); + +#ifndef CONFIG_RTW_SW_LED + if (IS_SW_LED_STRATEGY(strategy)) { + RTW_WARN("CONFIG_RTW_SW_LED is not defined\n"); + return; + } +#endif + +#ifdef CONFIG_RTW_SW_LED + if (!ledpriv->bRegUseLed) + return; +#endif + + if (ledpriv->LedStrategy == strategy) + return; + + if (IS_HW_LED_STRATEGY(strategy) || IS_HW_LED_STRATEGY(ledpriv->LedStrategy)) { + RTW_WARN("switching on/off HW_LED strategy is not supported\n"); + return; + } + + ledpriv->LedStrategy = strategy; + +#ifdef CONFIG_RTW_SW_LED + rtw_hal_sw_led_deinit(pri_adapter); +#endif + + rtw_led_control(pri_adapter, RTW_LED_OFF); +} + +#ifdef CONFIG_RTW_SW_LED +#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY +void rtw_sw_led_blink_uc_trx_only(LED_DATA *led) +{ + _adapter *adapter = led->padapter; + BOOLEAN bStopBlinking = _FALSE; + + if (led->BlinkingLedState == RTW_LED_ON) + SwLedOn(adapter, led); + else + SwLedOff(adapter, led); + + switch (led->CurrLedState) { + case RTW_LED_ON: + SwLedOn(adapter, led); + break; + + case RTW_LED_OFF: + SwLedOff(adapter, led); + break; + + case LED_BLINK_TXRX: + led->BlinkTimes--; + if (led->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (adapter_to_pwrctl(adapter)->rf_pwrstate != rf_on + && adapter_to_pwrctl(adapter)->rfoff_reason > RF_CHANGE_BY_PS + ) { + SwLedOff(adapter, led); + led->bLedBlinkInProgress = _FALSE; + } else { + if (led->bLedOn) + led->BlinkingLedState = RTW_LED_OFF; + else + led->BlinkingLedState = RTW_LED_ON; + + if (bStopBlinking) { + led->CurrLedState = RTW_LED_OFF; + led->bLedBlinkInProgress = _FALSE; + } + _set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + default: + break; + } +} + +void rtw_sw_led_ctl_mode_uc_trx_only(_adapter *adapter, LED_CTL_MODE ctl) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + LED_DATA *led = &(ledpriv->SwLed0); + LED_DATA *led1 = &(ledpriv->SwLed1); + LED_DATA *led2 = &(ledpriv->SwLed2); + + switch (ctl) { + case LED_CTL_UC_TX: + case LED_CTL_UC_RX: + if (led->bLedBlinkInProgress == _FALSE) { + led->bLedBlinkInProgress = _TRUE; + led->CurrLedState = LED_BLINK_TXRX; + led->BlinkTimes = 2; + if (led->bLedOn) + led->BlinkingLedState = RTW_LED_OFF; + else + led->BlinkingLedState = RTW_LED_ON; + _set_timer(&(led->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_POWER_OFF: + led->CurrLedState = RTW_LED_OFF; + led->BlinkingLedState = RTW_LED_OFF; + + if (led->bLedBlinkInProgress) { + _cancel_timer_ex(&(led->BlinkTimer)); + led->bLedBlinkInProgress = _FALSE; + } + + SwLedOff(adapter, led); + SwLedOff(adapter, led1); + SwLedOff(adapter, led2); + break; + + default: + break; + } +} +#endif /* CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY */ + +void rtw_led_control(_adapter *adapter, LED_CTL_MODE ctl) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + + if (ledpriv->LedControlHandler) { + #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + if (ledpriv->LedStrategy != SW_LED_MODE_UC_TRX_ONLY) { + if (ctl == LED_CTL_UC_TX || ctl == LED_CTL_BMC_TX) { + if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_TX)) + ctl = LED_CTL_TX; /* transform specific TX ctl to general TX ctl */ + } else if (ctl == LED_CTL_UC_RX || ctl == LED_CTL_BMC_RX) { + if (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(LED_CTL_RX)) + ctl = LED_CTL_RX; /* transform specific RX ctl to general RX ctl */ + } + } + #endif + + if ((ledpriv->iface_en_mask & BIT(adapter->iface_id)) + && (ledpriv->ctl_en_mask[adapter->iface_id] & BIT(ctl))) + ledpriv->LedControlHandler(adapter, ctl); + } +} + +void rtw_led_tx_control(_adapter *adapter, const u8 *da) +{ +#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + if (IS_MCAST(da)) + rtw_led_control(adapter, LED_CTL_BMC_TX); + else + rtw_led_control(adapter, LED_CTL_UC_TX); +#else + rtw_led_control(adapter, LED_CTL_TX); +#endif +} + +void rtw_led_rx_control(_adapter *adapter, const u8 *da) +{ +#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + if (IS_MCAST(da)) + rtw_led_control(adapter, LED_CTL_BMC_RX); + else + rtw_led_control(adapter, LED_CTL_UC_RX); +#else + rtw_led_control(adapter, LED_CTL_RX); +#endif +} + +void rtw_led_set_iface_en(_adapter *adapter, u8 en) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + + if (en) + ledpriv->iface_en_mask |= BIT(adapter->iface_id); + else + ledpriv->iface_en_mask &= ~BIT(adapter->iface_id); +} + +void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + + ledpriv->iface_en_mask = mask; +} + +void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask) +{ + struct led_priv *ledpriv = adapter_to_led(adapter); + +#if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + if (ctl_mask & BIT(LED_CTL_TX)) + ctl_mask |= BIT(LED_CTL_UC_TX) | BIT(LED_CTL_BMC_TX); + if (ctl_mask & BIT(LED_CTL_RX)) + ctl_mask |= BIT(LED_CTL_UC_RX) | BIT(LED_CTL_BMC_RX); +#endif + + ledpriv->ctl_en_mask[adapter->iface_id] = ctl_mask; +} + +void rtw_led_set_ctl_en_mask_primary(_adapter *adapter) +{ + rtw_led_set_ctl_en_mask(adapter, 0xFFFFFFFF); +} + +void rtw_led_set_ctl_en_mask_virtual(_adapter *adapter) +{ + rtw_led_set_ctl_en_mask(adapter + , BIT(LED_CTL_POWER_ON) | BIT(LED_CTL_POWER_OFF) + | BIT(LED_CTL_TX) | BIT(LED_CTL_RX) + ); +} +#endif /* CONFIG_RTW_SW_LED */ + +#endif /* CONFIG_RTW_LED */ + diff --git a/hal/led/hal_usb_led.c b/hal/led/hal_usb_led.c new file mode 100644 index 0000000..03eaee6 --- /dev/null +++ b/hal/led/hal_usb_led.c @@ -0,0 +1,4302 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include +#include +#ifdef CONFIG_RTW_SW_LED + +/* + * Description: + * Implementation of LED blinking behavior. + * It toggle off LED and schedule corresponding timer if necessary. + * */ +void +SwLedBlink( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + + /* Determine if we shall change LED state again. */ + pLed->BlinkTimes--; + switch (pLed->CurrLedState) { + + case LED_BLINK_NORMAL: + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + break; + + case LED_BLINK_StartToBlink: + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && check_fwstate(pmlmepriv, WIFI_STATION_STATE)) + bStopBlinking = _TRUE; + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) && + (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE))) + bStopBlinking = _TRUE; + else if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + break; + + case LED_BLINK_WPS: + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + break; + + + default: + bStopBlinking = _TRUE; + break; + + } + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && (pLed->bLedOn == _FALSE)) + SwLedOn(padapter, pLed); + else if ((check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) && pLed->bLedOn == _TRUE) + SwLedOff(padapter, pLed); + + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } else { + /* Assign LED state to toggle. */ + if (pLed->BlinkingLedState == RTW_LED_ON) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + /* Schedule a timer to toggle LED state. */ + switch (pLed->CurrLedState) { + case LED_BLINK_NORMAL: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_SLOWLY: + case LED_BLINK_StartToBlink: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + break; + + case LED_BLINK_WPS: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + break; + + default: + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + break; + } + } +} + +void +SwLedBlink1( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + PLED_USB pLed1 = &(ledpriv->SwLed1); + u8 bStopBlinking = _FALSE; + + u32 uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA; /* add by ylb 20121012 for customer led for alpha */ + if (pHalData->CustomerID == RT_CID_819x_ALPHA_Dlink) + uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS; + + if (pHalData->CustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + + + if (pHalData->CustomerID == RT_CID_DEFAULT) { + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + if (!pLed1->bSWLedCtrl) { + SwLedOn(padapter, pLed1); + pLed1->bSWLedCtrl = _TRUE; + } else if (!pLed1->bLedOn) + SwLedOn(padapter, pLed1); + } else { + if (!pLed1->bSWLedCtrl) { + SwLedOff(padapter, pLed1); + pLed1->bSWLedCtrl = _TRUE; + } else if (pLed1->bLedOn) + SwLedOff(padapter, pLed1); + } + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SLOWLY: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);/* change by ylb 20121012 for customer led for alpha */ + break; + + case LED_BLINK_NORMAL: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval); + } + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + break; + + case LED_BLINK_WPS_STOP: /* WPS success */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + bStopBlinking = _FALSE; + } else + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } + pLed->bLedWPSBlinkInProgress = _FALSE; + } + break; + + default: + break; + } + +} + +void +SwLedBlink2( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + SwLedOn(padapter, pLed); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + SwLedOff(padapter, pLed); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + SwLedOn(padapter, pLed); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + SwLedOff(padapter, pLed); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + +} + +void +SwLedBlink3( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + if (pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(padapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (!pLed->bLedOn) + SwLedOn(padapter, pLed); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + SwLedOff(padapter, pLed); + + } + pLed->bLedScanBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + + if (!pLed->bLedOn) + SwLedOn(padapter, pLed); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedOn) + SwLedOff(padapter, pLed); + + + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + break; + + case LED_BLINK_WPS_STOP: /* WPS success */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + bStopBlinking = _FALSE; + } else + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) + SwLedOff(padapter, pLed); + else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + SwLedOn(padapter, pLed); + } + pLed->bLedWPSBlinkInProgress = _FALSE; + } + break; + + + default: + break; + } + +} + + +void +SwLedBlink4( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + PLED_USB pLed1 = &(ledpriv->SwLed1); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + + if (!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) { + pLed1->BlinkingLedState = RTW_LED_OFF; + pLed1->CurrLedState = RTW_LED_OFF; + SwLedOff(padapter, pLed1); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SLOWLY: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_StartToBlink: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _FALSE; +#if 0 + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + pLed->bLedNoLinkBlinkInProgress = _FALSE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedScanBlinkInProgress = _FALSE; + } else +#endif + { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_WPS_STOP: /* WPS authentication fail */ + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_WPS_STOP_OVERLAP: /* WPS session overlap */ + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) { + if (pLed->bLedOn) + pLed->BlinkTimes = 1; + else + bStopBlinking = _TRUE; + } + + if (bStopBlinking) { + pLed->BlinkTimes = 10; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_ALWAYS_ON: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { + SwLedOff(padapter, pLed); + } else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + + + +} + +void +SwLedBlink5( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + SwLedOff(padapter, pLed); + } else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (!pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + + pLed->bLedScanBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + SwLedOff(padapter, pLed); + } else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (!pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(padapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + + + +} + +void +SwLedBlink6( + PLED_USB pLed +) +{ + _adapter *padapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + u8 bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(padapter, pLed); + } else { + SwLedOff(padapter, pLed); + } + +} + +void +SwLedBlink7( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + if (pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(Adapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on) + SwLedOff(Adapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (!pLed->bLedOn) + SwLedOn(Adapter, pLed); + + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + SwLedOff(Adapter, pLed); + + } + pLed->bLedScanBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + break; + + case LED_BLINK_WPS_STOP: /* WPS success */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + bStopBlinking = _FALSE; + } else + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on) + SwLedOff(Adapter, pLed); + else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + SwLedOn(Adapter, pLed); + } + pLed->bLedWPSBlinkInProgress = _FALSE; + } + break; + + + default: + break; + } + + +} + +void +SwLedBlink8( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + SwLedOff(Adapter, pLed); + } + + +} + +/* page added for Belkin AC950. 20120813 */ +void +SwLedBlink9( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + SwLedOff(Adapter, pLed); + } + /* RTW_INFO("%s, pLed->CurrLedState=%d, pLed->BlinkingLedState=%d\n", __FUNCTION__, pLed->CurrLedState, pLed->BlinkingLedState); */ + + + switch (pLed->CurrLedState) { + case RTW_LED_ON: + SwLedOn(Adapter, pLed); + break; + + case RTW_LED_OFF: + SwLedOff(Adapter, pLed); + break; + + case LED_BLINK_SLOWLY: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_StartToBlink: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on) + SwLedOff(Adapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_WPS_STOP: /* WPS authentication fail */ + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_WPS_STOP_OVERLAP: /* WPS session overlap */ + pLed->BlinkTimes--; + pLed->BlinkCounter--; + if (pLed->BlinkCounter == 0) { + pLed->BlinkingLedState = RTW_LED_OFF; + pLed->CurrLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } else { + if (pLed->BlinkTimes == 0) { + if (pLed->bLedOn) + pLed->BlinkTimes = 1; + else + bStopBlinking = _TRUE; + } + + if (bStopBlinking) { + pLed->BlinkTimes = 10; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_BLINK_ALWAYS_ON: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (IS_HARDWARE_TYPE_8812AU(Adapter)) { + pLed->BlinkingLedState = RTW_LED_ON; + pLed->CurrLedState = LED_BLINK_ALWAYS_ON; + } else { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { + SwLedOff(Adapter, pLed); + } else { + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + pLed->BlinkingLedState = RTW_LED_ON; + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_LINK_IN_PROCESS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ON_BELKIN); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_OFF_BELKIN); + } + break; + + case LED_BLINK_AUTH_ERROR: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking == _FALSE) { + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } + } else { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } + break; + + default: + break; + } + +} + +/* page added for Netgear A6200V2. 20120827 */ +void +SwLedBlink10( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + SwLedOff(Adapter, pLed); + } + + + switch (pLed->CurrLedState) { + case RTW_LED_ON: + SwLedOn(Adapter, pLed); + break; + + case RTW_LED_OFF: + SwLedOff(Adapter, pLed); + break; + + case LED_BLINK_SLOWLY: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_StartToBlink: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_BLINK_SCAN: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on) + SwLedOff(Adapter, pLed); + else if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + pLed->bLedNoLinkBlinkInProgress = _FALSE; + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->BlinkTimes = 0; + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR + LED_BLINK_LINK_INTERVAL_NETGEAR); + } + } + } + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL + LED_BLINK_LINK_INTERVAL_NETGEAR); + } + break; + + case LED_BLINK_WPS_STOP: /* WPS authentication fail */ + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + break; + + case LED_BLINK_WPS_STOP_OVERLAP: /* WPS session overlap */ + pLed->BlinkTimes--; + pLed->BlinkCounter--; + if (pLed->BlinkCounter == 0) { + pLed->BlinkingLedState = RTW_LED_OFF; + pLed->CurrLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } else { + if (pLed->BlinkTimes == 0) { + if (pLed->bLedOn) + pLed->BlinkTimes = 1; + else + bStopBlinking = _TRUE; + } + + if (bStopBlinking) { + pLed->BlinkTimes = 10; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_BLINK_ALWAYS_ON: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (IS_HARDWARE_TYPE_8812AU(Adapter)) { + pLed->BlinkingLedState = RTW_LED_ON; + pLed->CurrLedState = LED_BLINK_ALWAYS_ON; + } else { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { + SwLedOff(Adapter, pLed); + } else { + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + pLed->BlinkingLedState = RTW_LED_ON; + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + case LED_BLINK_LINK_IN_PROCESS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ON_BELKIN); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_OFF_BELKIN); + } + break; + + case LED_BLINK_AUTH_ERROR: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking == _FALSE) { + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } + } else { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_ERROR_INTERVAL_BELKIN); + } + break; + + default: + break; + } + + +} + +void +SwLedBlink11( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + SwLedOff(Adapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_TXRX: + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + + break; + + case LED_BLINK_WPS: + if (pLed->BlinkTimes == 5) { + SwLedOn(Adapter, pLed); + _set_timer(&(pLed->BlinkTimer), LED_CM11_LINK_ON_INTERVEL); + } else { + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_CM11_BLINK_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_CM11_BLINK_INTERVAL); + } + } + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking == _TRUE) + pLed->BlinkTimes = 5; + break; + + case LED_BLINK_WPS_STOP: /* WPS authentication fail */ + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + SwLedOn(Adapter, pLed); + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + default: + break; + } + +} + +void +SwLedBlink12( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + SwLedOff(Adapter, pLed); + } + + switch (pLed->CurrLedState) { + case LED_BLINK_SLOWLY: + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + SwLedOff(Adapter, pLed); + } else { + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } + + + +} + +void +SwLedBlink13( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + static u8 LinkBlinkCnt = 0; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + if (pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(Adapter, pLed); + } + switch (pLed->CurrLedState) { + case LED_BLINK_LINK_IN_PROCESS: + if (!pLed->bLedWPSBlinkInProgress) + LinkBlinkCnt++; + + if (LinkBlinkCnt > 15) { + LinkBlinkCnt = 0; + pLed->bLedBlinkInProgress = _FALSE; + break; + } + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 500); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 500); + } + + break; + + case LED_BLINK_WPS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); + } + + break; + + case LED_BLINK_WPS_STOP: /* WPS success */ + SwLedOff(Adapter, pLed); + pLed->bLedWPSBlinkInProgress = _FALSE; + break; + + default: + LinkBlinkCnt = 0; + break; + } + + +} + +void +SwLedBlink14( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + static u8 LinkBlinkCnt = 0; + + /* Change LED according to BlinkingLedState specified. */ + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + if (pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(Adapter, pLed); + } + switch (pLed->CurrLedState) { + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else + SwLedOn(Adapter, pLed); + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + } + + break; + + default: + LinkBlinkCnt = 0; + break; + } + +} + +void +SwLedBlink15( + PLED_USB pLed +) +{ + PADAPTER Adapter = pLed->padapter; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bStopBlinking = _FALSE; + static u8 LinkBlinkCnt = 0; + /* Change LED according to BlinkingLedState specified. */ + + if (pLed->BlinkingLedState == RTW_LED_ON) { + SwLedOn(Adapter, pLed); + } else { + if (pLed->CurrLedState != LED_BLINK_WPS_STOP) + SwLedOff(Adapter, pLed); + } + switch (pLed->CurrLedState) { + case LED_BLINK_WPS: + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_DLINK); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_DLINK); + } + break; + + case LED_BLINK_WPS_STOP: /* WPS success */ + + if (pLed->BlinkingLedState == RTW_LED_OFF) { + pLed->bLedWPSBlinkInProgress = _FALSE; + return; + } + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + pLed->BlinkingLedState = RTW_LED_OFF; + + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_LINKED_ON_INTERVAL_DLINK); + break; + + case LED_BLINK_NO_LINK: { + static BOOLEAN bLedOn = _TRUE; + if (bLedOn) { + bLedOn = _FALSE; + pLed->BlinkingLedState = RTW_LED_OFF; + } else { + bLedOn = _TRUE; + pLed->BlinkingLedState = RTW_LED_ON; + } + pLed->bLedBlinkInProgress = _TRUE; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL); + } + break; + + case LED_BLINK_LINK_IDEL: { + static BOOLEAN bLedOn = _TRUE; + if (bLedOn) { + bLedOn = _FALSE; + pLed->BlinkingLedState = RTW_LED_OFF; + } else { + bLedOn = _TRUE; + pLed->BlinkingLedState = RTW_LED_ON; + + } + pLed->bLedBlinkInProgress = _TRUE; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_IDEL_INTERVAL); + } + break; + + case LED_BLINK_SCAN: { + static u8 BlinkTime = 0; + if (BlinkTime % 2 == 0) + pLed->BlinkingLedState = RTW_LED_ON; + else + pLed->BlinkingLedState = RTW_LED_OFF; + BlinkTime++; + + if (BlinkTime < 24) { + pLed->bLedBlinkInProgress = _TRUE; + + if (pLed->BlinkingLedState == RTW_LED_ON) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_OFF_INTERVAL); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_ON_INTERVAL); + } else { + /* if(pLed->OLDLedState ==LED_NO_LINK_BLINK) */ + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _FALSE) { + pLed->CurrLedState = LED_BLINK_NO_LINK; + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), 100); + } + BlinkTime = 0; + } + } + break; + + case LED_BLINK_TXRX: + pLed->BlinkTimes--; + if (pLed->BlinkTimes == 0) + bStopBlinking = _TRUE; + if (bStopBlinking) { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else + SwLedOn(Adapter, pLed); + pLed->bLedBlinkInProgress = _FALSE; + } else { + if (adapter_to_pwrctl(Adapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(Adapter)->rfoff_reason > RF_CHANGE_BY_PS) + SwLedOff(Adapter, pLed); + else { + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + LinkBlinkCnt = 0; + break; + } + +} + +/* + * Description: + * Handler function of LED Blinking. + * We dispatch acture LED blink action according to LedStrategy. + * */ +void BlinkHandler(PLED_USB pLed) +{ + _adapter *padapter = pLed->padapter; + struct led_priv *ledpriv = adapter_to_led(padapter); + + /* RTW_INFO("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); */ + + if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { + /*RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" + , __func__ + , rtw_is_drv_stopped(padapter)?"True":"False" + , rtw_is_surprise_removed(padapter)?"True":"False" );*/ + return; + } + + #ifdef CONFIG_RTW_SW_LED + /* Toggle LED state according to led_ctrl specified. */ + if (padapter->registrypriv.led_ctrl != 1) { + if (padapter->registrypriv.led_ctrl == 0) { + pLed->BlinkingLedState = RTW_LED_OFF; + } else { + pLed->BlinkingLedState = RTW_LED_ON; + } + pLed->CurrLedState = LED_UNKNOWN; + } + #endif + + switch (ledpriv->LedStrategy) { + #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + case SW_LED_MODE_UC_TRX_ONLY: + rtw_sw_led_blink_uc_trx_only(pLed); + break; + #endif + + case SW_LED_MODE0: + SwLedBlink(pLed); + break; + + case SW_LED_MODE1: + SwLedBlink1(pLed); + break; + + case SW_LED_MODE2: + SwLedBlink2(pLed); + break; + + case SW_LED_MODE3: + SwLedBlink3(pLed); + break; + + case SW_LED_MODE4: + SwLedBlink4(pLed); + break; + + case SW_LED_MODE5: + SwLedBlink5(pLed); + break; + + case SW_LED_MODE6: + SwLedBlink6(pLed); + break; + + case SW_LED_MODE7: + SwLedBlink7(pLed); + break; + + case SW_LED_MODE8: + SwLedBlink8(pLed); + break; + + case SW_LED_MODE9: + SwLedBlink9(pLed); + break; + + case SW_LED_MODE10: + SwLedBlink10(pLed); + break; + + case SW_LED_MODE11: + SwLedBlink11(pLed); + break; + + case SW_LED_MODE12: + SwLedBlink12(pLed); + break; + + case SW_LED_MODE13: + SwLedBlink13(pLed); + break; + + case SW_LED_MODE14: + SwLedBlink14(pLed); + break; + + case SW_LED_MODE15: + SwLedBlink15(pLed); + break; + + default: + /* SwLedBlink(pLed); */ + break; + } +} + +/* + * Description: + * Callback function of LED BlinkTimer, + * it just schedules to corresponding BlinkWorkItem/led_blink_hdl + * */ +void BlinkTimerCallback(void *data) +{ + PLED_USB pLed = (PLED_USB)data; + _adapter *padapter = pLed->padapter; + + /* RTW_INFO("%s\n", __FUNCTION__); */ + + if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { + /*RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" + , __func__ + , rtw_is_drv_stopped(padapter)?"True":"False" + , rtw_is_surprise_removed(padapter)?"True":"False" );*/ + return; + } + +#ifdef CONFIG_RTW_LED_HANDLED_BY_CMD_THREAD + rtw_led_blink_cmd(padapter, (void *)pLed); +#else + _set_workitem(&(pLed->BlinkWorkItem)); +#endif +} + +/* + * Description: + * Callback function of LED BlinkWorkItem. + * We dispatch acture LED blink action according to LedStrategy. + * */ +void BlinkWorkItemCallback(_workitem *work) +{ + PLED_USB pLed = container_of(work, LED_USB, BlinkWorkItem); + BlinkHandler(pLed); +} + +static void +SwLedControlMode0( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + PLED_USB pLed = &(ledpriv->SwLed1); + + /* Decide led state */ + switch (LedAction) { + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_NORMAL; + pLed->BlinkTimes = 2; + + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + break; + + case LED_CTL_START_TO_LINK: + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_StartToBlink; + pLed->BlinkTimes = 24; + + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else + pLed->CurrLedState = LED_BLINK_StartToBlink; + break; + + case LED_CTL_LINK: + pLed->CurrLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_NO_LINK: + pLed->CurrLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + SwLedOff(padapter, pLed); + break; + + case LED_CTL_START_WPS: + if (pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == RTW_LED_ON) { + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_WPS; + pLed->BlinkTimes = 20; + + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); + } + } + break; + + case LED_CTL_STOP_WPS: + if (pLed->bLedBlinkInProgress) { + pLed->CurrLedState = RTW_LED_OFF; + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + break; + + + default: + break; + } + + +} + +/* ALPHA, added by chiyoko, 20090106 */ +static void +SwLedControlMode1( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + PLED_USB pLed = &(ledpriv->SwLed0); + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + u32 uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA; /* add by ylb 20121012 for customer led for alpha */ + if (pHalData->CustomerID == RT_CID_819x_ALPHA_Dlink) + uLedBlinkNoLinkInterval = LED_BLINK_NO_LINK_INTERVAL_ALPHA_500MS; + + if (pHalData->CustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + switch (LedAction) { + case LED_CTL_POWER_ON: + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);/* change by ylb 20121012 for customer led for alpha */ + } + break; + + case LED_CTL_LINK: + if (pLed->bLedLinkBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_NORMAL; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_SITE_SURVEY: + if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && adapter_to_pwrctl(padapter)->rfoff_reason == RF_CHANGE_BY_IPS) + _set_timer(&(pLed->BlinkTimer), LED_INITIAL_INTERVAL); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + + case LED_CTL_STOP_WPS: + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed->BlinkTimer)); + else + pLed->bLedWPSBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_STOP_WPS_FAIL: + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), uLedBlinkNoLinkInterval);/* change by ylb 20121012 for customer led for alpha */ + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedNoLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + +} + +/* Arcadyan/Sitecom , added by chiyoko, 20090216 */ +static void +SwLedControlMode2( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_SITE_SURVEY: + if (pmlmepriv->LinkDetectInfo.bBusyTraffic) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if ((pLed->bLedBlinkInProgress == _FALSE) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_LINK: + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_STOP_WPS: + pLed->bLedWPSBlinkInProgress = _FALSE; + if (adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } else { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_STOP_WPS_FAIL: + pLed->bLedWPSBlinkInProgress = _FALSE; + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if (!IS_LED_BLINKING(pLed)) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + +} + +/* COREGA, added by chiyoko, 20090316 */ +static void +SwLedControlMode3( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_SITE_SURVEY: + if (pmlmepriv->LinkDetectInfo.bBusyTraffic) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if ((pLed->bLedBlinkInProgress == _FALSE) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_LINK: + if (IS_LED_WPS_BLINKING(pLed)) + return; + + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_STOP_WPS: + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } else + pLed->bLedWPSBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + case LED_CTL_STOP_WPS_FAIL: + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if (!IS_LED_BLINKING(pLed)) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + +} + + +/* Edimax-Belkin, added by chiyoko, 20090413 */ +static void +SwLedControlMode4( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + PLED_USB pLed1 = &(ledpriv->SwLed1); + + switch (LedAction) { + case LED_CTL_START_TO_LINK: + if (pLed1->bLedWPSBlinkInProgress) { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = RTW_LED_OFF; + pLed1->CurrLedState = RTW_LED_OFF; + + if (pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + + if (pLed->bLedStartToLinkBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + + pLed->bLedStartToLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_StartToBlink; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + /* LED1 settings */ + if (LedAction == LED_CTL_LINK) { + if (pLed1->bLedWPSBlinkInProgress) { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = RTW_LED_OFF; + pLed1->CurrLedState = RTW_LED_OFF; + + if (pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + } + + if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_SITE_SURVEY: + if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed1->bLedWPSBlinkInProgress) { + pLed1->bLedWPSBlinkInProgress = _FALSE; + _cancel_timer_ex(&(pLed1->BlinkTimer)); + + pLed1->BlinkingLedState = RTW_LED_OFF; + pLed1->CurrLedState = RTW_LED_OFF; + + if (pLed1->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + } + + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + } + } + break; + + case LED_CTL_STOP_WPS: /* WPS connect success */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + break; + + case LED_CTL_STOP_WPS_FAIL: /* WPS authentication fail */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + /* LED1 settings */ + if (pLed1->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed1->BlinkTimer)); + else + pLed1->bLedWPSBlinkInProgress = _TRUE; + + pLed1->CurrLedState = LED_BLINK_WPS_STOP; + if (pLed1->bLedOn) + pLed1->BlinkingLedState = RTW_LED_OFF; + else + pLed1->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + + break; + + case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + + /* LED1 settings */ + if (pLed1->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed1->BlinkTimer)); + else + pLed1->bLedWPSBlinkInProgress = _TRUE; + + pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; + pLed1->BlinkTimes = 10; + if (pLed1->bLedOn) + pLed1->BlinkingLedState = RTW_LED_OFF; + else + pLed1->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedNoLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedStartToLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedStartToLinkBlinkInProgress = _FALSE; + } + + if (pLed1->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedWPSBlinkInProgress = _FALSE; + } + + pLed1->BlinkingLedState = LED_UNKNOWN; + SwLedOff(padapter, pLed); + SwLedOff(padapter, pLed1); + break; + + case LED_CTL_CONNECTION_NO_TRANSFER: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_ALWAYS_ON; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + default: + break; + + } + +} + + + +/* Sercomm-Belkin, added by chiyoko, 20090415 */ +static void +SwLedControlMode5( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + PLED_USB pLed = &(ledpriv->SwLed0); + + if (pHalData->CustomerID == RT_CID_819x_CAMEO) + pLed = &(ledpriv->SwLed1); + + switch (LedAction) { + case LED_CTL_POWER_ON: + case LED_CTL_NO_LINK: + case LED_CTL_LINK: /* solid blue */ + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_SITE_SURVEY: + if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN) + return; + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + SwLedOff(padapter, pLed); + break; + + default: + break; + + } + +} + +/* WNC-Corega, added by chiyoko, 20090902 */ +static void +SwLedControlMode6( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + PLED_USB pLed0 = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_POWER_ON: + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + _cancel_timer_ex(&(pLed0->BlinkTimer)); + pLed0->CurrLedState = RTW_LED_ON; + pLed0->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed0->BlinkTimer), 0); + break; + + case LED_CTL_POWER_OFF: + SwLedOff(padapter, pLed0); + break; + + default: + break; + } + +} + +/* Netgear, added by sinda, 2011/11/11 */ +void +SwLedControlMode7( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_SITE_SURVEY: + if (pmlmepriv->LinkDetectInfo.bBusyTraffic) + ; + else if (pLed->bLedScanBlinkInProgress == _FALSE) { + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 6; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } + break; + + case LED_CTL_LINK: + if (IS_LED_WPS_BLINKING(pLed)) + return; + + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } + break; + + case LED_CTL_STOP_WPS: + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } else + pLed->bLedWPSBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + + case LED_CTL_STOP_WPS_FAIL: + case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + if (!IS_LED_BLINKING(pLed)) { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + case LED_CTL_POWER_ON: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + default: + break; + + } + +} + +void +SwLedControlMode8( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed0 = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_LINK: + _cancel_timer_ex(&(pLed0->BlinkTimer)); + pLed0->CurrLedState = RTW_LED_ON; + pLed0->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed0->BlinkTimer), 0); + break; + + case LED_CTL_NO_LINK: + _cancel_timer_ex(&(pLed0->BlinkTimer)); + pLed0->CurrLedState = RTW_LED_OFF; + pLed0->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed0->BlinkTimer), 0); + break; + + case LED_CTL_POWER_OFF: + SwLedOff(Adapter, pLed0); + break; + + default: + break; + } + + +} + +/* page added for Belkin AC950, 20120813 */ +void +SwLedControlMode9( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + PLED_USB pLed1 = &(ledpriv->SwLed1); + PLED_USB pLed2 = &(ledpriv->SwLed2); + BOOLEAN bWPSOverLap = _FALSE; + /* RTW_INFO("LedAction=%d\n", LedAction); */ + switch (LedAction) { + case LED_CTL_START_TO_LINK: + if (pLed2->bLedBlinkInProgress == _FALSE) { + pLed2->bLedBlinkInProgress = _TRUE; + pLed2->BlinkingLedState = RTW_LED_ON; + pLed2->CurrLedState = LED_BLINK_LINK_IN_PROCESS; + + _set_timer(&(pLed2->BlinkTimer), 0); + } + break; + + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + /* LED1 settings */ + if (LedAction == LED_CTL_NO_LINK) { + /* if(pMgntInfo->AuthStatus == AUTH_STATUS_FAILED) */ + if (0) { + pLed1->CurrLedState = LED_BLINK_AUTH_ERROR; + if (pLed1->bLedOn) + pLed1->BlinkingLedState = RTW_LED_OFF; + else + pLed1->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed1->BlinkTimer), 0); + } else { + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + if (pLed1->bLedOn) + _set_timer(&(pLed1->BlinkTimer), 0); + } + } else { + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + if (pLed1->bLedOn) + _set_timer(&(pLed1->BlinkTimer), 0); + } + + /* LED2 settings */ + if (LedAction == LED_CTL_LINK) { + if (Adapter->securitypriv.dot11PrivacyAlgrthm != _NO_PRIVACY_) { + if (pLed2->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed2->BlinkTimer)); + pLed2->bLedBlinkInProgress = _FALSE; + } + pLed2->CurrLedState = RTW_LED_ON; + pLed2->bLedNoLinkBlinkInProgress = _TRUE; + if (!pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + } else { + if (pLed2->bLedWPSBlinkInProgress != _TRUE) { + pLed2->CurrLedState = RTW_LED_OFF; + pLed2->BlinkingLedState = RTW_LED_OFF; + if (pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + } + } + } else { /* NO_LINK */ + if (pLed2->bLedWPSBlinkInProgress == _FALSE) { + pLed2->CurrLedState = RTW_LED_OFF; + pLed2->BlinkingLedState = RTW_LED_OFF; + if (pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + } + } + + /* LED0 settings */ + if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + if (IS_HARDWARE_TYPE_8812AU(Adapter)) { + if (LedAction == LED_CTL_LINK) { + pLed->BlinkingLedState = RTW_LED_ON; + pLed->CurrLedState = LED_BLINK_SLOWLY; + } else { + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + } else { + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + } + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + + break; + + case LED_CTL_SITE_SURVEY: + if ((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE)) + ; + else { /* if(pLed->bLedScanBlinkInProgress ==FALSE) */ + if (IS_LED_WPS_BLINKING(pLed)) + return; + + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 24; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->CurrLedState == LED_BLINK_SCAN || IS_LED_WPS_BLINKING(pLed)) + return; + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + pLed2->bLedBlinkInProgress = _TRUE; + pLed2->BlinkingLedState = RTW_LED_ON; + pLed2->CurrLedState = LED_BLINK_LINK_IN_PROCESS; + pLed2->bLedWPSBlinkInProgress = _TRUE; + + _set_timer(&(pLed2->BlinkTimer), 500); + + break; + + case LED_CTL_STOP_WPS: /* WPS connect success */ + /* LED2 settings */ + if (pLed2->bLedWPSBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed2->BlinkTimer)); + pLed2->bLedBlinkInProgress = _FALSE; + pLed2->bLedWPSBlinkInProgress = _FALSE; + } + pLed2->CurrLedState = RTW_LED_ON; + pLed2->bLedNoLinkBlinkInProgress = _TRUE; + if (!pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + + /* LED1 settings */ + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + if (pLed1->bLedOn) + _set_timer(&(pLed1->BlinkTimer), 0); + + + break; + + case LED_CTL_STOP_WPS_FAIL: /* WPS authentication fail */ + /* LED1 settings */ + /* if(bWPSOverLap == _FALSE) */ + { + pLed1->CurrLedState = LED_BLINK_AUTH_ERROR; + pLed1->BlinkTimes = 50; + if (pLed1->bLedOn) + pLed1->BlinkingLedState = RTW_LED_OFF; + else + pLed1->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed1->BlinkTimer), 0); + } + /* else */ + /* { */ + /* bWPSOverLap = _FALSE; */ + /* pLed1->CurrLedState = RTW_LED_OFF; */ + /* pLed1->BlinkingLedState = RTW_LED_OFF; */ + /* _set_timer(&(pLed1->BlinkTimer), 0); */ + /* } */ + + /* LED2 settings */ + pLed2->CurrLedState = RTW_LED_OFF; + pLed2->BlinkingLedState = RTW_LED_OFF; + pLed2->bLedWPSBlinkInProgress = _FALSE; + if (pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + + break; + + case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ + /* LED1 settings */ + bWPSOverLap = _TRUE; + pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; + pLed1->BlinkTimes = 10; + pLed1->BlinkCounter = 50; + if (pLed1->bLedOn) + pLed1->BlinkingLedState = RTW_LED_OFF; + else + pLed1->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed1->BlinkTimer), 0); + + /* LED2 settings */ + pLed2->CurrLedState = RTW_LED_OFF; + pLed2->BlinkingLedState = RTW_LED_OFF; + pLed2->bLedWPSBlinkInProgress = _FALSE; + if (pLed2->bLedOn) + _set_timer(&(pLed2->BlinkTimer), 0); + + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedNoLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedStartToLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedStartToLinkBlinkInProgress = _FALSE; + } + + if (pLed1->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedWPSBlinkInProgress = _FALSE; + } + + + pLed1->BlinkingLedState = LED_UNKNOWN; + SwLedOff(Adapter, pLed); + SwLedOff(Adapter, pLed1); + break; + + case LED_CTL_CONNECTION_NO_TRANSFER: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + + pLed->CurrLedState = LED_BLINK_ALWAYS_ON; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + default: + break; + + } + +} + +/* page added for Netgear A6200V2, 20120827 */ +void +SwLedControlMode10( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + PLED_USB pLed1 = &(ledpriv->SwLed1); + + switch (LedAction) { + case LED_CTL_START_TO_LINK: + if (pLed1->bLedBlinkInProgress == _FALSE) { + pLed1->bLedBlinkInProgress = _TRUE; + pLed1->BlinkingLedState = RTW_LED_ON; + pLed1->CurrLedState = LED_BLINK_LINK_IN_PROCESS; + + _set_timer(&(pLed1->BlinkTimer), 0); + } + break; + + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + if (LedAction == LED_CTL_LINK) { + if (pLed->bLedWPSBlinkInProgress == _TRUE || pLed1->bLedWPSBlinkInProgress == _TRUE) + ; + else { + if (pHalData->current_band_type == BAND_ON_2_4G) + /* LED0 settings */ + { + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + _set_timer(&(pLed->BlinkTimer), 0); + + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed1->BlinkTimer), 0); + } else if (pHalData->current_band_type == BAND_ON_5G) + /* LED1 settings */ + { + pLed1->CurrLedState = RTW_LED_ON; + pLed1->BlinkingLedState = RTW_LED_ON; + if (pLed1->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedBlinkInProgress = _FALSE; + } + _set_timer(&(pLed1->BlinkTimer), 0); + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + } + } else if (LedAction == LED_CTL_NO_LINK) { /* TODO by page */ + if (pLed->bLedWPSBlinkInProgress == _TRUE || pLed1->bLedWPSBlinkInProgress == _TRUE) + ; + else { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + if (pLed1->bLedOn) + _set_timer(&(pLed1->BlinkTimer), 0); + } + } + + break; + + case LED_CTL_SITE_SURVEY: + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) + ; /* don't blink when media connect */ + else { /* if(pLed->bLedScanBlinkInProgress ==FALSE) */ + if (IS_LED_WPS_BLINKING(pLed) || IS_LED_WPS_BLINKING(pLed1)) + return; + + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedScanBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkTimes = 12; + pLed->BlinkingLedState = LED_BLINK_SCAN; + _set_timer(&(pLed->BlinkTimer), 0); + + if (pLed1->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed1->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedBlinkInProgress = _FALSE; + } + pLed1->bLedScanBlinkInProgress = _TRUE; + pLed1->CurrLedState = LED_BLINK_SCAN; + pLed1->BlinkTimes = 12; + pLed1->BlinkingLedState = LED_BLINK_SCAN; + _set_timer(&(pLed1->BlinkTimer), LED_BLINK_LINK_SLOWLY_INTERVAL_NETGEAR); + + } + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + /* LED0 settings */ + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->bLedBlinkInProgress = _TRUE; + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->BlinkingLedState = LED_BLINK_WPS; + pLed->CurrLedState = LED_BLINK_WPS; + _set_timer(&(pLed->BlinkTimer), 0); + } + + /* LED1 settings */ + if (pLed1->bLedBlinkInProgress == _FALSE) { + pLed1->bLedBlinkInProgress = _TRUE; + pLed1->bLedWPSBlinkInProgress = _TRUE; + pLed1->BlinkingLedState = LED_BLINK_WPS; + pLed1->CurrLedState = LED_BLINK_WPS; + _set_timer(&(pLed1->BlinkTimer), LED_BLINK_NORMAL_INTERVAL + LED_BLINK_LINK_INTERVAL_NETGEAR); + } + + + break; + + case LED_CTL_STOP_WPS: /* WPS connect success */ + if (pHalData->current_band_type == BAND_ON_2_4G) + /* LED0 settings */ + { + pLed->bLedWPSBlinkInProgress = _FALSE; + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + _set_timer(&(pLed->BlinkTimer), 0); + + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed1->BlinkTimer), 0); + } else if (pHalData->current_band_type == BAND_ON_5G) + /* LED1 settings */ + { + pLed1->bLedWPSBlinkInProgress = _FALSE; + pLed1->CurrLedState = RTW_LED_ON; + pLed1->BlinkingLedState = RTW_LED_ON; + if (pLed1->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed1->BlinkTimer)); + pLed1->bLedBlinkInProgress = _FALSE; + } + _set_timer(&(pLed1->BlinkTimer), 0); + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + case LED_CTL_STOP_WPS_FAIL: /* WPS authentication fail */ + /* LED1 settings */ + pLed1->bLedWPSBlinkInProgress = _FALSE; + pLed1->CurrLedState = RTW_LED_OFF; + pLed1->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed1->BlinkTimer), 0); + + /* LED0 settings */ + pLed->bLedWPSBlinkInProgress = _FALSE; + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedOn) + _set_timer(&(pLed->BlinkTimer), 0); + + break; + + + default: + break; + + } + +} + +/* Edimax-ASUS, added by Page, 20121221 */ +void +SwLedControlMode11( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_POWER_ON: + case LED_CTL_START_TO_LINK: + case LED_CTL_NO_LINK: + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_LINK: + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + pLed->BlinkTimes = 5; + _set_timer(&(pLed->BlinkTimer), 0); + + break; + + + case LED_CTL_STOP_WPS: + case LED_CTL_STOP_WPS_FAIL: + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->CurrLedState = LED_BLINK_WPS_STOP; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedNoLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedLinkBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedLinkBlinkInProgress = _FALSE; + } + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + SwLedOff(Adapter, pLed); + break; + + default: + break; + + } + +} + +/* page added for NEC */ + +void +SwLedControlMode12( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_POWER_ON: + case LED_CTL_NO_LINK: + case LED_CTL_LINK: + case LED_CTL_SITE_SURVEY: + + if (pLed->bLedNoLinkBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedNoLinkBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_SLOWLY; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); + } + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + break; + + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + if (pLed->bLedNoLinkBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedNoLinkBlinkInProgress = _FALSE; + } + + SwLedOff(Adapter, pLed); + break; + + default: + break; + + } + +} + +/* Maddest add for NETGEAR R6100 */ + +void +SwLedControlMode13( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_LINK: + if (pLed->bLedWPSBlinkInProgress) + return; + + + pLed->CurrLedState = RTW_LED_ON; + pLed->BlinkingLedState = RTW_LED_ON; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); + } + } + break; + + case LED_CTL_STOP_WPS: + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } else + pLed->bLedWPSBlinkInProgress = _TRUE; + + pLed->bLedWPSBlinkInProgress = _FALSE; + pLed->CurrLedState = LED_BLINK_WPS_STOP; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + + case LED_CTL_STOP_WPS_FAIL: + case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_START_TO_LINK: + if ((pLed->bLedBlinkInProgress == _FALSE) && (pLed->bLedWPSBlinkInProgress == _FALSE)) { + pLed->bLedBlinkInProgress = _TRUE; + pLed->BlinkingLedState = RTW_LED_ON; + pLed->CurrLedState = LED_BLINK_LINK_IN_PROCESS; + + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_NO_LINK: + + if (pLed->bLedWPSBlinkInProgress) + return; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + /* if(!IS_LED_BLINKING(pLed)) */ + { + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + } + break; + + case LED_CTL_POWER_OFF: + case LED_CTL_POWER_ON: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + if (LedAction == LED_CTL_POWER_ON) + _set_timer(&(pLed->BlinkTimer), 0); + else + SwLedOff(Adapter, pLed); + break; + + default: + break; + + } + + +} + +/* Maddest add for DNI Buffalo */ + +void +SwLedControlMode14( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_POWER_OFF: + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + SwLedOff(Adapter, pLed); + break; + + case LED_CTL_POWER_ON: + SwLedOn(Adapter, pLed); + break; + + case LED_CTL_LINK: + case LED_CTL_NO_LINK: + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + SwLedOn(Adapter, pLed); + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedBlinkInProgress == _FALSE) { + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + if (IS_HARDWARE_TYPE_8812AU(Adapter)) + _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); + else + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + } + } + break; + + default: + break; + } +} + +/* Maddest add for Dlink */ + +void +SwLedControlMode15( + PADAPTER Adapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + PLED_USB pLed = &(ledpriv->SwLed0); + + switch (LedAction) { + case LED_CTL_START_WPS: /* wait until xinpin finish */ + case LED_CTL_START_WPS_BOTTON: + if (pLed->bLedWPSBlinkInProgress == _FALSE) { + if (pLed->bLedBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress == _TRUE) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + pLed->bLedWPSBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_WPS; + if (pLed->bLedOn) { + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_OFF_INTERVAL_NETGEAR); + } else { + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_WPS_BLINK_ON_INTERVAL_NETGEAR); + } + } + break; + + case LED_CTL_STOP_WPS: + if (pLed->bLedWPSBlinkInProgress) + _cancel_timer_ex(&(pLed->BlinkTimer)); + + pLed->CurrLedState = LED_BLINK_WPS_STOP; + /* if(check_fwstate(pmlmepriv, WIFI_ASOC_STATE)== _TRUE) */ + { + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), 0); + } + + break; + + case LED_CTL_STOP_WPS_FAIL: + case LED_CTL_STOP_WPS_FAIL_OVERLAP: /* WPS session overlap */ + if (pLed->bLedWPSBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedWPSBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = RTW_LED_OFF; + pLed->BlinkingLedState = RTW_LED_OFF; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_NO_LINK: + if (pLed->bLedWPSBlinkInProgress) + return; + + /*if(Adapter->securitypriv.dot11PrivacyAlgrthm > _NO_PRIVACY_) + { + if(SecIsTxKeyInstalled(Adapter, pMgntInfo->Bssid)) + { + } + else + { + if(pMgntInfo->LEDAssocState ==LED_ASSOC_SECURITY_BEGIN) + return; + } + }*/ + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + if (pLed->bLedScanBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedScanBlinkInProgress = _FALSE; + } + /* if(!IS_LED_BLINKING(pLed)) */ + { + pLed->CurrLedState = LED_BLINK_NO_LINK; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 30); + } + break; + + case LED_CTL_LINK: + + if (pLed->bLedWPSBlinkInProgress) + return; + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->CurrLedState = LED_BLINK_LINK_IDEL; + pLed->BlinkingLedState = RTW_LED_ON; + + _set_timer(&(pLed->BlinkTimer), 30); + break; + + case LED_CTL_SITE_SURVEY: + if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) + return; + + if (pLed->bLedWPSBlinkInProgress == _TRUE) + return; + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + pLed->CurrLedState = LED_BLINK_SCAN; + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), 0); + break; + + case LED_CTL_TX: + case LED_CTL_RX: + if (pLed->bLedWPSBlinkInProgress) + return; + + if (pLed->bLedBlinkInProgress) { + _cancel_timer_ex(&(pLed->BlinkTimer)); + pLed->bLedBlinkInProgress = _FALSE; + } + + pLed->bLedBlinkInProgress = _TRUE; + pLed->CurrLedState = LED_BLINK_TXRX; + pLed->BlinkTimes = 2; + if (pLed->bLedOn) + pLed->BlinkingLedState = RTW_LED_OFF; + else + pLed->BlinkingLedState = RTW_LED_ON; + _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); + break; + + default: + break; + } +} + +void +LedControlUSB( + _adapter *padapter, + LED_CTL_MODE LedAction +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + +#if (MP_DRIVER == 1) + if (padapter->registrypriv.mp_mode == 1) + return; +#endif + + if (RTW_CANNOT_RUN(padapter) || (!rtw_is_hw_init_completed(padapter))) { + /*RTW_INFO("%s bDriverStopped:%s, bSurpriseRemoved:%s\n" + , __func__ + , rtw_is_drv_stopped(padapter)?"True":"False" + , rtw_is_surprise_removed(padapter)?"True":"False" );*/ + return; + } + + if (ledpriv->bRegUseLed == _FALSE) + return; + + /* if(priv->bInHctTest) */ + /* return; */ + + if ((adapter_to_pwrctl(padapter)->rf_pwrstate != rf_on && + adapter_to_pwrctl(padapter)->rfoff_reason > RF_CHANGE_BY_PS) && + (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || + LedAction == LED_CTL_SITE_SURVEY || + LedAction == LED_CTL_LINK || + LedAction == LED_CTL_NO_LINK || + LedAction == LED_CTL_POWER_ON)) + return; + + switch (ledpriv->LedStrategy) { + #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY + case SW_LED_MODE_UC_TRX_ONLY: + rtw_sw_led_ctl_mode_uc_trx_only(padapter, LedAction); + break; + #endif + + case SW_LED_MODE0: + SwLedControlMode0(padapter, LedAction); + break; + + case SW_LED_MODE1: + SwLedControlMode1(padapter, LedAction); + break; + + case SW_LED_MODE2: + SwLedControlMode2(padapter, LedAction); + break; + + case SW_LED_MODE3: + SwLedControlMode3(padapter, LedAction); + break; + + case SW_LED_MODE4: + SwLedControlMode4(padapter, LedAction); + break; + + case SW_LED_MODE5: + SwLedControlMode5(padapter, LedAction); + break; + + case SW_LED_MODE6: + SwLedControlMode6(padapter, LedAction); + break; + + case SW_LED_MODE7: + SwLedControlMode7(padapter, LedAction); + break; + + case SW_LED_MODE8: + SwLedControlMode8(padapter, LedAction); + break; + + case SW_LED_MODE9: + SwLedControlMode9(padapter, LedAction); + break; + + case SW_LED_MODE10: + SwLedControlMode10(padapter, LedAction); + break; + + case SW_LED_MODE11: + SwLedControlMode11(padapter, LedAction); + break; + + case SW_LED_MODE12: + SwLedControlMode12(padapter, LedAction); + break; + + case SW_LED_MODE13: + SwLedControlMode13(padapter, LedAction); + break; + + case SW_LED_MODE14: + SwLedControlMode14(padapter, LedAction); + break; + + case SW_LED_MODE15: + SwLedControlMode15(padapter, LedAction); + break; + + default: + break; + } + +} + +/* + * Description: + * Reset status of LED_871x object. + * */ +void ResetLedStatus(PLED_USB pLed) +{ + + pLed->CurrLedState = RTW_LED_OFF; /* Current LED state. */ + pLed->bLedOn = _FALSE; /* true if LED is ON, false if LED is OFF. */ + + pLed->bLedBlinkInProgress = _FALSE; /* true if it is blinking, false o.w.. */ + pLed->bLedWPSBlinkInProgress = _FALSE; + + pLed->BlinkTimes = 0; /* Number of times to toggle led state for blinking. */ + pLed->BlinkCounter = 0; + pLed->BlinkingLedState = LED_UNKNOWN; /* Next state for blinking, either RTW_LED_ON or RTW_LED_OFF are. */ + + pLed->bLedNoLinkBlinkInProgress = _FALSE; + pLed->bLedLinkBlinkInProgress = _FALSE; + pLed->bLedStartToLinkBlinkInProgress = _FALSE; + pLed->bLedScanBlinkInProgress = _FALSE; +} + +/* +* Description: +* Initialize an LED_871x object. +* */ +void +InitLed( + _adapter *padapter, + PLED_USB pLed, + LED_PIN LedPin +) +{ + pLed->padapter = padapter; + pLed->LedPin = LedPin; + + ResetLedStatus(pLed); + rtw_init_timer(&(pLed->BlinkTimer), padapter, BlinkTimerCallback, pLed); + _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); +} + + +/* + * Description: + * DeInitialize an LED_871x object. + * */ +void +DeInitLed( + PLED_USB pLed +) +{ + _cancel_workitem_sync(&(pLed->BlinkWorkItem)); + _cancel_timer_ex(&(pLed->BlinkTimer)); + ResetLedStatus(pLed); +} +#endif diff --git a/hal/rtl8188e/Hal8188EPwrSeq.c b/hal/rtl8188e/Hal8188EPwrSeq.c new file mode 100644 index 0000000..2b6979f --- /dev/null +++ b/hal/rtl8188e/Hal8188EPwrSeq.c @@ -0,0 +1,82 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "Hal8188EPwrSeq.h" +#include + +/* + drivers should parse below arrays and do the corresponding actions +*/ +/* 3 Power on Array */ +WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + +/* 3Radio off Array */ +WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_END +}; + +/* 3Card Disable Array */ +WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_CARDDIS + RTL8188E_TRANS_END +}; + +/* 3 Card Enable Array */ +WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_CARDDIS_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + +/* 3Suspend Array */ +WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_SUS + RTL8188E_TRANS_END +}; + +/* 3 Resume Array */ +WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_SUS_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_ACT + RTL8188E_TRANS_END +}; + + +/* 3HWPDN Array */ +WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = { + RTL8188E_TRANS_ACT_TO_CARDEMU + RTL8188E_TRANS_CARDEMU_TO_PDN + RTL8188E_TRANS_END +}; + +/* 3 Enter LPS */ +WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = { + /* FW behavior */ + RTL8188E_TRANS_ACT_TO_LPS + RTL8188E_TRANS_END +}; + +/* 3 Leave LPS */ +WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = { + /* FW behavior */ + RTL8188E_TRANS_LPS_TO_ACT + RTL8188E_TRANS_END +}; diff --git a/hal/rtl8188e/hal8188e_s_fw.c b/hal/rtl8188e/hal8188e_s_fw.c new file mode 100644 index 0000000..a91af9a --- /dev/null +++ b/hal/rtl8188e/hal8188e_s_fw.c @@ -0,0 +1,7298 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "drv_types.h" + +#ifdef CONFIG_SFW_SUPPORTED + +#ifdef LOAD_FW_HEADER_FROM_DRIVER + +#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) + +u8 array_mp_8188e_s_fw_ap[] = { +0xE3, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00, +0x05, 0x04, 0x22, 0x24, 0x96, 0x3E, 0x02, 0x00, +0xA5, 0x4B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x47, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x48, 0x84, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x57, 0xFA, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xE1, 0xFB, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 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|| (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + +u8 array_mp_8188e_s_fw_nic[] = { +0xE3, 0x88, 0x10, 0x00, 0x1C, 0x00, 0x00, 0x00, +0x05, 0x04, 0x22, 0x24, 0xE6, 0x4A, 0x02, 0x00, +0xA5, 0x4B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x48, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x49, 0x78, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x57, 0xFB, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x48, 0xEF, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x4F, 0xFD, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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array_mp_8188e_s_fw_wowlan[] = { +0xE3, 0x88, 0x30, 0x00, 0x1C, 0x00, 0x00, 0x00, +0x05, 0x04, 0x22, 0x24, 0x96, 0x58, 0x02, 0x00, +0xA5, 0x4B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x49, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x4A, 0x43, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x57, 0xF7, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x49, 0xBA, 0x00, 0x00, +0x00, 0x00, 0x00, 0x02, 0x4F, 0xFA, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x22, 0xF0, 0x90, 0x89, +0x50, 0xE0, 0x04, 0xF0, 0x22, 0x24, 0x04, 0xF5, +0x82, 0xE4, 0x34, 0xFB, 0x22, 0xF9, 0xEE, 0x34, +0xFC, 0xFA, 0x7B, 0x01, 0x22, 0x90, 0x82, 0x1E, +0x12, 0x44, 0x5D, 0xE0, 0x22, 0x7E, 0x00, 0x7F, +0x10, 0x02, 0x43, 0xD0, 0x90, 0x81, 0x06, 0xE0, +0x44, 0x04, 0xF0, 0x22, 0x2F, 0xF8, 0xE6, 0xFE, +0xED, 0xF4, 0x5E, 0x22, 0xCD, 0x91 +}; + +u32 array_length_mp_8188e_s_fw_wowlan = 22710; + +#endif /*CONFIG_WOWLAN*/ + +#endif + +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + +#endif /* end of CONFIG_SFW_SUPPORTED */ diff --git a/hal/rtl8188e/hal8188e_s_fw.h b/hal/rtl8188e/hal8188e_s_fw.h new file mode 100644 index 0000000..2a72ea3 --- /dev/null +++ b/hal/rtl8188e/hal8188e_s_fw.h @@ -0,0 +1,40 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#ifndef _FW_HEADER_8188E_S_H +#define _FW_HEADER_8188E_S_H + +#ifdef CONFIG_SFW_SUPPORTED + +#ifdef LOAD_FW_HEADER_FROM_DRIVER +#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +extern u8 array_mp_8188e_s_fw_ap[16054]; +extern u32 array_length_mp_8188e_s_fw_ap; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) +extern u8 array_mp_8188e_s_fw_nic[19206]; +extern u32 array_length_mp_8188e_s_fw_nic; +#ifdef CONFIG_WOWLAN +extern u8 array_mp_8188e_s_fw_wowlan[22710]; +extern u32 array_length_mp_8188e_s_fw_wowlan; +#endif /*CONFIG_WOWLAN*/ +#endif +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + +#endif /* end of CONFIG_SFW_SUPPORTED */ + +#endif + diff --git a/hal/rtl8188e/hal8188e_t_fw.c b/hal/rtl8188e/hal8188e_t_fw.c new file mode 100644 index 0000000..da93e25 --- /dev/null +++ b/hal/rtl8188e/hal8188e_t_fw.c @@ -0,0 +1,7744 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "drv_types.h" + +#ifdef LOAD_FW_HEADER_FROM_DRIVER + +#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) + +u8 array_mp_8188e_t_fw_ap[] = { +0xE1, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00, +0x05, 0x05, 0x14, 0x27, 0x6E, 0x3C, 0x00, 0x00, +0xA5, 0x4B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x02, 0x45, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xC1, 0x84, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xA1, 0xFB, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0xE1, 0xF3, 0x00, 0x00, 0x00, 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0x80, 0xFA, 0xF0, 0xA3, 0xEF, 0xF0, +0x22, 0xF0, 0x90, 0x81, 0x25, 0xE0, 0xFF, 0xC3, +0x22, 0x12, 0x32, 0x1E, 0x90, 0x84, 0x97, 0xE0, +0x22, 0x00, 0xE0, 0x5B +}; + +u32 array_length_mp_8188e_t_fw_wowlan = 16388; + +#endif /*CONFIG_WOWLAN*/ + +#endif + +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + diff --git a/hal/rtl8188e/hal8188e_t_fw.h b/hal/rtl8188e/hal8188e_t_fw.h new file mode 100644 index 0000000..2c7b1e0 --- /dev/null +++ b/hal/rtl8188e/hal8188e_t_fw.h @@ -0,0 +1,38 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#ifndef _FW_HEADER_8188E_T_H +#define _FW_HEADER_8188E_T_H + +#ifdef LOAD_FW_HEADER_FROM_DRIVER +#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))) +extern u8 array_mp_8188e_t_fw_ap[15502]; +extern u32 array_length_mp_8188e_t_fw_ap; +#endif + +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE)) +extern u8 array_mp_8188e_t_fw_nic[15262]; +extern u32 array_length_mp_8188e_t_fw_nic; +extern u8 array_mp_8188e_t_fw_nic_89em[14364]; +extern u32 array_length_mp_8188e_t_fw_nic_89em; +#ifdef CONFIG_WOWLAN +extern u8 array_mp_8188e_t_fw_wowlan[16388]; +extern u32 array_length_mp_8188e_t_fw_wowlan; +#endif /*CONFIG_WOWLAN*/ +#endif +#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */ + +#endif + diff --git a/hal/rtl8188e/rtl8188e_cmd.c b/hal/rtl8188e/rtl8188e_cmd.c new file mode 100644 index 0000000..164b323 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_cmd.c @@ -0,0 +1,414 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_CMD_C_ + +#include +#include +#include "hal_com_h2c.h" + +#define CONFIG_H2C_EF + +#define RTL88E_MAX_H2C_BOX_NUMS 4 +#define RTL88E_MAX_CMD_LEN 7 +#define RTL88E_MESSAGE_BOX_SIZE 4 +#define RTL88E_EX_MESSAGE_BOX_SIZE 4 + +static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num) +{ + u8 read_down = _FALSE; + int retry_cnts = 100; + + u8 valid; + + /* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */ + + do { + valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num); + if (0 == valid) + read_down = _TRUE; + else + rtw_msleep_os(1); + } while ((!read_down) && (retry_cnts--)); + + return read_down; + +} + + +/***************************************** +* H2C Msg format : +* 0x1DF - 0x1D0 +*| 31 - 8 | 7-5 4 - 0 | +*| h2c_msg |Class_ID CMD_ID | +* +* Extend 0x1FF - 0x1F0 +*|31 - 0 | +*|ext_msg| +******************************************/ +s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 h2c_box_num; + u32 msgbox_addr; + u32 msgbox_ex_addr = 0; + u8 cmd_idx; + u32 h2c_cmd = 0; + u32 h2c_cmd_ex = 0; + s32 ret = _FAIL; + + + padapter = GET_PRIMARY_ADAPTER(padapter); + pHalData = GET_HAL_DATA(padapter); + + if (pHalData->bFWReady == _FALSE) { + RTW_INFO("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n"); + return ret; + } + + _enter_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL); + + if (!pCmdBuffer) + goto exit; + if (CmdLen > RTL88E_MAX_CMD_LEN) + goto exit; + if (rtw_is_surprise_removed(padapter)) + goto exit; + + /* pay attention to if race condition happened in H2C cmd setting. */ + do { + h2c_box_num = pHalData->LastHMEBoxNum; + + if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) { + RTW_INFO(" fw read cmd failed...\n"); + goto exit; + } + + *(u8 *)(&h2c_cmd) = ElementID; + + if (CmdLen <= 3) + _rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen); + else { + _rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3); + _rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, CmdLen - 3); + } + /* Write Ext command */ + msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE); +#ifdef CONFIG_H2C_EF + for (cmd_idx = 0; cmd_idx < RTL88E_EX_MESSAGE_BOX_SIZE; cmd_idx++) + rtw_write8(padapter, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx)); +#else + h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex); + rtw_write32(padapter, msgbox_ex_addr, h2c_cmd_ex); +#endif + + /* Write command */ + msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE); +#ifdef CONFIG_H2C_EF + for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) + rtw_write8(padapter, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx)); +#else + h2c_cmd = le32_to_cpu(h2c_cmd); + rtw_write32(padapter, msgbox_addr, h2c_cmd); +#endif + + + /* RTW_INFO("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" */ + /* ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); */ + + pHalData->LastHMEBoxNum = (h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS; + + } while (0); + + ret = _SUCCESS; + +exit: + + _exit_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL); + + + return ret; +} + +void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode) +{ + SETPWRMODE_PARM H2CSetPwrMode; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + u8 RLBM = 0; /* 0:Min, 1:Max , 2:User define */ + u8 allQueueUAPSD = 0; + + RTW_INFO("%s: Mode=%d SmartPS=%d \n", __FUNCTION__, Mode, pwrpriv->smart_ps); + + H2CSetPwrMode.AwakeInterval = 2; /* DTIM = 1 */ + + switch (Mode) { + case PS_MODE_ACTIVE: + H2CSetPwrMode.Mode = 0; + break; + case PS_MODE_MIN: + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_MAX: + RLBM = 1; + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_DTIM: + RLBM = 2; + H2CSetPwrMode.AwakeInterval = 3; /* DTIM = 2 */ + H2CSetPwrMode.Mode = 1; + break; + case PS_MODE_UAPSD_WMM: + H2CSetPwrMode.Mode = 2; + break; + default: + H2CSetPwrMode.Mode = 0; + break; + } + + /* H2CSetPwrMode.Mode = Mode; */ + + H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f)); + + H2CSetPwrMode.bAllQueueUAPSD = allQueueUAPSD; + + if (Mode > 0) { + H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ +#ifdef CONFIG_EXT_CLK + H2CSetPwrMode.Mode |= BIT(7);/* supporting 26M XTAL CLK_Request feature. */ +#endif /* CONFIG_EXT_CLK */ + } else + H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ + + FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); + + +} + +/* + * Description: Get the reserved page number in Tx packet buffer. + * Retrun value: the page number. + * 2012.08.09, by tynli. + * */ +u8 +GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 RsvdPageNum = 0; + /* default reseved 1 page for the IC type which is undefined. */ + u8 TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter); + + rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); + + RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter) - TxPageBndy + 1; + + return RsvdPageNum; +} + +void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) +{ + JOINBSSRPT_PARM_88E JoinBssRptParm; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); +#ifdef CONFIG_WOWLAN + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct sta_info *psta = NULL; +#endif + BOOLEAN bSendBeacon = _FALSE; + BOOLEAN bcn_valid = _FALSE; + u8 DLBcnCount = 0; + u32 poll = 0; + u8 RegFwHwTxQCtrl = 0; + + RTW_INFO("%s mstatus(%x)\n", __FUNCTION__, mstatus); + + if (mstatus == 1) { + u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL); + + /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */ + /* Suggested by filen. Added by tynli. */ + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid)); + /* Hw sequende enable by dedault. 2010.06.23. by tynli. */ + /* rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); */ + /* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */ + + /* Set REG_CR bit 8. DMA beacon by SW. */ + rtw_write8(padapter, REG_CR + 1, + rtw_read8(padapter, REG_CR + 1) | BIT0); + + /* Disable Hw protection for a time which revserd for Hw sending beacon. */ + /* Fix download reserved page packet fail that access collision with the protection time. */ + /* 2010.05.11. Added by tynli. */ + rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT); + + RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2); + if (RegFwHwTxQCtrl & BIT6) { + RTW_INFO("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); + bSendBeacon = _TRUE; + } + + /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */ + RegFwHwTxQCtrl &= (~BIT6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl); + + /* Clear beacon valid check bit. */ + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DLBcnCount = 0; + poll = 0; + do { + /* download rsvd page.*/ + rtw_hal_set_fw_rsvd_page(padapter, _FALSE); + DLBcnCount++; + do { + rtw_yield_os(); + /* rtw_mdelay_os(10); */ + /* check rsvd page download OK. */ + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid)); + poll++; + } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter)); + + } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); + + /* RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); */ + if (RTW_CANNOT_RUN(padapter)) + ; + else if (!bcn_valid) + RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter) , DLBcnCount, poll); + else { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + + pwrctl->fw_psmode_iface_id = padapter->iface_id; + rtw_hal_set_fw_rsvd_page(padapter, _TRUE); + RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter), DLBcnCount, poll); + } + + /* restore bcn_ctrl */ + rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl); + + /* To make sure that if there exists an adapter which would like to send beacon. */ + /* If exists, the origianl value of 0x422[6] will be 1, we should check this to */ + /* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */ + /* the beacon cannot be sent by HW. */ + /* 2010.06.23. Added by tynli. */ + if (bSendBeacon) { + RegFwHwTxQCtrl |= BIT6; + rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl); + } + + /* */ + /* Update RSVD page location H2C to Fw. */ + /* */ + if (bcn_valid) { + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + RTW_INFO("Set RSVD page location to Fw.\n"); + /* FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); */ + } + + /* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */ + /* if(!padapter->bEnterPnpSleep) */ +#ifndef CONFIG_PCI_HCI + { + /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */ + rtw_write8(padapter, REG_CR + 1, + rtw_read8(padapter, REG_CR + 1) & (~BIT0)); + } +#endif /* !CONFIG_PCI_HCI */ + } +} + +#ifdef CONFIG_P2P_PS +void rtl8188e_set_p2p_ps_offload_cmd(_adapter *padapter, u8 p2p_ps_state) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct wifidirect_info *pwdinfo = &(padapter->wdinfo); + struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload); + u8 i; + + +#if 1 + switch (p2p_ps_state) { + case P2P_PS_DISABLE: + RTW_INFO("P2P_PS_DISABLE\n"); + _rtw_memset(p2p_ps_offload, 0 , 1); + break; + case P2P_PS_ENABLE: + RTW_INFO("P2P_PS_ENABLE\n"); + /* update CTWindow value. */ + if (pwdinfo->ctwindow > 0) { + p2p_ps_offload->CTWindow_En = 1; + rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); + } + + /* hw only support 2 set of NoA */ + for (i = 0 ; i < pwdinfo->noa_num ; i++) { + /* To control the register setting for which NOA */ + rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); + if (i == 0) + p2p_ps_offload->NoA0_En = 1; + else + p2p_ps_offload->NoA1_En = 1; + + /* config P2P NoA Descriptor Register */ + /* RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); */ + rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); + + /* RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); */ + rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); + + /* RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); */ + rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); + + /* RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); */ + rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); + } + + if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) { + /* rst p2p circuit */ + rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); + + p2p_ps_offload->Offload_En = 1; + + if (pwdinfo->role == P2P_ROLE_GO) { + p2p_ps_offload->role = 1; + p2p_ps_offload->AllStaSleep = 0; + } else + p2p_ps_offload->role = 0; + + p2p_ps_offload->discovery = 0; + } + break; + case P2P_PS_SCAN: + RTW_INFO("P2P_PS_SCAN\n"); + p2p_ps_offload->discovery = 1; + break; + case P2P_PS_SCAN_DONE: + RTW_INFO("P2P_PS_SCAN_DONE\n"); + p2p_ps_offload->discovery = 0; + pwdinfo->p2p_ps_state = P2P_PS_ENABLE; + break; + default: + break; + } + + FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload); +#endif + + +} +#endif /* CONFIG_P2P_PS */ + diff --git a/hal/rtl8188e/rtl8188e_dm.c b/hal/rtl8188e/rtl8188e_dm.c new file mode 100644 index 0000000..e2a2af1 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_dm.c @@ -0,0 +1,297 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +/* ************************************************************ + * Description: + * + * This file is for 92CE/92CU dynamic mechanism only + * + * + * ************************************************************ */ +#define _RTL8188E_DM_C_ + +/* ************************************************************ + * include files + * ************************************************************ */ +#include +#include + +/* ************************************************************ + * Global var + * ************************************************************ */ +#ifdef CONFIG_SUPPORT_HW_WPS_PBC +static void dm_CheckPbcGPIO(_adapter *padapter) +{ + u8 tmp1byte; + u8 bPbcPressed = _FALSE; + + if (!padapter->registrypriv.hw_wps_pbc) + return; + +#ifdef CONFIG_USB_HCI + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */ + + tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */ + + tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); + tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT); + rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */ + + tmp1byte = rtw_read8(padapter, GPIO_IN); + + if (tmp1byte == 0xff) + return ; + + if (tmp1byte & HAL_8188E_HW_GPIO_WPS_BIT) + bPbcPressed = _TRUE; +#else + tmp1byte = rtw_read8(padapter, GPIO_IN); + + if (tmp1byte == 0xff || padapter->init_adpt_in_progress) + return ; + + if ((tmp1byte & HAL_8188E_HW_GPIO_WPS_BIT) == 0) + bPbcPressed = _TRUE; +#endif + + if (_TRUE == bPbcPressed) { + /* Here we only set bPbcPressed to true */ + /* After trigger PBC, the variable will be set to false */ + RTW_INFO("CheckPbcGPIO - PBC is pressed\n"); + rtw_request_wps_pbc_event(padapter); + } +} +#endif/* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */ + +#ifdef CONFIG_PCI_HCI +/* + * Description: + * Perform interrupt migration dynamically to reduce CPU utilization. + * + * Assumption: + * 1. Do not enable migration under WIFI test. + * + * Created by Roger, 2010.03.05. + * */ +void +dm_InterruptMigration( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bCurrentIntMt, bCurrentACIntDisable; + BOOLEAN IntMtToSet = _FALSE; + BOOLEAN ACIntToSet = _FALSE; + + + /* Retrieve current interrupt migration and Tx four ACs IMR settings first. */ + bCurrentIntMt = pHalData->bInterruptMigration; + bCurrentACIntDisable = pHalData->bDisableTxInt; + + /* */ + /* Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */ + /* when interrupt migration is set before. 2010.03.05. */ + /* */ + if (!Adapter->registrypriv.wifi_spec && + (check_fwstate(pmlmepriv, WIFI_ASOC_STATE) == _TRUE) && + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) { + IntMtToSet = _TRUE; + + /* To check whether we should disable Tx interrupt or not. */ + if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic) + ACIntToSet = _TRUE; + } + + /* Update current settings. */ + if (bCurrentIntMt != IntMtToSet) { + RTW_INFO("%s(): Update interrrupt migration(%d)\n", __FUNCTION__, IntMtToSet); + if (IntMtToSet) { + /* */ + /* Set interrrupt migration timer and corresponging Tx/Rx counter. */ + /* timer 25ns*0xfa0=100us for 0xf packets. */ + /* 2010.03.05. */ + /* */ + rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */ + pHalData->bInterruptMigration = IntMtToSet; + } else { + /* Reset all interrupt migration settings. */ + rtw_write32(Adapter, REG_INT_MIG, 0); + pHalData->bInterruptMigration = IntMtToSet; + } + } + +#if 0 + if (bCurrentACIntDisable != ACIntToSet) { + RTW_INFO("%s(): Update AC interrrupt(%d)\n", __FUNCTION__, ACIntToSet); + if (ACIntToSet) { /* Disable four ACs interrupts. */ + /* */ + /* Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. */ + /* When extremely highly Rx OK occurs, we will disable Tx interrupts. */ + /* 2010.03.05. */ + /* */ + UpdateInterruptMask8192CE(Adapter, 0, RT_AC_INT_MASKS); + pHalData->bDisableTxInt = ACIntToSet; + } else { /* Enable four ACs interrupts. */ + UpdateInterruptMask8192CE(Adapter, RT_AC_INT_MASKS, 0); + pHalData->bDisableTxInt = ACIntToSet; + } + } +#endif + +} + +#endif + +/* + * Initialize GPIO setting registers + * */ +#ifdef CONFIG_USB_HCI +static void +dm_InitGPIOSetting( + PADAPTER Adapter +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 tmp1byte; + + tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); + tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); + + rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); + +} +#endif +/* ************************************************************ + * functions + * ************************************************************ */ +static void Init_ODM_ComInfo_88E(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + u8 cut_ver, fab_ver; + + Init_ODM_ComInfo(Adapter); + + fab_ver = ODM_TSMC; + cut_ver = ODM_CUT_A; + + if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) + cut_ver = ODM_CUT_I; + + odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver); + odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver); +} + +void +rtl8188e_InitHalDm( + PADAPTER Adapter +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + +#ifdef CONFIG_USB_HCI + dm_InitGPIOSetting(Adapter); +#endif + rtw_phydm_init(Adapter); +} + + +void +rtl8188e_HalDmWatchDog( + PADAPTER Adapter +) +{ + BOOLEAN bFwCurrentInPSMode = _FALSE; + u8 bFwPSAwake = _TRUE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); + u8 in_lps = _FALSE; + + if (!rtw_is_hw_init_completed(Adapter)) + goto skip_dm; + +#ifdef CONFIG_LPS + bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; + rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, &bFwPSAwake); +#endif + +#ifdef CONFIG_P2P_PS + /* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */ + /* modifed by thomas. 2011.06.11. */ + if (Adapter->wdinfo.p2p_ps_mode) + bFwPSAwake = _FALSE; +#endif /* CONFIG_P2P_PS */ + + if ((rtw_is_hw_init_completed(Adapter)) + && ((!bFwCurrentInPSMode) && bFwPSAwake)) { + rtw_hal_check_rxfifo_full(Adapter); + /* */ + /* Dynamically switch RTS/CTS protection. */ + /* */ + +#ifdef CONFIG_PCI_HCI + /* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */ + /* Tx Migration settings. */ + /* dm_InterruptMigration(Adapter); */ + + /* if(Adapter->hal_func.TxCheckStuckHandler(Adapter)) */ + /* PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); */ +#endif + + } + +#ifdef CONFIG_DISABLE_ODM + goto skip_dm; +#endif +#ifdef CONFIG_LPS + if (pwrpriv->bLeisurePs && bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE) + in_lps = _TRUE; +#endif + + rtw_phydm_watchdog(Adapter, in_lps); + +skip_dm: + +#ifdef CONFIG_SUPPORT_HW_WPS_PBC + /* Check GPIO to determine current Pbc status. */ + dm_CheckPbcGPIO(Adapter); +#endif + return; +} + +void rtl8188e_init_dm_priv(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *podmpriv = &pHalData->odmpriv; + + /* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */ + Init_ODM_ComInfo_88E(Adapter); + odm_init_all_timers(podmpriv); + +} + +void rtl8188e_deinit_dm_priv(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *podmpriv = &pHalData->odmpriv; + /* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */ + odm_cancel_all_timers(podmpriv); +} diff --git a/hal/rtl8188e/rtl8188e_hal_init.c b/hal/rtl8188e/rtl8188e_hal_init.c new file mode 100644 index 0000000..f16a2e0 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_hal_init.c @@ -0,0 +1,4337 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HAL_INIT_C_ + +#include +#include +#ifdef CONFIG_SFW_SUPPORTED +#include "hal8188e_s_fw.h" +#endif +#include "hal8188e_t_fw.h" + + +#if defined(CONFIG_IOL) +static void iol_mode_enable(PADAPTER padapter, u8 enable) +{ + u8 reg_0xf0 = 0; + + if (enable) { + /* Enable initial offload */ + reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); + /* RTW_INFO("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0|SW_OFFLOAD_EN); */ + rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 | SW_OFFLOAD_EN); + + if (GET_HAL_DATA(padapter)->bFWReady == _FALSE) { + printk("bFWReady == _FALSE call reset 8051...\n"); + _8051Reset88E(padapter); + } + + } else { + /* disable initial offload */ + reg_0xf0 = rtw_read8(padapter, REG_SYS_CFG); + /* RTW_INFO("%s reg_0xf0:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0xf0, reg_0xf0& ~SW_OFFLOAD_EN); */ + rtw_write8(padapter, REG_SYS_CFG, reg_0xf0 & ~SW_OFFLOAD_EN); + } +} + +static s32 iol_execute(PADAPTER padapter, u8 control) +{ + s32 status = _FAIL; + u8 reg_0x88 = 0, reg_1c7 = 0; + systime start = 0; + u32 passing_time = 0; + + systime t1, t2; + control = control & 0x0f; + reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); + /* RTW_INFO("%s reg_0x88:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x88, reg_0x88|control); */ + rtw_write8(padapter, REG_HMEBOX_E0, reg_0x88 | control); + + t1 = start = rtw_get_current_time(); + while ( + /* (reg_1c7 = rtw_read8(padapter, 0x1c7) >1) && */ + (reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0)) & control + && (passing_time = rtw_get_passing_time_ms(start)) < 1000 + ) { + /* RTW_INFO("%s polling reg_0x88:0x%02x,reg_0x1c7:0x%02x\n", __FUNCTION__, reg_0x88,rtw_read8(padapter, 0x1c7) ); */ + /* rtw_udelay_os(100); */ + } + + reg_0x88 = rtw_read8(padapter, REG_HMEBOX_E0); + status = (reg_0x88 & control) ? _FAIL : _SUCCESS; + if (reg_0x88 & control << 4) + status = _FAIL; + t2 = rtw_get_current_time(); + /* printk("==> step iol_execute : %5u reg-0x1c0= 0x%02x\n",rtw_get_time_interval_ms(t1,t2),rtw_read8(padapter, 0x1c0)); */ + /* RTW_INFO("%s in %u ms, reg_0x88:0x%02x\n", __FUNCTION__, passing_time, reg_0x88); */ + + return status; +} + +#ifdef CONFIG_IOL_LLT +static s32 iol_InitLLTTable( + PADAPTER padapter, + u8 txpktbuf_bndy +) +{ + s32 rst = _SUCCESS; + iol_mode_enable(padapter, 1); + /* RTW_INFO("%s txpktbuf_bndy:%u\n", __FUNCTION__, txpktbuf_bndy); */ + rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy); + rst = iol_execute(padapter, CMD_INIT_LLT); + iol_mode_enable(padapter, 0); + return rst; +} +#endif /*CONFIG_IOL_LLT*/ + +static void +efuse_phymap_to_logical(u8 *phymap, u16 _offset, u16 _size_byte, u8 *pbuf) +{ + u8 *efuseTbl = NULL; + u8 rtemp8; + u16 eFuse_Addr = 0; + u8 offset, wren; + u16 i, j; + u16 **eFuseWord = NULL; + u16 efuse_utilized = 0; + u8 efuse_usage = 0; + u8 u1temp = 0; + + + efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E); + if (efuseTbl == NULL) { + RTW_INFO("%s: alloc efuseTbl fail!\n", __FUNCTION__); + goto exit; + } + + eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2); + if (eFuseWord == NULL) { + RTW_INFO("%s: alloc eFuseWord fail!\n", __FUNCTION__); + goto exit; + } + + /* 0. Refresh efuse init map as all oxFF. */ + for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) + for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) + eFuseWord[i][j] = 0xFFFF; + + /* */ + /* 1. Read the first byte to check if efuse is empty!!! */ + /* */ + /* */ + rtemp8 = *(phymap + eFuse_Addr); + if (rtemp8 != 0xFF) { + efuse_utilized++; + /* printk("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); */ + eFuse_Addr++; + } else { + RTW_INFO("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, rtemp8); + goto exit; + } + + + /* */ + /* 2. Read real efuse content. Filter PG header and every section data. */ + /* */ + while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); */ + + /* Check PG header for section num. */ + if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */ + u1temp = ((rtemp8 & 0xE0) >> 5); + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); */ + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x\n", u1temp)); */ + + rtemp8 = *(phymap + eFuse_Addr); + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); */ + + if ((rtemp8 & 0x0F) == 0x0F) { + eFuse_Addr++; + rtemp8 = *(phymap + eFuse_Addr); + + if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + eFuse_Addr++; + continue; + } else { + offset = ((rtemp8 & 0xF0) >> 1) | u1temp; + wren = (rtemp8 & 0x0F); + eFuse_Addr++; + } + } else { + offset = ((rtemp8 >> 4) & 0x0f); + wren = (rtemp8 & 0x0f); + } + + if (offset < EFUSE_MAX_SECTION_88E) { + /* Get word enable value from PG header */ + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); */ + + for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { + /* Check word enable condition in the section */ + if (!(wren & 0x01)) { + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); */ + rtemp8 = *(phymap + eFuse_Addr); + eFuse_Addr++; + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ + efuse_utilized++; + eFuseWord[offset][i] = (rtemp8 & 0xff); + + + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); */ + rtemp8 = *(phymap + eFuse_Addr); + eFuse_Addr++; + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ + + efuse_utilized++; + eFuseWord[offset][i] |= (((u16)rtemp8 << 8) & 0xff00); + + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + } + + wren >>= 1; + + } + } + + /* Read next PG header */ + rtemp8 = *(phymap + eFuse_Addr); + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); */ + + if (rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + efuse_utilized++; + eFuse_Addr++; + } + } + + /* */ + /* 3. Collect 16 sections and 4 word unit into Efuse map. */ + /* */ + for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) { + for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) { + efuseTbl[(i * 8) + (j * 2)] = (eFuseWord[i][j] & 0xff); + efuseTbl[(i * 8) + ((j * 2) + 1)] = ((eFuseWord[i][j] >> 8) & 0xff); + } + } + + + /* */ + /* 4. Copy from Efuse map to output pointer memory!!! */ + /* */ + for (i = 0; i < _size_byte; i++) + pbuf[i] = efuseTbl[_offset + i]; + + /* */ + /* 5. Calculate Efuse utilization. */ + /* */ + efuse_usage = (u8)((efuse_utilized * 100) / EFUSE_REAL_CONTENT_LEN_88E); + /* rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); */ + +exit: + if (efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); + + if (eFuseWord) + rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); +} + +void efuse_read_phymap_from_txpktbuf( + ADAPTER *adapter, + int bcnhead, /* beacon head, where FW store len(2-byte) and efuse physical map. */ + u8 *content, /* buffer to store efuse physical map */ + u16 *size /* for efuse content: the max byte to read. will update to byte read */ +) +{ + u16 dbg_addr = 0; + systime start = 0; + u32 passing_time = 0; + u8 reg_0x143 = 0; + u8 reg_0x106 = 0; + u16 len = 0, count = 0; + int i = 0; + u16 limit = *size; + + u8 *pos = content; + + if (bcnhead < 0) /* if not valid */ + bcnhead = rtw_read8(adapter, REG_TDECTRL + 1); + + RTW_INFO("%s bcnhead:%d\n", __FUNCTION__, bcnhead); + + /* reg_0x106 = rtw_read8(adapter, REG_PKT_BUFF_ACCESS_CTRL); */ + /* RTW_INFO("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); */ + rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); + /* RTW_INFO("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(adapter, 0x106)); */ + + dbg_addr = bcnhead * 128 / 8; /* 8-bytes addressing */ + + while (1) { + u16 cp_cnt; + u32 lo32, hi32; + + /* RTW_INFO("%s dbg_addr:0x%x\n", __FUNCTION__, dbg_addr+i); */ + rtw_write16(adapter, REG_PKTBUF_DBG_ADDR, dbg_addr + i); + + /* RTW_INFO("%s write reg_0x143:0x00\n", __FUNCTION__); */ + rtw_write8(adapter, REG_TXPKTBUF_DBG, 0); + start = rtw_get_current_time(); + while (!(reg_0x143 = rtw_read8(adapter, REG_TXPKTBUF_DBG)) /* dbg */ + /* while(rtw_read8(adapter, REG_TXPKTBUF_DBG) & BIT0 */ + && (passing_time = rtw_get_passing_time_ms(start)) < 1000 + ) { + RTW_INFO("%s polling reg_0x143:0x%02x, reg_0x106:0x%02x\n", __FUNCTION__, reg_0x143, rtw_read8(adapter, 0x106)); + rtw_usleep_os(100); + } + + if (i == 0) { + lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L); + + len = lo32 & 0x0000ffff; + limit = (len - 2 < limit) ? len - 2 : limit; + RTW_INFO("%s len:%u\n", __FUNCTION__, len); + + lo32 = cpu_to_le32(lo32); + cp_cnt = (limit >= count + 2) ? 2 : limit - count; + _rtw_memcpy(pos, ((u8 *)&lo32) + 2, cp_cnt); + count += cp_cnt; + pos = content + count; + } else { + lo32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L)); + cp_cnt = (limit >= count + 4) ? 4 : limit - count; + _rtw_memcpy(pos, &lo32, cp_cnt); + count += cp_cnt; + pos = content + count; + } + + if (limit > count && len - 2 > count) { + hi32 = cpu_to_le32(rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H)); + cp_cnt = (limit >= count + 4) ? 4 : limit - count; + _rtw_memcpy(pos, &hi32, cp_cnt); + count += cp_cnt; + pos = content + count; + } + + if (limit <= count || len - 2 <= count) + break; + + i++; + } + + rtw_write8(adapter, REG_PKT_BUFF_ACCESS_CTRL, DISABLE_TRXPKT_BUF_ACCESS); + + RTW_INFO("%s read count:%u\n", __FUNCTION__, count); + *size = count; + +} + + +static s32 iol_read_efuse( + PADAPTER padapter, + u8 txpktbuf_bndy, + u16 offset, + u16 size_byte, + u8 *logical_map +) +{ + s32 status = _FAIL; + u8 reg_0x106 = 0; + u8 physical_map[512]; + u16 size = 512; + int i; + + + rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy); + _rtw_memset(physical_map, 0xFF, 512); + + /* /reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); */ + /* RTW_INFO("%s reg_0x106:0x%02x, write 0x%02x\n", __FUNCTION__, reg_0x106, 0x69); */ + rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); + /* RTW_INFO("%s reg_0x106:0x%02x\n", __FUNCTION__, rtw_read8(padapter, 0x106)); */ + + status = iol_execute(padapter, CMD_READ_EFUSE_MAP); + + if (status == _SUCCESS) + efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size); + +#if 0 + RTW_PRINT("%s physical map\n", __FUNCTION__); + for (i = 0; i < size; i++) { + if (i % 16 == 0) + RTW_PRINT("%02x", physical_map[i]); + else + _RTW_PRINT("%02x", physical_map[i]); + + if (i % 16 == 7) + _RTW_PRINT(" "); + else if (i % 16 == 15) + _RTW_PRINT("\n"); + else + _RTW_PRINT(" "); + } + _RTW_PRINT("\n"); +#endif + + efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map); + + return status; +} + +s32 rtl8188e_iol_efuse_patch(PADAPTER padapter) +{ + s32 result = _SUCCESS; + printk("==> %s\n", __FUNCTION__); + + if (rtw_IOL_applied(padapter)) { + iol_mode_enable(padapter, 1); + result = iol_execute(padapter, CMD_READ_EFUSE_MAP); + if (result == _SUCCESS) + result = iol_execute(padapter, CMD_EFUSE_PATCH); + + iol_mode_enable(padapter, 0); + } + return result; +} + +static s32 iol_ioconfig( + PADAPTER padapter, + u8 iocfg_bndy +) +{ + s32 rst = _SUCCESS; + + /* RTW_INFO("%s iocfg_bndy:%u\n", __FUNCTION__, iocfg_bndy); */ + rtw_write8(padapter, REG_TDECTRL + 1, iocfg_bndy); + rst = iol_execute(padapter, CMD_IOCONFIG); + + return rst; +} + +int rtl8188e_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt) +{ + + systime start_time = rtw_get_current_time(); + u32 passing_time_ms; + u8 polling_ret, i; + int ret = _FAIL; + systime t1, t2; + + /* printk("===> %s ,bndy_cnt = %d\n",__FUNCTION__,bndy_cnt); */ + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; +#ifdef CONFIG_USB_HCI + { + struct pkt_attrib *pattrib = &xmit_frame->attrib; + if (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE + pattrib->last_txcmdsz)) { + if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) + goto exit; + } + } +#endif /* CONFIG_USB_HCI */ + + /* rtw_IOL_cmd_buf_dump(adapter,xmit_frame->attrib.pktlen+TXDESC_OFFSET,xmit_frame->buf_addr); */ + /* rtw_hal_mgnt_xmit(adapter, xmit_frame); */ + /* rtw_dump_xframe_sync(adapter, xmit_frame); */ + + dump_mgntframe_and_wait(adapter, xmit_frame, max_wating_ms); + + t1 = rtw_get_current_time(); + iol_mode_enable(adapter, 1); + for (i = 0; i < bndy_cnt; i++) { + u8 page_no = 0; + page_no = i * 2 ; + /* printk(" i = %d, page_no = %d\n",i,page_no); */ + ret = iol_ioconfig(adapter, page_no); + if (ret != _SUCCESS) + break; + } + iol_mode_enable(adapter, 0); + t2 = rtw_get_current_time(); + /* printk("==> %s : %5u\n",__FUNCTION__,rtw_get_time_interval_ms(t1,t2)); */ +exit: + /* restore BCN_HEAD */ + rtw_write8(adapter, REG_TDECTRL + 1, 0); + return ret; +} + +void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter, int data_len) +{ + u32 fifo_data, reg_140; + u32 addr, rstatus, loop = 0; + + u16 data_cnts = (data_len / 8) + 1; + u8 *pbuf = rtw_zvmalloc(data_len + 10); + printk("###### %s ######\n", __FUNCTION__); + + rtw_write8(Adapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT); + if (pbuf) { + for (addr = 0; addr < data_cnts; addr++) { + /* printk("==> addr:0x%02x\n",addr); */ + rtw_write32(Adapter, 0x140, addr); + rtw_usleep_os(2); + loop = 0; + do { + rstatus = (reg_140 = rtw_read32(Adapter, REG_PKTBUF_DBG_CTRL) & BIT24); + /* printk("rstatus = %02x, reg_140:0x%08x\n",rstatus,reg_140); */ + if (rstatus) { + fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_L); + /* printk("fifo_data_144:0x%08x\n",fifo_data); */ + _rtw_memcpy(pbuf + (addr * 8), &fifo_data , 4); + + fifo_data = rtw_read32(Adapter, REG_PKTBUF_DBG_DATA_H); + /* printk("fifo_data_148:0x%08x\n",fifo_data); */ + _rtw_memcpy(pbuf + (addr * 8 + 4), &fifo_data, 4); + + } + rtw_usleep_os(2); + } while (!rstatus && (loop++ < 10)); + } + rtw_IOL_cmd_buf_dump(Adapter, data_len, pbuf); + rtw_vmfree(pbuf, data_len + 10); + + } + printk("###### %s ######\n", __FUNCTION__); +} + +#endif /* defined(CONFIG_IOL) */ + + +static void +_FWDownloadEnable_8188E( + PADAPTER padapter, + BOOLEAN enable +) +{ + u8 tmp; + + if (enable) { + /* MCU firmware download enable. */ + tmp = rtw_read8(padapter, REG_MCUFWDL); + rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01); + + /* 8051 reset */ + tmp = rtw_read8(padapter, REG_MCUFWDL + 2); + rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7); + } else { + + /* MCU firmware download disable. */ + tmp = rtw_read8(padapter, REG_MCUFWDL); + rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe); + + /* Reserved for fw extension. */ + rtw_write8(padapter, REG_MCUFWDL + 1, 0x00); + } +} +#define MAX_REG_BOLCK_SIZE 196 +static int +_BlockWrite( + PADAPTER padapter, + void *buffer, + u32 buffSize +) +{ + int ret = _SUCCESS; + + u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */ + u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */ + u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */ + u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; + u32 remainSize_p1 = 0, remainSize_p2 = 0; + u8 *bufferPtr = (u8 *)buffer; + u32 i = 0, offset = 0; +#ifdef CONFIG_PCI_HCI + u8 remainFW[4] = {0, 0, 0, 0}; + u8 *p = NULL; +#endif + +#ifdef CONFIG_USB_HCI + blockSize_p1 = MAX_REG_BOLCK_SIZE; +#endif + + /* 3 Phase #1 */ + blockCount_p1 = buffSize / blockSize_p1; + remainSize_p1 = buffSize % blockSize_p1; + + + + for (i = 0; i < blockCount_p1; i++) { +#ifdef CONFIG_USB_HCI + ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1)); +#else + ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), le32_to_cpu(*((u32 *)(bufferPtr + i * blockSize_p1)))); +#endif + + if (ret == _FAIL) + goto exit; + } + +#ifdef CONFIG_PCI_HCI + p = (u8 *)((u32 *)(bufferPtr + blockCount_p1 * blockSize_p1)); + if (remainSize_p1) { + switch (remainSize_p1) { + case 3: + remainFW[2] = *(p + 2); + case 2: + remainFW[1] = *(p + 1); + case 1: + remainFW[0] = *(p); + ret = rtw_write32(padapter, (FW_8188E_START_ADDRESS + blockCount_p1 * blockSize_p1), + le32_to_cpu(*(u32 *)remainFW)); + } + return ret; + } +#else + + /* 3 Phase #2 */ + if (remainSize_p1) { +#ifdef CONFIG_USB_HCI + offset = blockCount_p1 * blockSize_p1; +#endif + + blockCount_p2 = remainSize_p1 / blockSize_p2; + remainSize_p2 = remainSize_p1 % blockSize_p2; + + + +#ifdef CONFIG_USB_HCI + for (i = 0; i < blockCount_p2; i++) { + ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2)); + + if (ret == _FAIL) + goto exit; + } +#endif + } + + /* 3 Phase #3 */ + if (remainSize_p2) { + offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2); + + blockCount_p3 = remainSize_p2 / blockSize_p3; + + + for (i = 0 ; i < blockCount_p3 ; i++) { + ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i)); + + if (ret == _FAIL) + goto exit; + } + } + +#endif +exit: + return ret; +} + +static int +_PageWrite( + PADAPTER padapter, + u32 page, + void *buffer, + u32 size +) +{ + u8 value8; + u8 u8Page = (u8)(page & 0x07) ; + + value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page ; + rtw_write8(padapter, REG_MCUFWDL + 2, value8); + + return _BlockWrite(padapter, buffer, size); +} +/* +#ifdef CONFIG_PCI_HCI +static void +_FillDummy( + u8 *pFwBuf, + u32 *pFwLen +) +{ + u32 FwLen = *pFwLen; + u8 remain = (u8)(FwLen % 4); + remain = (remain == 0) ? 0 : (4 - remain); + + while (remain > 0) { + pFwBuf[FwLen] = 0; + FwLen++; + remain--; + } + + *pFwLen = FwLen; +} +#endif +*/ +static int +_WriteFW( + PADAPTER padapter, + void *buffer, + u32 size +) +{ + /* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */ + int ret = _SUCCESS; + u32 pageNums, remainSize ; + u32 page, offset; + u8 *bufferPtr = (u8 *)buffer; + +#ifdef CONFIG_PCI_HCI + /* 20100120 Joseph: Add for 88CE normal chip. */ + /* Fill in zero to make firmware image to dword alignment. + * _FillDummy(bufferPtr, &size); */ +#endif + + pageNums = size / MAX_DLFW_PAGE_SIZE ; + /* RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4\n")); */ + remainSize = size % MAX_DLFW_PAGE_SIZE; + + for (page = 0; page < pageNums; page++) { + offset = page * MAX_DLFW_PAGE_SIZE; + ret = _PageWrite(padapter, page, bufferPtr + offset, MAX_DLFW_PAGE_SIZE); + + if (ret == _FAIL) + goto exit; + } + if (remainSize) { + offset = pageNums * MAX_DLFW_PAGE_SIZE; + page = pageNums; + ret = _PageWrite(padapter, page, bufferPtr + offset, remainSize); + + if (ret == _FAIL) + goto exit; + + } + +exit: + return ret; +} + +void _MCUIO_Reset88E(PADAPTER padapter, u8 bReset) +{ + u8 u1bTmp; + + if (bReset == _TRUE) { + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL); + rtw_write8(padapter, REG_RSV_CTRL, (u1bTmp & (~BIT1))); + /* Reset MCU IO Wrapper- sugggest by SD1-Gimmy */ + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1); + rtw_write8(padapter, REG_RSV_CTRL + 1, (u1bTmp & (~BIT3))); + } else { + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL); + rtw_write8(padapter, REG_RSV_CTRL, (u1bTmp & (~BIT1))); + /* Enable MCU IO Wrapper */ + u1bTmp = rtw_read8(padapter, REG_RSV_CTRL + 1); + rtw_write8(padapter, REG_RSV_CTRL + 1, u1bTmp | BIT3); + } + +} + +void _8051Reset88E(PADAPTER padapter) +{ + u8 u1bTmp; + + _MCUIO_Reset88E(padapter, _TRUE); + u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN + 1); + rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp & (~BIT2)); + _MCUIO_Reset88E(padapter, _FALSE); + rtw_write8(padapter, REG_SYS_FUNC_EN + 1, u1bTmp | (BIT2)); + + RTW_INFO("=====> _8051Reset88E(): 8051 reset success .\n"); +} + +static s32 polling_fwdl_chksum(_adapter *adapter, u32 min_cnt, u32 timeout_ms) +{ + s32 ret = _FAIL; + u32 value32; + systime start = rtw_get_current_time(); + u32 cnt = 0; + + /* polling CheckSum report */ + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); + if (value32 & FWDL_ChkSum_rpt || RTW_CANNOT_IO(adapter)) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); + + if (!(value32 & FWDL_ChkSum_rpt)) + goto exit; + + if (rtw_fwdl_test_trigger_chksum_fail()) + goto exit; + + ret = _SUCCESS; + +exit: + RTW_INFO("%s: Checksum report %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ + , (ret == _SUCCESS) ? "OK" : "Fail", cnt, rtw_get_passing_time_ms(start), value32); + + return ret; +} + +static s32 _FWFreeToGo(_adapter *adapter, u32 min_cnt, u32 timeout_ms) +{ + s32 ret = _FAIL; + u32 value32; + systime start = rtw_get_current_time(); + u32 cnt = 0; + + value32 = rtw_read32(adapter, REG_MCUFWDL); + value32 |= MCUFWDL_RDY; + value32 &= ~WINTINI_RDY; + rtw_write32(adapter, REG_MCUFWDL, value32); + + _8051Reset88E(adapter); + + /* polling for FW ready */ + do { + cnt++; + value32 = rtw_read32(adapter, REG_MCUFWDL); + if (value32 & WINTINI_RDY || RTW_CANNOT_IO(adapter)) + break; + rtw_yield_os(); + } while (rtw_get_passing_time_ms(start) < timeout_ms || cnt < min_cnt); + + if (!(value32 & WINTINI_RDY)) + goto exit; + + if (rtw_fwdl_test_trigger_wintint_rdy_fail()) + goto exit; + + ret = _SUCCESS; + +exit: + RTW_INFO("%s: Polling FW ready %s! (%u, %dms), REG_MCUFWDL:0x%08x\n", __FUNCTION__ + , (ret == _SUCCESS) ? "OK" : "Fail", cnt, rtw_get_passing_time_ms(start), value32); + return ret; +} + +#define IS_FW_81xxC(padapter) (((GET_HAL_DATA(padapter))->FirmwareSignature & 0xFFF0) == 0x88C0) + + +#ifdef CONFIG_FILE_FWIMG + extern char *rtw_fw_file_path; + extern char *rtw_fw_wow_file_path; + u8 FwBuffer8188E[FW_8188E_SIZE]; +#endif /* CONFIG_FILE_FWIMG */ + +/* + * Description: + * Download 8192C firmware code. + * + * */ +s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw) +{ + s32 rtStatus = _SUCCESS; + u8 write_fw = 0; + systime fwdl_start_time; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + PRT_FIRMWARE_8188E pFirmware = NULL; + PRT_8188E_FIRMWARE_HDR pFwHdr = NULL; + + u8 *pFirmwareBuf; + u32 FirmwareLen, tmp_fw_len = 0; +#ifdef CONFIG_FILE_FWIMG + u8 *fwfilepath; +#endif /* CONFIG_FILE_FWIMG */ + +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); +#endif + + pFirmware = (PRT_FIRMWARE_8188E)rtw_zmalloc(sizeof(RT_FIRMWARE_8188E)); + if (!pFirmware) { + rtStatus = _FAIL; + goto exit; + } + + + +#ifdef CONFIG_FILE_FWIMG +#ifdef CONFIG_WOWLAN + if (bUsedWoWLANFw) + fwfilepath = rtw_fw_wow_file_path; + else +#endif /* CONFIG_WOWLAN */ + { + fwfilepath = rtw_fw_file_path; + } +#endif /* CONFIG_FILE_FWIMG */ + +#ifdef CONFIG_FILE_FWIMG + if (rtw_is_file_readable(fwfilepath) == _TRUE) { + RTW_INFO("%s accquire FW from file:%s\n", __FUNCTION__, fwfilepath); + pFirmware->eFWSource = FW_SOURCE_IMG_FILE; + } else +#endif /* CONFIG_FILE_FWIMG */ + { + pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; + } + + switch (pFirmware->eFWSource) { + case FW_SOURCE_IMG_FILE: +#ifdef CONFIG_FILE_FWIMG + rtStatus = rtw_retrieve_from_file(fwfilepath, FwBuffer8188E, FW_8188E_SIZE); + pFirmware->ulFwLength = rtStatus >= 0 ? rtStatus : 0; + pFirmware->szFwBuffer = FwBuffer8188E; +#endif /* CONFIG_FILE_FWIMG */ + break; + case FW_SOURCE_HEADER_FILE: + if (bUsedWoWLANFw) { +#ifdef CONFIG_WOWLAN + if (pwrpriv->wowlan_mode) { + #ifdef CONFIG_SFW_SUPPORTED + if (IS_VENDOR_8188E_I_CUT_SERIES(padapter)) { + pFirmware->szFwBuffer = array_mp_8188e_s_fw_wowlan; + pFirmware->ulFwLength = array_length_mp_8188e_s_fw_wowlan; + } else + #endif + { + pFirmware->szFwBuffer = array_mp_8188e_t_fw_wowlan; + pFirmware->ulFwLength = array_length_mp_8188e_t_fw_wowlan; + } + RTW_INFO("%s fw:%s, size: %d\n", __func__, + "WoWLAN", pFirmware->ulFwLength); + } +#endif /*CONFIG_WOWLAN*/ + +#ifdef CONFIG_AP_WOWLAN + if (pwrpriv->wowlan_ap_mode) { + pFirmware->szFwBuffer = array_mp_8188e_t_fw_ap; + pFirmware->ulFwLength = array_length_mp_8188e_t_fw_ap; + + RTW_INFO("%s fw: %s, size: %d\n", __func__, + "AP_WoWLAN", pFirmware->ulFwLength); + } +#endif /*CONFIG_AP_WOWLAN*/ + } else { +#ifdef CONFIG_SFW_SUPPORTED + if (IS_VENDOR_8188E_I_CUT_SERIES(padapter)) { + pFirmware->szFwBuffer = array_mp_8188e_s_fw_nic; + pFirmware->ulFwLength = array_length_mp_8188e_s_fw_nic; + } else +#endif + { + pFirmware->szFwBuffer = array_mp_8188e_t_fw_nic; + pFirmware->ulFwLength = array_length_mp_8188e_t_fw_nic; + } + RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength); + } + break; + } + + tmp_fw_len = IS_VENDOR_8188E_I_CUT_SERIES(padapter) ? FW_8188E_SIZE_2 : FW_8188E_SIZE; + + if ((pFirmware->ulFwLength - 32) > tmp_fw_len) { + rtStatus = _FAIL; + RTW_ERR("Firmware size:%u exceed %u\n", pFirmware->ulFwLength, tmp_fw_len); + goto exit; + } + + pFirmwareBuf = pFirmware->szFwBuffer; + FirmwareLen = pFirmware->ulFwLength; + + /* To Check Fw header. Added by tynli. 2009.12.04. */ + pFwHdr = (PRT_8188E_FIRMWARE_HDR)pFirmwareBuf; + + pHalData->firmware_version = le16_to_cpu(pFwHdr->Version); + pHalData->firmware_sub_version = pFwHdr->Subversion; + pHalData->FirmwareSignature = le16_to_cpu(pFwHdr->Signature); + + RTW_INFO("%s: fw_ver=%x fw_subver=%04x sig=0x%x, Month=%02x, Date=%02x, Hour=%02x, Minute=%02x\n", + __FUNCTION__, pHalData->firmware_version, pHalData->firmware_sub_version, pHalData->FirmwareSignature + , pFwHdr->Month, pFwHdr->Date, pFwHdr->Hour, pFwHdr->Minute); + + if (IS_FW_HEADER_EXIST_88E(pFwHdr)) { + /* Shift 32 bytes for FW header */ + pFirmwareBuf = pFirmwareBuf + 32; + FirmwareLen = FirmwareLen - 32; + } + + /* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */ + /* or it will cause download Fw fail. 2010.02.01. by tynli. */ + if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */ + rtw_write8(padapter, REG_MCUFWDL, 0x00); + _8051Reset88E(padapter); + } + + _FWDownloadEnable_8188E(padapter, _TRUE); + fwdl_start_time = rtw_get_current_time(); + while (!RTW_CANNOT_IO(padapter) + && (write_fw++ < 3 || rtw_get_passing_time_ms(fwdl_start_time) < 500)) { + /* reset FWDL chksum */ + rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_ChkSum_rpt); + + rtStatus = _WriteFW(padapter, pFirmwareBuf, FirmwareLen); + if (rtStatus != _SUCCESS) + continue; + + rtStatus = polling_fwdl_chksum(padapter, 5, 50); + if (rtStatus == _SUCCESS) + break; + } + _FWDownloadEnable_8188E(padapter, _FALSE); + if (_SUCCESS != rtStatus) + goto fwdl_stat; + + rtStatus = _FWFreeToGo(padapter, 10, 200); + if (_SUCCESS != rtStatus) + goto fwdl_stat; + +fwdl_stat: + RTW_INFO("FWDL %s. write_fw:%u, %dms\n" + , (rtStatus == _SUCCESS) ? "success" : "fail" + , write_fw + , rtw_get_passing_time_ms(fwdl_start_time) + ); + +exit: + if (pFirmware) + rtw_mfree((u8 *)pFirmware, sizeof(RT_FIRMWARE_8188E)); + + rtl8188e_InitializeFirmwareVars(padapter); + + return rtStatus; +} + +void rtl8188e_InitializeFirmwareVars(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + + /* Init Fw LPS related. */ + pwrpriv->bFwCurrentInPSMode = _FALSE; + + /* Init H2C cmd. */ + rtw_write8(padapter, REG_HMETFR, 0x0f); + + /* Init H2C counter. by tynli. 2009.12.09. */ + pHalData->LastHMEBoxNum = 0; +} + +/* *********************************************************** + * Efuse related code + * *********************************************************** */ +enum { + VOLTAGE_V25 = 0x03, + LDOE25_SHIFT = 28 , +}; + +static BOOLEAN +hal_EfusePgPacketWrite2ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); +static BOOLEAN +hal_EfusePgPacketWrite1ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); +static BOOLEAN +hal_EfusePgPacketWriteData( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest); + +static void +hal_EfusePowerSwitch_RTL8188E( + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) +{ + u8 tempval; + u16 tmpV16; + HAL_DATA_TYPE *pHal = GET_HAL_DATA(pAdapter); + + if (PwrState == _TRUE) { + rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); +#if 0 + /* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */ + tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL); + if (!(tmpV16 & PWC_EV12V)) { + tmpV16 |= PWC_EV12V ; + rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16); + } +#endif + /* Reset: 0x0000h[28], default valid */ + tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN); + if (!(tmpV16 & FEN_ELDR)) { + tmpV16 |= FEN_ELDR ; + rtw_write16(pAdapter, REG_SYS_FUNC_EN, tmpV16); + } + + /* Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid */ + tmpV16 = rtw_read16(pAdapter, REG_SYS_CLKR); + if ((!(tmpV16 & LOADER_CLK_EN)) || (!(tmpV16 & ANA8M))) { + tmpV16 |= (LOADER_CLK_EN | ANA8M) ; + rtw_write16(pAdapter, REG_SYS_CLKR, tmpV16); + } + + if (bWrite == _TRUE) { + /* Enable LDO 2.5V before read/write action */ + tempval = rtw_read8(pAdapter, EFUSE_TEST + 3); + if (GET_CVID_CUT_VERSION(pHal->version_id) >= I_CUT_VERSION) { + tempval &= 0x87; + tempval |= 0x38; /* 0x34[30:27] = 0b'0111, Use LDO 2.25V, Suggested by SD1 Pisa */ + } else { + tempval &= 0x87; + tempval |= 0x18; /* 0x34[30:27] = 0b'0011, Use LDO 2.54V */ + } + rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval | 0x80)); + } + } else { + rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); + + if (bWrite == _TRUE) { + /* Disable LDO 2.5V after read/write action */ + tempval = rtw_read8(pAdapter, EFUSE_TEST + 3); + rtw_write8(pAdapter, EFUSE_TEST + 3, (tempval & 0x7F)); + } + } +} + +static void +rtl8188e_EfusePowerSwitch( + PADAPTER pAdapter, + u8 bWrite, + u8 PwrState) +{ + hal_EfusePowerSwitch_RTL8188E(pAdapter, bWrite, PwrState); +} + +static void +Hal_EfuseReadEFuse88E( + PADAPTER Adapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + BOOLEAN bPseudoTest +) +{ + /* u8 efuseTbl[EFUSE_MAP_LEN_88E]; */ + u8 *efuseTbl = NULL; + u8 rtemp8[1]; + u16 eFuse_Addr = 0; + u8 offset, wren; + u16 i, j; + /* u16 eFuseWord[EFUSE_MAX_SECTION_88E][EFUSE_MAX_WORD_UNIT]; */ + u16 **eFuseWord = NULL; + u16 efuse_utilized = 0; + u8 efuse_usage = 0; + u8 u1temp = 0; + + /* */ + /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */ + /* */ + if ((_offset + _size_byte) > EFUSE_MAP_LEN_88E) { + /* total E-Fuse table is 512bytes */ + RTW_INFO("Hal_EfuseReadEFuse88E(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte); + goto exit; + } + + efuseTbl = (u8 *)rtw_zmalloc(EFUSE_MAP_LEN_88E); + if (efuseTbl == NULL) { + RTW_INFO("%s: alloc efuseTbl fail!\n", __FUNCTION__); + goto exit; + } + + eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, 2); + if (eFuseWord == NULL) { + RTW_INFO("%s: alloc eFuseWord fail!\n", __FUNCTION__); + goto exit; + } + + /* 0. Refresh efuse init map as all oxFF. */ + for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) + for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) + eFuseWord[i][j] = 0xFFFF; + + /* */ + /* 1. Read the first byte to check if efuse is empty!!! */ + /* */ + /* */ + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + if (*rtemp8 != 0xFF) { + efuse_utilized++; + /* RTW_INFO("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); */ + eFuse_Addr++; + } else { + RTW_INFO("EFUSE is empty efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8); + goto exit; + } + + + /* */ + /* 2. Read real efuse content. Filter PG header and every section data. */ + /* */ + while ((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); */ + + /* Check PG header for section num. */ + if ((*rtemp8 & 0x1F) == 0x0F) { /* extended header */ + u1temp = ((*rtemp8 & 0xE0) >> 5); + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x *rtemp&0xE0 0x%x\n", u1temp, *rtemp8 & 0xE0)); */ + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header u1temp=%x\n", u1temp)); */ + + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header efuse_Addr-%d efuse_data=%x\n", eFuse_Addr, *rtemp8)); */ + + if ((*rtemp8 & 0x0F) == 0x0F) { + eFuse_Addr++; + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + + if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) + eFuse_Addr++; + continue; + } else { + offset = ((*rtemp8 & 0xF0) >> 1) | u1temp; + wren = (*rtemp8 & 0x0F); + eFuse_Addr++; + } + } else { + offset = ((*rtemp8 >> 4) & 0x0f); + wren = (*rtemp8 & 0x0f); + } + + if (offset < EFUSE_MAX_SECTION_88E) { + /* Get word enable value from PG header */ + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); */ + + for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { + /* Check word enable condition in the section */ + if (!(wren & 0x01)) { + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); */ + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + eFuse_Addr++; + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ + efuse_utilized++; + eFuseWord[offset][i] = (*rtemp8 & 0xff); + + + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d", eFuse_Addr)); */ + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + eFuse_Addr++; + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Data=0x%x\n", *rtemp8)); */ + + efuse_utilized++; + eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); + + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + } + + wren >>= 1; + + } + } else { /* deal with error offset,skip error data */ + RTW_PRINT("invalid offset:0x%02x\n", offset); + for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) { + /* Check word enable condition in the section */ + if (!(wren & 0x01)) { + eFuse_Addr++; + efuse_utilized++; + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + eFuse_Addr++; + efuse_utilized++; + if (eFuse_Addr >= EFUSE_REAL_CONTENT_LEN_88E) + break; + } + } + } + /* Read next PG header */ + ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); + /* RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d rtemp 0x%x\n", eFuse_Addr, *rtemp8)); */ + + if (*rtemp8 != 0xFF && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) { + efuse_utilized++; + eFuse_Addr++; + } + } + + /* */ + /* 3. Collect 16 sections and 4 word unit into Efuse map. */ + /* */ + for (i = 0; i < EFUSE_MAX_SECTION_88E; i++) { + for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) { + efuseTbl[(i * 8) + (j * 2)] = (eFuseWord[i][j] & 0xff); + efuseTbl[(i * 8) + ((j * 2) + 1)] = ((eFuseWord[i][j] >> 8) & 0xff); + } + } + + + /* */ + /* 4. Copy from Efuse map to output pointer memory!!! */ + /* */ + for (i = 0; i < _size_byte; i++) + pbuf[i] = efuseTbl[_offset + i]; + + /* */ + /* 5. Calculate Efuse utilization. */ + /* */ + efuse_usage = (u8)((eFuse_Addr * 100) / EFUSE_REAL_CONTENT_LEN_88E); + rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); + +exit: + if (efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_88E); + + if (eFuseWord) + rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16)); +} + +static void +ReadEFuseByIC( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + BOOLEAN bPseudoTest +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +#ifdef DBG_IOL_READ_EFUSE_MAP + u8 logical_map[512]; +#endif + +#ifdef CONFIG_IOL_READ_EFUSE_MAP + if (!bPseudoTest) { /* && rtw_IOL_applied(Adapter)) */ + int ret = _FAIL; + if (rtw_IOL_applied(Adapter)) { + rtw_hal_power_on(Adapter); + + iol_mode_enable(Adapter, 1); +#ifdef DBG_IOL_READ_EFUSE_MAP + iol_read_efuse(Adapter, 0, _offset, _size_byte, logical_map); +#else + ret = iol_read_efuse(Adapter, 0, _offset, _size_byte, pbuf); +#endif + iol_mode_enable(Adapter, 0); + + if (_SUCCESS == ret) + goto exit; + } + } +#endif + Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); + +exit: + +#ifdef DBG_IOL_READ_EFUSE_MAP + if (_rtw_memcmp(logical_map, pHalData->efuse_eeprom_data, 0x130) == _FALSE) { + int i; + RTW_INFO("%s compare first 0x130 byte fail\n", __FUNCTION__); + for (i = 0; i < 512; i++) { + if (i % 16 == 0) + RTW_INFO("0x%03x: ", i); + RTW_INFO("%02x ", logical_map[i]); + if (i % 16 == 15) + RTW_INFO("\n"); + } + RTW_INFO("\n"); + } +#endif + + return; +} + +static void +ReadEFuse_Pseudo( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + BOOLEAN bPseudoTest +) +{ + Hal_EfuseReadEFuse88E(Adapter, _offset, _size_byte, pbuf, bPseudoTest); +} + +static void +rtl8188e_ReadEFuse( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + BOOLEAN bPseudoTest +) +{ + if (bPseudoTest) + ReadEFuse_Pseudo(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); + else + ReadEFuseByIC(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); +} + +/* Do not support BT */ +void +Hal_EFUSEGetEfuseDefinition88E( + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut +) +{ + switch (type) { + case TYPE_EFUSE_MAX_SECTION: { + u8 *pMax_section; + pMax_section = (u8 *)pOut; + *pMax_section = EFUSE_MAX_SECTION_88E; + } + break; + case TYPE_EFUSE_REAL_CONTENT_LEN: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_EFUSE_CONTENT_LEN_BANK: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_EFUSE_MAP_LEN: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; + } + break; + case TYPE_EFUSE_PROTECT_BYTES_BANK: { + u8 *pu1Tmp; + pu1Tmp = (u8 *)pOut; + *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + default: { + u8 *pu1Tmp; + pu1Tmp = (u8 *)pOut; + *pu1Tmp = 0; + } + break; + } +} +void +Hal_EFUSEGetEfuseDefinition_Pseudo88E( + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut +) +{ + switch (type) { + case TYPE_EFUSE_MAX_SECTION: { + u8 *pMax_section; + pMax_section = (u8 *)pOut; + *pMax_section = EFUSE_MAX_SECTION_88E; + } + break; + case TYPE_EFUSE_REAL_CONTENT_LEN: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_EFUSE_CONTENT_LEN_BANK: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_88E; + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_88E-EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + case TYPE_EFUSE_MAP_LEN: { + u16 *pu2Tmp; + pu2Tmp = (u16 *)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_88E; + } + break; + case TYPE_EFUSE_PROTECT_BYTES_BANK: { + u8 *pu1Tmp; + pu1Tmp = (u8 *)pOut; + *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES_88E); + } + break; + default: { + u8 *pu1Tmp; + pu1Tmp = (u8 *)pOut; + *pu1Tmp = 0; + } + break; + } +} + + +static void +rtl8188e_EFUSE_GetEfuseDefinition( + PADAPTER pAdapter, + u8 efuseType, + u8 type, + void *pOut, + BOOLEAN bPseudoTest +) +{ + if (bPseudoTest) + Hal_EFUSEGetEfuseDefinition_Pseudo88E(pAdapter, efuseType, type, pOut); + else + Hal_EFUSEGetEfuseDefinition88E(pAdapter, efuseType, type, pOut); +} + +static u8 +Hal_EfuseWordEnableDataWrite(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + u16 tmpaddr = 0; + u16 start_addr = efuse_addr; + u8 badworden = 0x0F; + u8 tmpdata[8]; + + _rtw_memset((void *)tmpdata, 0xff, PGPKT_DATA_SIZE); + + if (!(word_en & BIT0)) { + tmpaddr = start_addr; + efuse_OneByteWrite(pAdapter, start_addr++, data[0], bPseudoTest); + efuse_OneByteWrite(pAdapter, start_addr++, data[1], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + + efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[0], bPseudoTest); + efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[1], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + + if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1])) + badworden &= (~BIT0); + } + if (!(word_en & BIT1)) { + tmpaddr = start_addr; + efuse_OneByteWrite(pAdapter, start_addr++, data[2], bPseudoTest); + efuse_OneByteWrite(pAdapter, start_addr++, data[3], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + + efuse_OneByteRead(pAdapter, tmpaddr , &tmpdata[2], bPseudoTest); + efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[3], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + + if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3])) + badworden &= (~BIT1); + } + if (!(word_en & BIT2)) { + tmpaddr = start_addr; + efuse_OneByteWrite(pAdapter, start_addr++, data[4], bPseudoTest); + efuse_OneByteWrite(pAdapter, start_addr++, data[5], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + + efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[4], bPseudoTest); + efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[5], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + + if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5])) + badworden &= (~BIT2); + } + if (!(word_en & BIT3)) { + tmpaddr = start_addr; + efuse_OneByteWrite(pAdapter, start_addr++, data[6], bPseudoTest); + efuse_OneByteWrite(pAdapter, start_addr++, data[7], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + + efuse_OneByteRead(pAdapter, tmpaddr, &tmpdata[6], bPseudoTest); + efuse_OneByteRead(pAdapter, tmpaddr + 1, &tmpdata[7], bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + + if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7])) + badworden &= (~BIT3); + } + return badworden; +} + +static u8 +Hal_EfuseWordEnableDataWrite_Pseudo(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + u8 ret = 0; + + ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); + + return ret; +} + +static u8 +rtl8188e_Efuse_WordEnableDataWrite(PADAPTER pAdapter, + u16 efuse_addr, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + u8 ret = 0; + + if (bPseudoTest) + ret = Hal_EfuseWordEnableDataWrite_Pseudo(pAdapter, efuse_addr, word_en, data, bPseudoTest); + else + ret = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); + + return ret; +} + + +static u16 +hal_EfuseGetCurrentSize_8188e(PADAPTER pAdapter, + BOOLEAN bPseudoTest) +{ + int bContinual = _TRUE; + + u16 efuse_addr = 0; + u8 hoffset = 0, hworden = 0; + u8 efuse_data, word_cnts = 0; + + if (bPseudoTest) + efuse_addr = (u16)(fakeEfuseUsedBytes); + else + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); */ + + while (bContinual && + efuse_OneByteRead(pAdapter, efuse_addr , &efuse_data, bPseudoTest) && + AVAILABLE_EFUSE_ADDR(efuse_addr)) { + if (efuse_data != 0xFF) { + if ((efuse_data & 0x1F) == 0x0F) { /* extended header */ + efuse_addr++; + efuse_OneByteRead(pAdapter, efuse_addr , &efuse_data, bPseudoTest); + if ((efuse_data & 0x0F) == 0x0F) { + efuse_addr++; + continue; + } else { + hworden = efuse_data & 0x0F; + } + } else { + hworden = efuse_data & 0x0F; + } + word_cnts = Efuse_CalculateWordCnts(hworden); + /* read next header */ + efuse_addr = efuse_addr + (word_cnts * 2) + 1; + } else + bContinual = _FALSE ; + } + + if (bPseudoTest) { + fakeEfuseUsedBytes = efuse_addr; + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", fakeEfuseUsedBytes)); */ + } else { + rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), return %d\n", efuse_addr)); */ + } + + return efuse_addr; +} + +static u16 +Hal_EfuseGetCurrentSize_Pseudo(PADAPTER pAdapter, + BOOLEAN bPseudoTest) +{ + u16 ret = 0; + + ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); + + return ret; +} + + +static u16 +rtl8188e_EfuseGetCurrentSize( + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest) +{ + u16 ret = 0; + + if (bPseudoTest) + ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); + else + ret = hal_EfuseGetCurrentSize_8188e(pAdapter, bPseudoTest); + + + return ret; +} + + +static int +hal_EfusePgPacketRead_8188e( + PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) +{ + u8 ReadState = PG_STATE_HEADER; + + int bContinual = _TRUE; + int bDataEmpty = _TRUE ; + + u8 efuse_data, word_cnts = 0; + u16 efuse_addr = 0; + u8 hoffset = 0, hworden = 0; + u8 tmpidx = 0; + u8 tmpdata[8]; + u8 max_section = 0; + u8 tmp_header = 0; + + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (void *)&max_section, bPseudoTest); + + if (data == NULL) + return _FALSE; + if (offset > max_section) + return _FALSE; + + _rtw_memset((void *)data, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); + _rtw_memset((void *)tmpdata, 0xff, sizeof(u8) * PGPKT_DATA_SIZE); + + + /* */ + /* Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. */ + /* Skip dummy parts to prevent unexpected data read from Efuse. */ + /* By pass right now. 2009.02.19. */ + /* */ + while (bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr)) { + /* ------- Header Read ------------- */ + if (ReadState & PG_STATE_HEADER) { + if (efuse_OneByteRead(pAdapter, efuse_addr , &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { + if (EXT_HEADER(efuse_data)) { + tmp_header = efuse_data; + efuse_addr++; + efuse_OneByteRead(pAdapter, efuse_addr , &efuse_data, bPseudoTest); + if (!ALL_WORDS_DISABLED(efuse_data)) { + hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } else { + RTW_INFO("Error, All words disabled\n"); + efuse_addr++; + continue; + } + } else { + hoffset = (efuse_data >> 4) & 0x0F; + hworden = efuse_data & 0x0F; + } + word_cnts = Efuse_CalculateWordCnts(hworden); + bDataEmpty = _TRUE ; + + if (hoffset == offset) { + for (tmpidx = 0; tmpidx < word_cnts * 2 ; tmpidx++) { + if (efuse_OneByteRead(pAdapter, efuse_addr + 1 + tmpidx , &efuse_data, bPseudoTest)) { + tmpdata[tmpidx] = efuse_data; + if (efuse_data != 0xff) + bDataEmpty = _FALSE; + } + } + if (bDataEmpty == _FALSE) + ReadState = PG_STATE_DATA; + else { /* read next header */ + efuse_addr = efuse_addr + (word_cnts * 2) + 1; + ReadState = PG_STATE_HEADER; + } + } else { /* read next header */ + efuse_addr = efuse_addr + (word_cnts * 2) + 1; + ReadState = PG_STATE_HEADER; + } + + } else + bContinual = _FALSE ; + } + /* ------- Data section Read ------------- */ + else if (ReadState & PG_STATE_DATA) { + efuse_WordEnableDataRead(hworden, tmpdata, data); + efuse_addr = efuse_addr + (word_cnts * 2) + 1; + ReadState = PG_STATE_HEADER; + } + + } + + if ((data[0] == 0xff) && (data[1] == 0xff) && (data[2] == 0xff) && (data[3] == 0xff) && + (data[4] == 0xff) && (data[5] == 0xff) && (data[6] == 0xff) && (data[7] == 0xff)) + return _FALSE; + else + return _TRUE; + +} + +static int +Hal_EfusePgPacketRead(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret = 0; + + ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); + + + return ret; +} + +static int +Hal_EfusePgPacketRead_Pseudo(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret = 0; + + ret = hal_EfusePgPacketRead_8188e(pAdapter, offset, data, bPseudoTest); + + return ret; +} + +static int +rtl8188e_Efuse_PgPacketRead(PADAPTER pAdapter, + u8 offset, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret = 0; + + if (bPseudoTest) + ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); + else + ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); + + return ret; +} + +static BOOLEAN +hal_EfuseFixHeaderProcess( + PADAPTER pAdapter, + u8 efuseType, + PPGPKT_STRUCT pFixPkt, + u16 *pAddr, + BOOLEAN bPseudoTest +) +{ + u8 originaldata[8], badworden = 0; + u16 efuse_addr = *pAddr; + u32 PgWriteSuccess = 0; + + _rtw_memset((void *)originaldata, 0xff, 8); + + if (Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) { + /* check if data exist */ + badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pFixPkt->word_en, originaldata, bPseudoTest); + + if (badworden != 0xf) { /* write fail */ + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); + + if (!PgWriteSuccess) + return _FALSE; + else + efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); + } else + efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1; + } else + efuse_addr = efuse_addr + (pFixPkt->word_cnts * 2) + 1; + *pAddr = efuse_addr; + return _TRUE; +} + +static BOOLEAN +hal_EfusePgPacketWrite2ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) +{ + BOOLEAN bRet = _FALSE, bContinual = _TRUE; + u16 efuse_addr = *pAddr, efuse_max_available_len = 0; + u8 pg_header = 0, tmp_header = 0, pg_header_temp = 0; + u8 repeatcnt = 0; + + /* RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); */ + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + + while (efuse_addr < efuse_max_available_len) { + pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; + /* RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); */ + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + while (tmp_header == 0xFF || pg_header != tmp_header) { + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); */ + return _FALSE; + } + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + } + + /* to write ext_header */ + if (tmp_header == pg_header) { + efuse_addr++; + pg_header_temp = pg_header; + pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + while (tmp_header == 0xFF || pg_header != tmp_header) { + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); */ + return _FALSE; + } + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + } + + if ((tmp_header & 0x0F) == 0x0F) { /* word_en PG fail */ + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); */ + return _FALSE; + } else { + efuse_addr++; + continue; + } + } else if (pg_header != tmp_header) { /* offset PG fail */ + PGPKT_STRUCT fixPkt; + /* RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); */ + fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); + fixPkt.word_en = tmp_header & 0x0F; + fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); + if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; + } else { + bRet = _TRUE; + break; + } + } else if ((tmp_header & 0x1F) == 0x0F) { /* wrong extended header */ + efuse_addr += 2; + continue; + } + } + + *pAddr = efuse_addr; + return bRet; +} + +static BOOLEAN +hal_EfusePgPacketWrite1ByteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) +{ + BOOLEAN bRet = _FALSE; + u8 pg_header = 0, tmp_header = 0; + u16 efuse_addr = *pAddr; + u8 repeatcnt = 0; + + /* RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); */ + pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en; + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); + + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); + + while (tmp_header == 0xFF || pg_header != tmp_header) { + if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) + return _FALSE; + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + } + + if (pg_header == tmp_header) + bRet = _TRUE; + else { + PGPKT_STRUCT fixPkt; + /* RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); */ + fixPkt.offset = (tmp_header >> 4) & 0x0F; + fixPkt.word_en = tmp_header & 0x0F; + fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); + if (!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; + } + + *pAddr = efuse_addr; + return bRet; +} + +static BOOLEAN +hal_EfusePgPacketWriteData( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) +{ + BOOLEAN bRet = _FALSE; + u16 efuse_addr = *pAddr; + u8 badworden = 0; + u32 PgWriteSuccess = 0; + + badworden = 0x0f; + badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); + if (badworden == 0x0F) { + /* write ok */ + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); */ + return _TRUE; + } else { + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); */ + /* reorganize other pg packet */ + + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + + if (!PgWriteSuccess) + return _FALSE; + else + return _TRUE; + } + + return bRet; +} + +static BOOLEAN +hal_EfusePgPacketWriteHeader( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest) +{ + BOOLEAN bRet = _FALSE; + + if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) + bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + else + bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + + return bRet; +} + +static BOOLEAN +wordEnMatched( + PPGPKT_STRUCT pTargetPkt, + PPGPKT_STRUCT pCurPkt, + u8 *pWden +) +{ + u8 match_word_en = 0x0F; /* default all words are disabled */ + u8 i; + + /* check if the same words are enabled both target and current PG packet */ + if (((pTargetPkt->word_en & BIT0) == 0) && + ((pCurPkt->word_en & BIT0) == 0)) { + match_word_en &= ~BIT0; /* enable word 0 */ + } + if (((pTargetPkt->word_en & BIT1) == 0) && + ((pCurPkt->word_en & BIT1) == 0)) { + match_word_en &= ~BIT1; /* enable word 1 */ + } + if (((pTargetPkt->word_en & BIT2) == 0) && + ((pCurPkt->word_en & BIT2) == 0)) { + match_word_en &= ~BIT2; /* enable word 2 */ + } + if (((pTargetPkt->word_en & BIT3) == 0) && + ((pCurPkt->word_en & BIT3) == 0)) { + match_word_en &= ~BIT3; /* enable word 3 */ + } + + *pWden = match_word_en; + + if (match_word_en != 0xf) + return _TRUE; + else + return _FALSE; +} + +static BOOLEAN +hal_EfuseCheckIfDatafollowed( + PADAPTER pAdapter, + u8 word_cnts, + u16 startAddr, + BOOLEAN bPseudoTest +) +{ + BOOLEAN bRet = _FALSE; + u8 i, efuse_data; + + for (i = 0; i < (word_cnts * 2) ; i++) { + if (efuse_OneByteRead(pAdapter, (startAddr + i) , &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) + bRet = _TRUE; + } + + return bRet; +} + +static BOOLEAN +hal_EfusePartialWriteCheck( + PADAPTER pAdapter, + u8 efuseType, + u16 *pAddr, + PPGPKT_STRUCT pTargetPkt, + BOOLEAN bPseudoTest +) +{ + BOOLEAN bRet = _FALSE; + u8 i, efuse_data = 0, cur_header = 0; + u8 new_wden = 0, matched_wden = 0, badworden = 0; + u16 startAddr = 0, efuse_max_available_len = 0, efuse_max = 0; + PGPKT_STRUCT curPkt; + + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (void *)&efuse_max_available_len, bPseudoTest); + EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&efuse_max, bPseudoTest); + + if (efuseType == EFUSE_WIFI) { + if (bPseudoTest) + startAddr = (u16)(fakeEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); + else { + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); + startAddr %= EFUSE_REAL_CONTENT_LEN; + } + } else { + if (bPseudoTest) + startAddr = (u16)(fakeBTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); + else + startAddr = (u16)(BTEfuseUsedBytes % EFUSE_REAL_CONTENT_LEN); + } + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); */ + + while (1) { + if (startAddr >= efuse_max_available_len) { + bRet = _FALSE; + break; + } + + if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data != 0xFF)) { + if (EXT_HEADER(efuse_data)) { + cur_header = efuse_data; + startAddr++; + efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); */ + bRet = _FALSE; + break; + } else { + curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + curPkt.word_en = efuse_data & 0x0F; + } + } else { + cur_header = efuse_data; + curPkt.offset = (cur_header >> 4) & 0x0F; + curPkt.word_en = cur_header & 0x0F; + } + + curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); + /* if same header is found but no data followed */ + /* write some part of data followed by the header. */ + if ((curPkt.offset == pTargetPkt->offset) && + (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr + 1, bPseudoTest)) && + wordEnMatched(pTargetPkt, &curPkt, &matched_wden)) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); */ + /* Here to write partial data */ + badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr + 1, matched_wden, pTargetPkt->data, bPseudoTest); + if (badworden != 0x0F) { + u32 PgWriteSuccess = 0; + /* if write fail on some words, write these bad words again */ + + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + + if (!PgWriteSuccess) { + bRet = _FALSE; /* write fail, return */ + break; + } + } + /* partial write ok, update the target packet for later use */ + for (i = 0; i < 4; i++) { + if ((matched_wden & (0x1 << i)) == 0) { /* this word has been written */ + pTargetPkt->word_en |= (0x1 << i); /* disable the word */ + } + } + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + } + /* read from next header */ + startAddr = startAddr + (curPkt.word_cnts * 2) + 1; + } else { + /* not used header, 0xff */ + *pAddr = startAddr; + /* RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); */ + bRet = _TRUE; + break; + } + } + return bRet; +} + +static BOOLEAN +hal_EfusePgCheckAvailableAddr( + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest +) +{ + u16 efuse_max_available_len = 0; + + /* Change to check TYPE_EFUSE_MAP_LEN ,beacuse 8188E raw 256,logic map over 256. */ + EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&efuse_max_available_len, _FALSE); + + /* EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&efuse_max_available_len, bPseudoTest); */ + /* RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); */ + + if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) { + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); */ + return _FALSE; + } + return _TRUE; +} + +static void +hal_EfuseConstructPGPkt( + u8 offset, + u8 word_en, + u8 *pData, + PPGPKT_STRUCT pTargetPkt + +) +{ + _rtw_memset((void *)pTargetPkt->data, 0xFF, sizeof(u8) * 8); + pTargetPkt->offset = offset; + pTargetPkt->word_en = word_en; + efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + + /* RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); */ +} + + + +static BOOLEAN +hal_EfusePgPacketWrite_8188e( + PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *pData, + BOOLEAN bPseudoTest +) +{ + PGPKT_STRUCT targetPkt; + u16 startAddr = 0; + u8 efuseType = EFUSE_WIFI; + + if (!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) + return _FALSE; + + hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); + + if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + return _FALSE; + + return _TRUE; +} + + +static int +Hal_EfusePgPacketWrite_Pseudo(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret; + + ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); + + return ret; +} + +static int +Hal_EfusePgPacketWrite(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret = 0; + ret = hal_EfusePgPacketWrite_8188e(pAdapter, offset, word_en, data, bPseudoTest); + + + return ret; +} + +static int +rtl8188e_Efuse_PgPacketWrite(PADAPTER pAdapter, + u8 offset, + u8 word_en, + u8 *data, + BOOLEAN bPseudoTest) +{ + int ret; + + if (bPseudoTest) + ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); + else + ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); + return ret; +} + +static void read_chip_version_8188e(PADAPTER padapter) +{ + u32 value32; + HAL_DATA_TYPE *pHalData; + + pHalData = GET_HAL_DATA(padapter); + + value32 = rtw_read32(padapter, REG_SYS_CFG); + pHalData->version_id.ICType = CHIP_8188E; + pHalData->version_id.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); + + pHalData->version_id.RFType = RF_TYPE_1T1R; + pHalData->version_id.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC); + pHalData->version_id.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */ + + /* For regulator mode. by tynli. 2011.01.14 */ + pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); + + pHalData->version_id.ROMVer = 0; /* ROM code version. */ + pHalData->MultiFunc = RT_MULTI_FUNC_NONE; + +#if 1 + dump_chip_info(pHalData->version_id); +#endif + +} + +void rtl8188e_start_thread(_adapter *padapter) +{ +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + + if (xmitpriv->SdioXmitThread == NULL) { + RTW_INFO(FUNC_ADPT_FMT " start RTWHALXT\n", FUNC_ADPT_ARG(padapter)); + xmitpriv->SdioXmitThread = kthread_run(rtl8188es_xmit_thread, padapter, "RTWHALXT"); + if (IS_ERR(xmitpriv->SdioXmitThread)) { + RTW_ERR("%s: start rtl8188es_xmit_thread FAIL!!\n", __func__); + xmitpriv->SdioXmitThread = NULL; + } + } +#endif +#endif +} + +void rtl8188e_stop_thread(_adapter *padapter) +{ +#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +#ifndef CONFIG_SDIO_TX_TASKLET + struct xmit_priv *xmitpriv = &padapter->xmitpriv; + #ifdef SDIO_FREE_XMIT_BUF_SEMA + rtw_sdio_free_xmitbuf_sema_up(xmitpriv); + rtw_sdio_free_xmitbuf_sema_down(xmitpriv); + #endif + /* stop xmit_buf_thread */ + if (xmitpriv->SdioXmitThread) { + _rtw_up_sema(&xmitpriv->SdioXmitSema); + rtw_thread_stop(xmitpriv->SdioXmitThread); + xmitpriv->SdioXmitThread = NULL; + } +#endif +#endif +} +void hal_notch_filter_8188e(_adapter *adapter, bool enable) +{ + if (enable) { + RTW_INFO("Enable notch filter\n"); + rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) | BIT1); + } else { + RTW_INFO("Disable notch filter\n"); + rtw_write8(adapter, rOFDM0_RxDSP + 1, rtw_read8(adapter, rOFDM0_RxDSP + 1) & ~BIT1); + } +} + +void init_hal_spec_8188e(_adapter *adapter) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + hal_spec->ic_name = "rtl8188e"; + hal_spec->macid_num = 64; + hal_spec->sec_cam_ent_num = 32; + hal_spec->sec_cap = 0; + hal_spec->macid_cap = MACID_DROP; + + hal_spec->rfpath_num_2g = 1; + hal_spec->rfpath_num_5g = 0; + hal_spec->rf_reg_path_num = hal_spec->rf_reg_path_avail_num = 1; + hal_spec->rf_reg_trx_path_bmp = 0x11; + hal_spec->max_tx_cnt = 1; + + hal_spec->tx_nss_num = 1; + hal_spec->rx_nss_num = 1; + hal_spec->band_cap = BAND_CAP_2G; + hal_spec->bw_cap = BW_CAP_20M | BW_CAP_40M; + hal_spec->port_num = 2; + hal_spec->proto_cap = PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N; + + hal_spec->txgi_max = 63; + hal_spec->txgi_pdbm = 2; + + hal_spec->wl_func = 0 + | WL_FUNC_P2P + | WL_FUNC_MIRACAST + | WL_FUNC_TDLS + ; + + hal_spec->tx_aclt_unit_factor = 1; + + hal_spec->pg_txpwr_saddr = 0x10; + hal_spec->pg_txgi_diff_factor = 1; + + rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter) + , REG_MACID_PAUSE_0 + , REG_MACID_PAUSE_1, 0, 0); + rtw_macid_ctl_init_drop_reg(adapter_to_macidctl(adapter) + , REG_MACID_NO_LINK_0 + , REG_MACID_NO_LINK_1 + , 0, 0); + +} + +#ifdef CONFIG_RFKILL_POLL +bool rtl8188e_gpio_radio_on_off_check(_adapter *adapter, u8 *valid) +{ + u32 tmp32; + bool ret; + +#ifdef CONFIG_PCI_HCI +#if 1 + *valid = 0; + return _FALSE; /* unblock */ +#else + tmp32 = rtw_read32(adapter, REG_GSSR); + ret = (tmp32 & BIT(31)) ? _FALSE : _TRUE; /* Power down pin output value, low active */ + *valid = 1; + + return ret; +#endif +#else + *valid = 0; + return _FALSE; /* unblock */ +#endif +} +#endif + + +void InitBeaconParameters_8188e(_adapter *adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + + rtw_write16(adapter, REG_BCN_CTRL, (DIS_TSF_UDT << 8) | DIS_TSF_UDT); + + /* TBTT setup time */ + rtw_write8(adapter, REG_TBTT_PROHIBIT, TBTT_PROHIBIT_SETUP_TIME); + + /* TBTT hold time: 0x540[19:8] */ + rtw_write8(adapter, REG_TBTT_PROHIBIT + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF); + rtw_write8(adapter, REG_TBTT_PROHIBIT + 2, + (rtw_read8(adapter, REG_TBTT_PROHIBIT + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8)); + + rtw_write8(adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8188E); /* 5ms */ + rtw_write8(adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8188E); /* 2ms */ + + /* Suggested by designer timchen. Change beacon AIFS to the largest number */ + /* beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */ + rtw_write16(adapter, REG_BCNTCFG, 0x4413); + +} + +static void +_BeaconFunctionEnable( + PADAPTER padapter, + BOOLEAN Enable, + BOOLEAN Linked +) +{ + rtw_write8(padapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB)); + + rtw_write8(padapter, REG_RD_CTRL + 1, 0x6F); +} + +void SetBeaconRelatedRegisters8188E(PADAPTER padapter) +{ + u32 value32; + /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */ + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u32 bcn_ctrl_reg = REG_BCN_CTRL; + /* reset TSF, enable update TSF, correcting TSF On Beacon */ + + /* REG_MBSSID_BCN_SPACE */ + /* REG_BCNDMATIM */ + /* REG_ATIMWND */ + /* REG_TBTT_PROHIBIT */ + /* REG_DRVERLYINT */ + /* REG_BCN_MAX_ERR */ + /* REG_BCNTCFG */ /* (0x510) */ + /* REG_DUAL_TSF_RST */ + /* REG_BCN_CTRL */ /* (0x550) */ + + +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->hw_port == HW_PORT1) + bcn_ctrl_reg = REG_BCN_CTRL_1; +#endif + /* */ + /* ATIM window */ + /* */ + rtw_write16(padapter, REG_ATIMWND, 2); + + /* */ + /* Beacon interval (in unit of TU). */ + /* */ + rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval); + + InitBeaconParameters_8188e(padapter); + + rtw_write8(padapter, REG_SLOT, 0x09); + + /* */ + /* Force beacon frame transmission even after receiving beacon frame from other ad hoc STA */ + /* */ + /* PlatformEFIOWrite1Byte(Adapter, BCN_ERR_THRESH, 0x0a); */ /* We force beacon sent to prevent unexpect disconnect status in Ad hoc mode */ + + /* */ + /* Reset TSF Timer to zero, added by Roger. 2008.06.24 */ + /* */ + value32 = rtw_read32(padapter, REG_TCR); + value32 &= ~TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + value32 |= TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + /* TODO: Modify later (Find the right parameters) */ + /* NOTE: Fix test chip's bug (about contention windows's randomness) */ + if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE | WIFI_AP_STATE | WIFI_MESH_STATE) == _TRUE) { + rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); + rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); + } + + _BeaconFunctionEnable(padapter, _TRUE, _TRUE); + + ResumeTxBeacon(padapter); + rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg) | DIS_BCNQ_SUB); +} + +void rtl8188e_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params) +{ + u8 vo_reg_params[4]; + u8 vi_reg_params[4]; + u8 be_reg_params[4]; + u8 bk_reg_params[4]; + + GetHwReg8188E(adapter, HW_VAR_AC_PARAM_VO, vo_reg_params); + GetHwReg8188E(adapter, HW_VAR_AC_PARAM_VI, vi_reg_params); + GetHwReg8188E(adapter, HW_VAR_AC_PARAM_BE, be_reg_params); + GetHwReg8188E(adapter, HW_VAR_AC_PARAM_BK, bk_reg_params); + + vo_params[0] = vo_reg_params[0]; + vo_params[1] = vo_reg_params[1] & 0x0F; + vo_params[2] = (vo_reg_params[1] & 0xF0) >> 4; + vo_params[3] = ((vo_reg_params[3] << 8) | (vo_reg_params[2])) * 32; + + vi_params[0] = vi_reg_params[0]; + vi_params[1] = vi_reg_params[1] & 0x0F; + vi_params[2] = (vi_reg_params[1] & 0xF0) >> 4; + vi_params[3] = ((vi_reg_params[3] << 8) | (vi_reg_params[2])) * 32; + + be_params[0] = be_reg_params[0]; + be_params[1] = be_reg_params[1] & 0x0F; + be_params[2] = (be_reg_params[1] & 0xF0) >> 4; + be_params[3] = ((be_reg_params[3] << 8) | (be_reg_params[2])) * 32; + + bk_params[0] = bk_reg_params[0]; + bk_params[1] = bk_reg_params[1] & 0x0F; + bk_params[2] = (bk_reg_params[1] & 0xF0) >> 4; + bk_params[3] = ((bk_reg_params[3] << 8) | (bk_reg_params[2])) * 32; + + vo_params[1] = (1 << vo_params[1]) - 1; + vo_params[2] = (1 << vo_params[2]) - 1; + vi_params[1] = (1 << vi_params[1]) - 1; + vi_params[2] = (1 << vi_params[2]) - 1; + be_params[1] = (1 << be_params[1]) - 1; + be_params[2] = (1 << be_params[2]) - 1; + bk_params[1] = (1 << bk_params[1]) - 1; + bk_params[2] = (1 << bk_params[2]) - 1; +} + +void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc) +{ + pHalFunc->dm_init = &rtl8188e_init_dm_priv; + pHalFunc->dm_deinit = &rtl8188e_deinit_dm_priv; + + pHalFunc->read_chip_version = read_chip_version_8188e; + + pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8188E; + + pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8188E; + pHalFunc->set_tx_power_index_handler = PHY_SetTxPowerIndex_8188E; + pHalFunc->get_tx_power_index_handler = hal_com_get_txpwr_idx; + pHalFunc->get_txpwr_target_extra_bias = phy_get_txpwr_target_extra_bias_8188e; + + pHalFunc->hal_dm_watchdog = &rtl8188e_HalDmWatchDog; + + pHalFunc->run_thread = &rtl8188e_start_thread; + pHalFunc->cancel_thread = &rtl8188e_stop_thread; + + pHalFunc->read_bbreg = &PHY_QueryBBReg8188E; + pHalFunc->write_bbreg = &PHY_SetBBReg8188E; + pHalFunc->read_rfreg = &PHY_QueryRFReg8188E; + pHalFunc->write_rfreg = &PHY_SetRFReg8188E; + + pHalFunc->read_wmmedca_reg = &rtl8188e_read_wmmedca_reg; + + /* Efuse related function */ + pHalFunc->EfusePowerSwitch = &rtl8188e_EfusePowerSwitch; + pHalFunc->ReadEFuse = &rtl8188e_ReadEFuse; + pHalFunc->EFUSEGetEfuseDefinition = &rtl8188e_EFUSE_GetEfuseDefinition; + pHalFunc->EfuseGetCurrentSize = &rtl8188e_EfuseGetCurrentSize; + pHalFunc->Efuse_PgPacketRead = &rtl8188e_Efuse_PgPacketRead; + pHalFunc->Efuse_PgPacketWrite = &rtl8188e_Efuse_PgPacketWrite; + pHalFunc->Efuse_WordEnableDataWrite = &rtl8188e_Efuse_WordEnableDataWrite; + +#ifdef DBG_CONFIG_ERROR_DETECT + pHalFunc->sreset_init_value = &sreset_init_value; + pHalFunc->sreset_reset_value = &sreset_reset_value; + pHalFunc->silentreset = &sreset_reset; + pHalFunc->sreset_xmit_status_check = &rtl8188e_sreset_xmit_status_check; + pHalFunc->sreset_linked_status_check = &rtl8188e_sreset_linked_status_check; + pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; + pHalFunc->sreset_inprogress = &sreset_inprogress; +#endif /* DBG_CONFIG_ERROR_DETECT */ + + pHalFunc->GetHalODMVarHandler = GetHalODMVar; + pHalFunc->SetHalODMVarHandler = SetHalODMVar; + +#ifdef CONFIG_IOL + pHalFunc->IOL_exec_cmds_sync = &rtl8188e_IOL_exec_cmds_sync; +#endif + + pHalFunc->hal_notch_filter = &hal_notch_filter_8188e; + pHalFunc->fill_h2c_cmd = &FillH2CCmd_88E; + pHalFunc->fill_fake_txdesc = &rtl8188e_fill_fake_txdesc; + pHalFunc->fw_dl = &rtl8188e_FirmwareDownload; + pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8188E; + +#ifdef CONFIG_GPIO_API + pHalFunc->hal_gpio_func_check = &rtl8188e_GpioFuncCheck; +#endif +#ifdef CONFIG_RFKILL_POLL + pHalFunc->hal_radio_onoff_check = rtl8188e_gpio_radio_on_off_check; +#endif +} + +u8 GetEEPROMSize8188E(PADAPTER padapter) +{ + u8 size = 0; + u32 cr; + + cr = rtw_read16(padapter, REG_9346CR); + /* 6: EEPROM used is 93C46, 4: boot from E-Fuse. */ + size = (cr & BOOT_FROM_EEPROM) ? 6 : 4; + + RTW_INFO("EEPROM type is %s\n", size == 4 ? "E-FUSE" : "93C46"); + + return size; +} + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_PCI_HCI) || defined(CONFIG_GSPI_HCI) +/* ------------------------------------------------------------------------- + * + * LLT R/W/Init function + * + * ------------------------------------------------------------------------- */ +s32 _LLTWrite(PADAPTER padapter, u32 address, u32 data) +{ + s32 status = _SUCCESS; + s8 count = POLLING_LLT_THRESHOLD; + u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); + + rtw_write32(padapter, REG_LLT_INIT, value); + + /* polling */ + do { + value = rtw_read32(padapter, REG_LLT_INIT); + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) + break; + } while (--count); + + if (count <= 0) { + RTW_INFO("Failed to polling write LLT done at address %d!\n", address); + status = _FAIL; + } + + return status; +} + +u8 _LLTRead(PADAPTER padapter, u32 address) +{ + s32 count = POLLING_LLT_THRESHOLD; + u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); + u16 LLTReg = REG_LLT_INIT; + + + rtw_write32(padapter, LLTReg, value); + + /* polling and get value */ + do { + value = rtw_read32(padapter, LLTReg); + if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) + return (u8)value; + } while (--count); + + + + + return 0xFF; +} + +s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy) +{ + s32 status = _FAIL; + u32 i; + u32 Last_Entry_Of_TxPktBuf = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter);/* 176, 22k */ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +#if defined(CONFIG_IOL_LLT) + if (rtw_IOL_applied(padapter)) + status = iol_InitLLTTable(padapter, txpktbuf_bndy); + else +#endif + { + for (i = 0; i < (txpktbuf_bndy - 1); i++) { + status = _LLTWrite(padapter, i, i + 1); + if (_SUCCESS != status) + return status; + } + + /* end of list */ + status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF); + if (_SUCCESS != status) + return status; + + /* Make the other pages as ring buffer */ + /* This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. */ + /* Otherwise used as local loopback buffer. */ + for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) { + status = _LLTWrite(padapter, i, (i + 1)); + if (_SUCCESS != status) + return status; + } + + /* Let last entry point to the start entry of ring buffer */ + status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy); + if (_SUCCESS != status) + return status; + } + + return status; +} +#endif + + +void +Hal_InitPGData88E(PADAPTER padapter) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 i; + u16 value16; + + if (_FALSE == pHalData->bautoload_fail_flag) { + /* autoload OK. */ + if (is_boot_from_eeprom(padapter)) { + /* Read all Content from EEPROM or EFUSE. */ + for (i = 0; i < HWSET_MAX_SIZE; i += 2) { + /* value16 = EF2Byte(ReadEEprom(pAdapter, (u16) (i>>1))); + * *((u16*)(&PROMContent[i])) = value16; */ + } + } else { + /* Read EFUSE real map to shadow. */ + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + } else { + /* autoload fail */ + /* pHalData->AutoloadFailFlag = _TRUE; */ + /* update to default value 0xFF */ + if (!is_boot_from_eeprom(padapter)) + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + +#ifdef CONFIG_EFUSE_CONFIG_FILE + if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { + if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) + RTW_ERR("invalid phy efuse and read from file fail, will use driver default!!\n"); + } +#endif +} + +void +Hal_EfuseParseIDCode88E( + PADAPTER padapter, + u8 *hwinfo +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u16 EEPROMId; + + + /* Checl 0x8129 again for making sure autoload status!! */ + EEPROMId = le16_to_cpu(*((u16 *)hwinfo)); + if (EEPROMId != RTL_EEPROM_ID) { + RTW_INFO("EEPROM ID(%#x) is invalid!!\n", EEPROMId); + pHalData->bautoload_fail_flag = _TRUE; + } else + pHalData->bautoload_fail_flag = _FALSE; + + RTW_INFO("EEPROM ID=0x%04x\n", EEPROMId); +} + +void Hal_ReadPowerSavingMode88E( + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + u8 tmpvalue; + + if (AutoLoadFail) { + pwrctl->bHWPowerdown = _FALSE; + pwrctl->bSupportRemoteWakeup = _FALSE; + } else { + + /* hw power down mode selection , 0:rf-off / 1:power down */ + + if (padapter->registrypriv.hwpdn_mode == 2) + pwrctl->bHWPowerdown = (hwinfo[EEPROM_RF_FEATURE_OPTION_88E] & BIT4); + else + pwrctl->bHWPowerdown = padapter->registrypriv.hwpdn_mode; + + /* decide hw if support remote wakeup function */ + /* if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume */ +#ifdef CONFIG_USB_HCI + pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1) ? _TRUE : _FALSE; +#endif /* CONFIG_USB_HCI */ + + RTW_INFO("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n", __FUNCTION__, + pwrctl->bHWPwrPindetect, pwrctl->bHWPowerdown, pwrctl->bSupportRemoteWakeup); + + RTW_INFO("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n", padapter->registrypriv.power_mgnt, padapter->registrypriv.usbss_enable); + + } + +} + +void +Hal_ReadTxPowerInfo88E( + PADAPTER padapter, + u8 *PROMContent, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + pHalData->txpwr_pg_mode = TXPWR_PG_WITH_PWR_IDX; + + /* 2010/10/19 MH Add Regulator recognize for EU. */ + if (!AutoLoadFail) { + struct registry_priv *registry_par = &padapter->registrypriv; + + if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) + pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7); /* bit0~2 */ + else + pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x7); /* bit0~2 */ + + } else + pHalData->EEPROMRegulatory = 0; + RTW_INFO("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + +} + + +void +Hal_EfuseParseXtal_8188E( + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (!AutoLoadFail) { + pHalData->crystal_cap = hwinfo[EEPROM_XTAL_88E]; + if (pHalData->crystal_cap == 0xFF) + pHalData->crystal_cap = EEPROM_Default_CrystalCap_88E; + } else + pHalData->crystal_cap = EEPROM_Default_CrystalCap_88E; + RTW_INFO("crystal_cap: 0x%2x\n", pHalData->crystal_cap); +} + +void +Hal_ReadPAType_8188E( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 PA_LNAType_2G = 0; + + if (!AutoloadFail) { + if (GetRegAmplifierType2G(Adapter) == 0) { /* AUTO*/ + + /* PA & LNA Type */ + PA_LNAType_2G = LE_BITS_TO_1BYTE(&PROMContent[EEPROM_RFE_OPTION_8188E], 2, 2); /* 0xCA[3:2] */ + /* + ePA/eLNA sel.(ePA+eLNA=0x0, ePA+iLNA enable = 0x1, iPA+eLNA enable =0x2, iPA+iLNA=0x3) + */ + switch (PA_LNAType_2G) { + case 0: + pHalData->ExternalPA_2G = 1; + pHalData->ExternalLNA_2G = 1; + break; + case 1: + pHalData->ExternalPA_2G = 1; + pHalData->ExternalLNA_2G = 0; + break; + case 2: + pHalData->ExternalPA_2G = 0; + pHalData->ExternalLNA_2G = 1; + break; + case 3: + default: + pHalData->ExternalPA_2G = 0; + pHalData->ExternalLNA_2G = 0; + break; + } + } else { + pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_PA) ? 1 : 0; + pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0; + } +#if 0 + if (GetRegAmplifierType5G(Adapter) == 0) { /* AUTO */ + pHalData->external_pa_5g = ((pHalData->PAType_5G & BIT1) && (pHalData->PAType_5G & BIT0)) ? 1 : 0; + pHalData->external_lna_5g = ((pHalData->LNAType_5G & BIT7) && (pHalData->LNAType_5G & BIT3)) ? 1 : 0; /* 5G only now. */ + } else { + pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0; + pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0; + } +#endif + } else { + pHalData->ExternalPA_2G = EEPROM_Default_PAType; + pHalData->external_pa_5g = EEPROM_Default_PAType; + pHalData->ExternalLNA_2G = EEPROM_Default_LNAType; + pHalData->external_lna_5g = EEPROM_Default_LNAType; + + if (GetRegAmplifierType2G(Adapter) == 0) { + /* AUTO*/ + pHalData->ExternalPA_2G = EEPROM_Default_PAType; + pHalData->ExternalLNA_2G = EEPROM_Default_LNAType; + } else { + pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_PA) ? 1 : 0; + pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0; + } +#if 0 + if (GetRegAmplifierType5G(Adapter) == 0) { + /* AUTO */ + pHalData->external_pa_5g = 0; + pHalData->external_lna_5g = 0; + } else { + pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0; + pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0; + } +#endif + } + RTW_INFO("pHalData->ExternalPA_2G = %d , pHalData->ExternalLNA_2G = %d\n", pHalData->ExternalPA_2G, pHalData->ExternalLNA_2G); +} + +void +Hal_ReadAmplifierType_8188E( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 GLNA_type = 0; + + if (!AutoloadFail) { + if (GetRegGLNAType(Adapter) == 0) /* AUTO */ + GLNA_type = LE_BITS_TO_1BYTE(&PROMContent[EEPROM_RFE_OPTION_8188E], 4, 3); /* 0xCA[6:4] */ + else + GLNA_type = GetRegGLNAType(Adapter) & 0x7; + } else { + if (GetRegGLNAType(Adapter) == 0) /* AUTO */ + GLNA_type = 0; + else + GLNA_type = GetRegGLNAType(Adapter) & 0x7; + } + /* + Ext-LNA Gain sel.(form 10dB to 24dB, 1table/2dB,ext: 000=10dB, 001=12dB...) + */ + switch (GLNA_type) { + case 0: + pHalData->TypeGLNA = 0x1; /* (10dB) */ + break; + case 2: + pHalData->TypeGLNA = 0x2; /* (14dB) */ + break; + default: + pHalData->TypeGLNA = 0x0; /* (others not support) */ + break; + } + RTW_INFO("pHalData->TypeGLNA is 0x%x\n", pHalData->TypeGLNA); +} + +void +Hal_ReadRFEType_8188E( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + /* Keep the same flow as 8192EU to be extensible */ + const u8 RFETypeMaxVal = 1, RFETypeMask = 0x1; + + if (!AutoloadFail) { + if (GetRegRFEType(Adapter) != 64) { + pHalData->rfe_type = GetRegRFEType(Adapter); + /* + Above 1, rfe_type is filled the default value. + */ + if (pHalData->rfe_type > RFETypeMaxVal) + pHalData->rfe_type = EEPROM_DEFAULT_RFE_OPTION_8188E; + + } else if ((0xFF == PROMContent[EEPROM_RFE_OPTION_8188E]) || + ((pHalData->ExternalPA_2G == 0) && (pHalData->ExternalLNA_2G == 0))) + pHalData->rfe_type = EEPROM_DEFAULT_RFE_OPTION_8188E; + else { + /* + type 0:0x00 for 88EE/ER_HP RFE control + */ + pHalData->rfe_type = PROMContent[EEPROM_RFE_OPTION_8188E] & RFETypeMask; /* 0xCA[1:0] */ + } + } else { + if (GetRegRFEType(Adapter) != 64) { + pHalData->rfe_type = GetRegRFEType(Adapter); + /* + Above 3, rfe_type is filled the default value. + */ + if (pHalData->rfe_type > RFETypeMaxVal) + pHalData->rfe_type = EEPROM_DEFAULT_RFE_OPTION_8188E; + + } else + pHalData->rfe_type = EEPROM_DEFAULT_RFE_OPTION_8188E; + + } + + RTW_INFO("pHalData->rfe_type is 0x%x\n", pHalData->rfe_type); +} + +void +Hal_EfuseParseBoardType88E( + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (!AutoLoadFail) { + pHalData->InterfaceSel = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E] & 0xE0) >> 5); + if (hwinfo[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) + pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5; + } else + pHalData->InterfaceSel = 0; + RTW_INFO("Board Type: 0x%2x\n", pHalData->InterfaceSel); +} + +void +Hal_EfuseParseEEPROMVer88E( + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (!AutoLoadFail) { + pHalData->EEPROMVersion = hwinfo[EEPROM_VERSION_88E]; + if (pHalData->EEPROMVersion == 0xFF) + pHalData->EEPROMVersion = EEPROM_Default_Version; + } else + pHalData->EEPROMVersion = 1; +} + +void +rtl8188e_EfuseParseChnlPlan( + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + hal_com_config_channel_plan( + padapter + , hwinfo ? &hwinfo[EEPROM_COUNTRY_CODE_88E] : NULL + , hwinfo ? hwinfo[EEPROM_ChannelPlan_88E] : 0xFF + , padapter->registrypriv.alpha2 + , padapter->registrypriv.channel_plan + , AutoLoadFail + ); +} + +void +Hal_EfuseParseCustomerID88E( + PADAPTER padapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (!AutoLoadFail) { + pHalData->EEPROMCustomerID = hwinfo[EEPROM_CustomID_88E]; + /* pHalData->EEPROMSubCustomerID = hwinfo[EEPROM_CustomID_88E]; */ + } else { + pHalData->EEPROMCustomerID = 0; + pHalData->EEPROMSubCustomerID = 0; + } + RTW_INFO("EEPROM Customer ID: 0x%2x\n", pHalData->EEPROMCustomerID); + /* RTW_INFO("EEPROM SubCustomer ID: 0x%02x\n", pHalData->EEPROMSubCustomerID); */ +} + + +void +Hal_ReadAntennaDiversity88E( + PADAPTER pAdapter, + u8 *PROMContent, + BOOLEAN AutoLoadFail +) +{ +#ifdef CONFIG_ANTENNA_DIVERSITY + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + struct registry_priv *registry_par = &pAdapter->registrypriv; + + if (!AutoLoadFail) { + /* Antenna Diversity setting. */ + if (registry_par->antdiv_cfg == 2) { /* 2:By EFUSE */ + pHalData->AntDivCfg = (PROMContent[EEPROM_RF_BOARD_OPTION_88E] & 0x18) >> 3; + if (PROMContent[EEPROM_RF_BOARD_OPTION_88E] == 0xFF) + pHalData->AntDivCfg = (EEPROM_DEFAULT_BOARD_OPTION & 0x18) >> 3; + } else { + pHalData->AntDivCfg = registry_par->antdiv_cfg ; /* 0:OFF , 1:ON, 2:By EFUSE */ + } + + if (registry_par->antdiv_type == 0) { /* If TRxAntDivType is AUTO in advanced setting, use EFUSE value instead. */ + pHalData->TRxAntDivType = PROMContent[EEPROM_RF_ANTENNA_OPT_88E]; + if (pHalData->TRxAntDivType == 0xFF) + pHalData->TRxAntDivType = CG_TRX_HW_ANTDIV; /* For 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */ + } else + pHalData->TRxAntDivType = registry_par->antdiv_type ; + + if (pHalData->TRxAntDivType == CG_TRX_HW_ANTDIV || pHalData->TRxAntDivType == CGCS_RX_HW_ANTDIV) + pHalData->AntDivCfg = 1; /* 0xC1[3] is ignored. */ + } else + pHalData->AntDivCfg = 0; + + RTW_INFO("EEPROM : AntDivCfg = %x, TRxAntDivType = %x\n", pHalData->AntDivCfg, pHalData->TRxAntDivType); +#endif +} + +void +Hal_ReadThermalMeter_88E( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tempval; + + /* */ + /* ThermalMeter from EEPROM */ + /* */ + if (!AutoloadFail) + pHalData->eeprom_thermal_meter = PROMContent[EEPROM_THERMAL_METER_88E]; + else + pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_88E; + /* pHalData->eeprom_thermal_meter = (tempval&0x1f); */ /* [4:0] */ + + if (pHalData->eeprom_thermal_meter == 0xff || AutoloadFail) { + pHalData->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE; + pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_88E; + } + + /* pHalData->ThermalMeter[0] = pHalData->eeprom_thermal_meter; */ + RTW_INFO("ThermalMeter = 0x%x\n", pHalData->eeprom_thermal_meter); + +} + +#ifdef CONFIG_RF_POWER_TRIM +void Hal_ReadRFGainOffset( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 thermal_offset = 0; + /* */ + /* BB_RF Gain Offset from EEPROM */ + /* */ + + if (!AutoloadFail) { + pHalData->EEPROMRFGainOffset = PROMContent[EEPROM_RF_GAIN_OFFSET]; + + if ((pHalData->EEPROMRFGainOffset != 0xFF) && + (pHalData->EEPROMRFGainOffset & BIT4)) + efuse_OneByteRead(Adapter, EEPROM_RF_GAIN_VAL, &pHalData->EEPROMRFGainVal, _FALSE); + else { + pHalData->EEPROMRFGainOffset = 0; + pHalData->EEPROMRFGainVal = 0; + } + + RTW_INFO("pHalData->EEPROMRFGainVal=%x\n", pHalData->EEPROMRFGainVal); + } else { + efuse_OneByteRead(Adapter, EEPROM_RF_GAIN_VAL, &pHalData->EEPROMRFGainVal, _FALSE); + + if (pHalData->EEPROMRFGainVal != 0xFF) + pHalData->EEPROMRFGainOffset = BIT4; + else + pHalData->EEPROMRFGainOffset = 0; + RTW_INFO("else AutoloadFail =%x,\n", AutoloadFail); + } + + if (Adapter->registrypriv.RegPwrTrimEnable == 1) { + efuse_OneByteRead(Adapter, EEPROM_RF_GAIN_VAL, &pHalData->EEPROMRFGainVal, _FALSE); + RTW_INFO("pHalData->EEPROMRFGainVal=%x\n", pHalData->EEPROMRFGainVal); + + } + /* */ + /* BB_RF Thermal Offset from EEPROM */ + /* */ + if (((pHalData->EEPROMRFGainOffset != 0xFF) && (pHalData->EEPROMRFGainOffset & BIT4)) || (Adapter->registrypriv.RegPwrTrimEnable == 1)) { + + efuse_OneByteRead(Adapter, EEPROM_THERMAL_OFFSET, &thermal_offset, _FALSE); + if (thermal_offset != 0xFF) { + if (thermal_offset & BIT0) + pHalData->eeprom_thermal_meter += ((thermal_offset >> 1) & 0x0F); + else + pHalData->eeprom_thermal_meter -= ((thermal_offset >> 1) & 0x0F); + + RTW_INFO("%s =>thermal_offset:0x%02x pHalData->eeprom_thermal_meter=0x%02x\n", __FUNCTION__ , thermal_offset, pHalData->eeprom_thermal_meter); + } + } + + RTW_INFO("%s => EEPRORFGainOffset = 0x%02x,EEPROMRFGainVal=0x%02x,thermal_offset:0x%02x\n", + __FUNCTION__, pHalData->EEPROMRFGainOffset, pHalData->EEPROMRFGainVal, thermal_offset); + +} + +#endif /*CONFIG_RF_POWER_TRIM*/ + +BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter) +{ + u8 tmpvalue = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + + EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_FEATURE_OPTION_88E, (u32 *)&tmpvalue); + + /* 2010/08/25 MH INF priority > PDN Efuse value. */ + if (tmpvalue & BIT(4) && pwrctrlpriv->reg_pdnmode) + pHalData->pwrdown = _TRUE; + else + pHalData->pwrdown = _FALSE; + + RTW_INFO("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); + + return pHalData->pwrdown; +} /* HalDetectPwrDownMode */ + +#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) +void Hal_DetectWoWMode(PADAPTER pAdapter) +{ + adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; +} +#endif + +void _InitTransferPageSize(PADAPTER padapter) +{ + /* Tx page size is always 128. */ + + u8 value8; + value8 = _PSRX(PBP_128) | _PSTX(PBP_128); + rtw_write8(padapter, REG_PBP, value8); +} + + +static void hw_var_set_monitor(PADAPTER adapter, u8 variable, u8 *val) +{ +#ifdef CONFIG_WIFI_MONITOR + u32 tmp_32bit; + struct net_device *ndev = adapter->pnetdev; + struct mon_reg_backup *mon = &GET_HAL_DATA(adapter)->mon_backup; + + mon->known_rcr = 1; + rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)& mon->rcr); + + /* Receive all type */ + tmp_32bit = RCR_AAP | RCR_APP_PHYST_RXFF; + + if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) { + /* Append FCS */ + tmp_32bit |= RCR_APPFCS; + } + + rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)& tmp_32bit); + + /* Receive all data frames */ + mon->known_rxfilter = 1; + mon->rxfilter0 = rtw_read16(adapter, REG_RXFLTMAP0); + mon->rxfilter1 = rtw_read16(adapter, REG_RXFLTMAP1); + mon->rxfilter2 = rtw_read16(adapter, REG_RXFLTMAP2); + rtw_write16(adapter, REG_RXFLTMAP0, 0xFFFF); + rtw_write16(adapter, REG_RXFLTMAP1, 0xFFFF); + rtw_write16(adapter, REG_RXFLTMAP2, 0xFFFF); +#endif /* CONFIG_WIFI_MONITOR */ +} + +static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val) +{ + u8 val8; + u8 mode = *((u8 *)val); + static u8 isMonitor = _FALSE; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if (isMonitor == _TRUE) { +#ifdef CONFIG_WIFI_MONITOR + struct mon_reg_backup *backup = &GET_HAL_DATA(Adapter)->mon_backup; + + if (backup->known_rcr) { + backup->known_rcr = 0; + rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&backup->rcr); + rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE); + } + if (backup->known_rxfilter) { + backup->known_rxfilter = 0; + rtw_write16(Adapter, REG_RXFLTMAP0, backup->rxfilter0); + rtw_write16(Adapter, REG_RXFLTMAP1, backup->rxfilter1); + rtw_write16(Adapter, REG_RXFLTMAP2, backup->rxfilter2); + } +#endif /* CONFIG_WIFI_MONITOR */ + isMonitor = _FALSE; + } + + RTW_INFO(ADPT_FMT "- Port-%d set opmode = %d\n", ADPT_ARG(Adapter), + get_hw_port(Adapter), mode); + + if (mode == _HW_STATE_MONITOR_) { + isMonitor = _TRUE; + /* set net_type */ + Set_MSR(Adapter, _HW_STATE_NOLINK_); + + hw_var_set_monitor(Adapter, variable, val); + return; + } + + rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(Adapter)); /* set mac addr to mac register */ + +#ifdef CONFIG_CONCURRENT_MODE + if (Adapter->hw_port == HW_PORT1) { + /* disable Port1 TSF update */ + rtw_iface_disable_tsf_update(Adapter); + + /* set net_type */ + Set_MSR(Adapter, mode); + + if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { + if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter)) { +#ifdef CONFIG_INTERRUPT_BASED_TXBCN +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* restore early int time to 5ms */ + +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE, 0, IMR_BCNDMAINT0_88E); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); +#endif + +#endif /* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , 0, (IMR_TBDER_88E | IMR_TBDOK_88E)); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)); +#endif + +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + + StopTxBeacon(Adapter); +#if defined(CONFIG_PCI_HCI) + UpdateInterruptMask8188EE(Adapter, 0, 0, RT_BCN_INT_MASKS, 0); +#endif + } + + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_ATIM); /* disable atim wnd and disable beacon function */ + /* rtw_write8(Adapter,REG_BCN_CTRL_1, DIS_TSF_UDT | EN_BCN_FUNCTION); */ + } else if (mode == _HW_STATE_ADHOC_) { + /* Beacon is polled to TXBUF */ + rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); + + ResumeTxBeacon(Adapter); + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); + /* BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 */ + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); + } else if (mode == _HW_STATE_AP_) { +#ifdef CONFIG_INTERRUPT_BASED_TXBCN +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , IMR_BCNDMAINT0_88E, 0); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); +#endif +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , (IMR_TBDER_88E | IMR_TBDOK_88E), 0); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK), 0); +#endif +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ + +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + + rtw_write8(Adapter, REG_BCN_CTRL_1, DIS_TSF_UDT | DIS_BCNQ_SUB); + + /* Beacon is polled to TXBUF */ + rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); + + /* enable to rx data frame */ + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + /* enable to rx ps-poll */ + rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); + + /* Beacon Control related register for first time */ + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */ + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* 5ms */ + /* rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); */ + rtw_write8(Adapter, REG_ATIMWND_1, 0x0c); /* 13ms for port1 */ + + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ + + /* reset TSF2 */ + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); + + + /* BIT4 - If set 0, hw will clr bcnq when tx becon ok/fail or port 1 */ + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); + /* enable BCN1 Function for if2 */ + /* don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) */ + rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT| EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); + + if (!rtw_mi_buddy_check_mlmeinfo_state(Adapter, WIFI_FW_ASSOC_SUCCESS)) + rtw_write8(Adapter, REG_BCN_CTRL, + rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); + + /* BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked */ + /* rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); */ + /* rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); */ + + /* dis BCN0 ATIM WND if if1 is station */ + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL) | DIS_ATIM); + +#ifdef CONFIG_TSF_RESET_OFFLOAD + /* Reset TSF for STA+AP concurrent mode */ + if (DEV_STA_LD_NUM(adapter_to_dvobj(Adapter))) { + if (rtw_hal_reset_tsf(Adapter, HW_PORT1) == _FAIL) + RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif /* CONFIG_TSF_RESET_OFFLOAD */ +#if defined(CONFIG_PCI_HCI) + UpdateInterruptMask8188EE(Adapter, RT_BCN_INT_MASKS, 0, 0, 0); +#endif + } + } else /* (Adapter->hw_port == HW_PORT1)*/ +#endif /* CONFIG_CONCURRENT_MODE */ + { +#ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/ + hw_var_set_opmode_mbid(Adapter, mode); +#else + /* disable Port0 TSF update */ + rtw_iface_disable_tsf_update(Adapter); + + /* set net_type */ + Set_MSR(Adapter, mode); + + if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) { +#ifdef CONFIG_CONCURRENT_MODE + if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter)) +#endif /*CONFIG_CONCURRENT_MODE*/ + { +#ifdef CONFIG_INTERRUPT_BASED_TXBCN +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* restore early int time to 5ms */ +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE, 0, IMR_BCNDMAINT0_88E); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK); +#endif +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , 0, (IMR_TBDER_88E | IMR_TBDOK_88E)); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)); +#endif +#endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ + +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + StopTxBeacon(Adapter); +#if defined(CONFIG_PCI_HCI) + UpdateInterruptMask8188EE(Adapter, 0, 0, RT_BCN_INT_MASKS, 0); +#endif + } + + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_ATIM); /* disable atim wnd */ + /* rtw_write8(Adapter,REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION); */ + } else if (mode == _HW_STATE_ADHOC_) { + /* Beacon is polled to TXBUF */ + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR) | BIT(8)); + + ResumeTxBeacon(Adapter); + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB); + /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */ + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); + } else if (mode == _HW_STATE_AP_) { +#ifdef CONFIG_INTERRUPT_BASED_TXBCN +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , IMR_BCNDMAINT0_88E, 0); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0); +#endif +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR +#if defined(CONFIG_USB_HCI) + UpdateInterruptMask8188EU(Adapter, _TRUE , (IMR_TBDER_88E | IMR_TBDOK_88E), 0); +#elif defined(CONFIG_SDIO_HCI) + UpdateInterruptMask8188ESdio(Adapter, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK), 0); +#endif +#endif/* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */ + +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + + rtw_write8(Adapter, REG_BCN_CTRL, DIS_TSF_UDT | DIS_BCNQ_SUB); + + /* Beacon is polled to TXBUF */ + rtw_write32(Adapter, REG_CR, rtw_read32(Adapter, REG_CR) | BIT(8)); + + /* enable to rx data frame */ + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + /* enable to rx ps-poll */ + rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); + + /* Beacon Control related register for first time */ + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); /* 2ms */ + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* 5ms */ + /* rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); */ + rtw_write8(Adapter, REG_ATIMWND, 0x0c); /* 13ms */ + + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/* +32767 (~32ms) */ + + /* reset TSF */ + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); + + /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */ + rtw_write8(Adapter, REG_MBID_NUM, rtw_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4)); + + /* enable BCN0 Function for if1 */ + /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */ +#if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR) + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT| EN_BCN_FUNCTION | EN_TXBCN_RPT | DIS_BCNQ_SUB)); +#else + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT | EN_BCN_FUNCTION | DIS_BCNQ_SUB)); +#endif + +#ifdef CONFIG_CONCURRENT_MODE + if (!rtw_mi_buddy_check_mlmeinfo_state(Adapter, WIFI_FW_ASSOC_SUCCESS)) + rtw_write8(Adapter, REG_BCN_CTRL_1, + rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); +#endif + + /* dis BCN1 ATIM WND if if2 is station */ + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1) | DIS_ATIM); +#ifdef CONFIG_TSF_RESET_OFFLOAD + /* Reset TSF for STA+AP concurrent mode */ + if (DEV_STA_LD_NUM(adapter_to_dvobj(Adapter))) { + if (rtw_hal_reset_tsf(Adapter, HW_PORT0) == _FAIL) + RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif /* CONFIG_TSF_RESET_OFFLOAD */ +#if defined(CONFIG_PCI_HCI) + UpdateInterruptMask8188EE(Adapter, RT_BCN_INT_MASKS, 0, 0, 0); +#endif + } +#endif + } +} + +u8 SetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + struct dm_struct *podmpriv = &pHalData->odmpriv; + u8 ret = _SUCCESS; + + switch (variable) { + + case HW_VAR_SET_OPMODE: + hw_var_set_opmode(adapter, variable, val); + break; + case HW_VAR_BASIC_RATE: + rtw_var_set_basic_rate(adapter, val); + break; + case HW_VAR_TXPAUSE: + rtw_write8(adapter, REG_TXPAUSE, *((u8 *)val)); + break; + + case HW_VAR_SLOT_TIME: { + rtw_write8(adapter, REG_SLOT, val[0]); + } + break; + case HW_VAR_ACK_PREAMBLE: { + u8 regTmp; + u8 bShortPreamble = *((PBOOLEAN)val); + /* Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */ + regTmp = (pHalData->nCur40MhzPrimeSC) << 5; + rtw_write8(adapter, REG_RRSR + 2, regTmp); + + regTmp = rtw_read8(adapter, REG_WMAC_TRXPTCL_CTL + 2); + if (bShortPreamble) + regTmp |= BIT1; + else + regTmp &= (~BIT1); + rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL + 2, regTmp); + } + break; + case HW_VAR_CAM_INVALID_ALL: + rtw_write32(adapter, REG_CAMCMD, BIT(31) | BIT(30)); + break; + case HW_VAR_AC_PARAM_VO: + rtw_write32(adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_AC_PARAM_VI: + rtw_write32(adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_AC_PARAM_BE: + pHalData->ac_param_be = ((u32 *)(val))[0]; + rtw_write32(adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_AC_PARAM_BK: + rtw_write32(adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); + break; + case HW_VAR_ACM_CTRL: { + u8 acm_ctrl = *((u8 *)val); + u8 AcmCtrl = rtw_read8(adapter, REG_ACMHWCTRL); + + if (acm_ctrl > 1) + AcmCtrl = AcmCtrl | 0x1; + + if (acm_ctrl & BIT(1)) + AcmCtrl |= AcmHw_VoqEn; + else + AcmCtrl &= (~AcmHw_VoqEn); + + if (acm_ctrl & BIT(2)) + AcmCtrl |= AcmHw_ViqEn; + else + AcmCtrl &= (~AcmHw_ViqEn); + + if (acm_ctrl & BIT(3)) + AcmCtrl |= AcmHw_BeqEn; + else + AcmCtrl &= (~AcmHw_BeqEn); + + RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl); + rtw_write8(adapter, REG_ACMHWCTRL, AcmCtrl); + } + break; +#ifdef CONFIG_80211N_HT + case HW_VAR_AMPDU_FACTOR: { + u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9}; + u8 RegToSet_BT[4] = {0x31, 0x74, 0x42, 0x97}; + u8 FactorToSet; + u8 *pRegToSet; + u8 index = 0; + +#ifdef CONFIG_BT_COEXIST + if ((pHalData->bt_coexist.BT_Coexist) && + (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4)) + pRegToSet = RegToSet_BT; /* 0x97427431; */ + else +#endif + pRegToSet = RegToSet_Normal; /* 0xb972a841; */ + + FactorToSet = *((u8 *)val); + if (FactorToSet <= 3) { + FactorToSet = (1 << (FactorToSet + 2)); + if (FactorToSet > 0xf) + FactorToSet = 0xf; + + for (index = 0; index < 4; index++) { + if ((pRegToSet[index] & 0xf0) > (FactorToSet << 4)) + pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet << 4); + + if ((pRegToSet[index] & 0x0f) > FactorToSet) + pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); + + rtw_write8(adapter, (REG_AGGLEN_LMT + index), pRegToSet[index]); + } + + } + } + break; +#endif /* CONFIG_80211N_HT */ + case HW_VAR_H2C_FW_PWRMODE: { + u8 psmode = (*(u8 *)val); + + rtl8188e_set_FwPwrMode_cmd(adapter, psmode); + } + break; + case HW_VAR_H2C_FW_JOINBSSRPT: { + u8 mstatus = (*(u8 *)val); + rtl8188e_set_FwJoinBssReport_cmd(adapter, mstatus); + } + break; +#ifdef CONFIG_P2P_PS + case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: { + u8 p2p_ps_state = (*(u8 *)val); + rtl8188e_set_p2p_ps_offload_cmd(adapter, p2p_ps_state); + } + break; +#endif /* CONFIG_P2P_PS */ +#ifdef CONFIG_BT_COEXIST + case HW_VAR_BT_SET_COEXIST: { + u8 bStart = (*(u8 *)val); + rtl8192c_set_dm_bt_coexist(adapter, bStart); + } + break; + case HW_VAR_BT_ISSUE_DELBA: { + u8 dir = (*(u8 *)val); + rtl8192c_issue_delete_ba(adapter, dir); + } + break; +#endif +#if (RATE_ADAPTIVE_SUPPORT == 1) + case HW_VAR_RPT_TIMER_SETTING: { + u16 min_rpt_time = (*(u16 *)val); + + odm_ra_set_tx_rpt_time(podmpriv, min_rpt_time); + } + break; +#endif + + case HW_VAR_EFUSE_BYTES: /* To set EFUE total used bytes, added by Roger, 2008.12.22. */ + pHalData->EfuseUsedBytes = *((u16 *)val); + break; + case HW_VAR_FIFO_CLEARN_UP: { + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter); + u8 trycnt = 100; + + /* pause tx */ + rtw_write8(adapter, REG_TXPAUSE, 0xff); + + /* keep sn */ + adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, REG_NQOS_SEQ); + + if (pwrpriv->bkeepfwalive != _TRUE) { + /* RX DMA stop */ + rtw_write32(adapter, REG_RXPKT_NUM, (rtw_read32(adapter, REG_RXPKT_NUM) | RW_RELEASE_EN)); + do { + if (!(rtw_read32(adapter, REG_RXPKT_NUM) & RXDMA_IDLE)) + break; + } while (trycnt--); + if (trycnt == 0) + RTW_INFO("Stop RX DMA failed......\n"); + + /* RQPN Load 0 */ + rtw_write16(adapter, REG_RQPN_NPQ, 0x0); + rtw_write32(adapter, REG_RQPN, 0x80000000); + rtw_mdelay_os(10); + } + } + break; + + case HW_VAR_RESTORE_HW_SEQ: + /* restore Sequence No. */ + rtw_write8(adapter, 0x4dc, adapter->xmitpriv.nqos_ssn); + break; + +#if (RATE_ADAPTIVE_SUPPORT == 1) + case HW_VAR_TX_RPT_MAX_MACID: { + u8 maxMacid = *val; + + RTW_INFO("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid + 1); + rtw_write8(adapter, REG_TX_RPT_CTRL + 1, maxMacid + 1); + } + break; +#endif /* (RATE_ADAPTIVE_SUPPORT == 1) */ + + case HW_VAR_BCN_VALID: + /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */ + rtw_write8(adapter, REG_TDECTRL + 2, rtw_read8(adapter, REG_TDECTRL + 2) | BIT0); + break; + + + case HW_VAR_CHECK_TXBUF: { + u8 retry_limit; + u16 val16; + u32 reg_200 = 0, reg_204 = 0; + u32 init_reg_200 = 0, init_reg_204 = 0; + systime start = rtw_get_current_time(); + u32 pass_ms; + int i = 0; + + retry_limit = 0x01; + + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); + + while (rtw_get_passing_time_ms(start) < 2000 + && !RTW_CANNOT_RUN(adapter) + ) { + reg_200 = rtw_read32(adapter, 0x200); + reg_204 = rtw_read32(adapter, 0x204); + + if (i == 0) { + init_reg_200 = reg_200; + init_reg_204 = reg_204; + } + + i++; + if ((reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { + /* RTW_INFO("%s: (HW_VAR_CHECK_TXBUF)TXBUF NOT empty - 0x204=0x%x, 0x200=0x%x (%d)\n", __FUNCTION__, reg_204, reg_200, i); */ + rtw_msleep_os(10); + } else + break; + } + + pass_ms = rtw_get_passing_time_ms(start); + + if (RTW_CANNOT_RUN(adapter)) + ; + else if (pass_ms >= 2000 || (reg_200 & 0x00ffffff) != (reg_204 & 0x00ffffff)) { + RTW_PRINT("%s:(HW_VAR_CHECK_TXBUF)NOT empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); + RTW_PRINT("%s:(HW_VAR_CHECK_TXBUF)0x200=0x%08x, 0x204=0x%08x (0x%08x, 0x%08x)\n", + __FUNCTION__, reg_200, reg_204, init_reg_200, init_reg_204); + /* rtw_warn_on(1); */ + } else + RTW_INFO("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); + + retry_limit = RL_VAL_STA; + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(adapter, REG_RETRY_LIMIT, val16); + } + break; + case HW_VAR_RESP_SIFS: { + struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; + + if ((pmlmeext->cur_wireless_mode == WIRELESS_11G) || + (pmlmeext->cur_wireless_mode == WIRELESS_11BG)) { /* WIRELESS_MODE_G){ */ + val[0] = 0x0a; + val[1] = 0x0a; + } else { + val[0] = 0x0e; + val[1] = 0x0e; + } + + /* SIFS for OFDM Data ACK */ + rtw_write8(adapter, REG_SIFS_CTX + 1, val[0]); + /* SIFS for OFDM consecutive tx like CTS data! */ + rtw_write8(adapter, REG_SIFS_TRX + 1, val[1]); + + rtw_write8(adapter, REG_SPEC_SIFS + 1, val[0]); + rtw_write8(adapter, REG_MAC_SPEC_SIFS + 1, val[0]); + + /* RESP_SIFS for OFDM */ + rtw_write8(adapter, REG_RESP_SIFS_OFDM, val[0]); + rtw_write8(adapter, REG_RESP_SIFS_OFDM + 1, val[0]); + } + break; + + case HW_VAR_MACID_LINK: { + u32 reg_macid_no_link; + u8 bit_shift; + u8 id = *(u8 *)val; + u32 val32; + + if (id < 32) { + reg_macid_no_link = REG_MACID_NO_LINK_0; + bit_shift = id; + } else if (id < 64) { + reg_macid_no_link = REG_MACID_NO_LINK_1; + bit_shift = id - 32; + } else { + rtw_warn_on(1); + break; + } + + val32 = rtw_read32(adapter, reg_macid_no_link); + if (!(val32 & BIT(bit_shift))) + break; + + val32 &= ~BIT(bit_shift); + rtw_write32(adapter, reg_macid_no_link, val32); + } + break; + + case HW_VAR_MACID_NOLINK: { + u32 reg_macid_no_link; + u8 bit_shift; + u8 id = *(u8 *)val; + u32 val32; + + if (id < 32) { + reg_macid_no_link = REG_MACID_NO_LINK_0; + bit_shift = id; + } else if (id < 64) { + reg_macid_no_link = REG_MACID_NO_LINK_1; + bit_shift = id - 32; + } else { + rtw_warn_on(1); + break; + } + + val32 = rtw_read32(adapter, reg_macid_no_link); + if (val32 & BIT(bit_shift)) + break; + + val32 |= BIT(bit_shift); + rtw_write32(adapter, reg_macid_no_link, val32); + } + break; + + default: + ret = SetHwReg(adapter, variable, val); + break; + } + + return ret; +} + +#ifdef CONFIG_PROC_DEBUG +struct qinfo_88e { + u32 head:8; + u32 pkt_num:8; + u32 tail:8; + u32 ac:2; + u32 macid:6; +}; + +struct bcn_qinfo_88e { + u16 head:8; + u16 pkt_num:8; +}; + +void dump_qinfo_88e(void *sel, struct qinfo_88e *info, const char *tag) +{ + /* if (info->pkt_num) */ + RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n" + , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac + ); +} + +void dump_bcn_qinfo_88e(void *sel, struct bcn_qinfo_88e *info, const char *tag) +{ + /* if (info->pkt_num) */ + RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n" + , tag ? tag : "", info->head, info->pkt_num + ); +} + +void dump_mac_qinfo_88e(void *sel, _adapter *adapter) +{ + u32 q0_info; + u32 q1_info; + u32 q2_info; + u32 q3_info; + /* + u32 q4_info; + u32 q5_info; + u32 q6_info; + u32 q7_info; + */ + u32 mg_q_info; + u32 hi_q_info; + u16 bcn_q_info; + + q0_info = rtw_read32(adapter, REG_Q0_INFO); + q1_info = rtw_read32(adapter, REG_Q1_INFO); + q2_info = rtw_read32(adapter, REG_Q2_INFO); + q3_info = rtw_read32(adapter, REG_Q3_INFO); + /* + q4_info = rtw_read32(adapter, REG_Q4_INFO); + q5_info = rtw_read32(adapter, REG_Q5_INFO); + q6_info = rtw_read32(adapter, REG_Q6_INFO); + q7_info = rtw_read32(adapter, REG_Q7_INFO); + */ + mg_q_info = rtw_read32(adapter, REG_MGQ_INFO); + hi_q_info = rtw_read32(adapter, REG_HGQ_INFO); + bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO); + + dump_qinfo_88e(sel, (struct qinfo_88e *)&q0_info, "Q0 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q1_info, "Q1 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q2_info, "Q2 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q3_info, "Q3 "); + /* + dump_qinfo_88e(sel, (struct qinfo_88e *)&q4_info, "Q4 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q5_info, "Q5 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q6_info, "Q6 "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&q7_info, "Q7 "); + */ + dump_qinfo_88e(sel, (struct qinfo_88e *)&mg_q_info, "MG "); + dump_qinfo_88e(sel, (struct qinfo_88e *)&hi_q_info, "HI "); + dump_bcn_qinfo_88e(sel, (struct bcn_qinfo_88e *)&bcn_q_info, "BCN "); +} + +static void dump_mac_txfifo_88e(void *sel, _adapter *adapter) +{ + u32 rqpn, rqpn_npq; + u32 hpq, lpq, npq, pubq; + + rqpn = rtw_read32(adapter, REG_FIFOPAGE); + rqpn_npq = rtw_read32(adapter, REG_RQPN_NPQ); + + hpq = (rqpn & 0xFF); + lpq = ((rqpn & 0xFF00)>>8); + pubq = ((rqpn & 0xFF0000)>>16); + npq = ((rqpn_npq & 0xFF00)>>8); + + RTW_PRINT_SEL(sel, "Tx: available page num: "); + if ((hpq == 0xEA) && (hpq == lpq) && (hpq == pubq)) + RTW_PRINT_SEL(sel, "N/A (reg val = 0xea)\n"); + else + RTW_PRINT_SEL(sel, "HPQ: %d, LPQ: %d, NPQ: %d, PUBQ: %d\n" + , hpq, lpq, npq, pubq); +} +#endif + +void GetHwReg8188E(_adapter *adapter, u8 variable, u8 *val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter); + u32 val32; + + switch (variable) { + case HW_VAR_SYS_CLKR: + *val = rtw_read8(adapter, REG_SYS_CLKR); + break; + + case HW_VAR_TXPAUSE: + val[0] = rtw_read8(adapter, REG_TXPAUSE); + break; + + case HW_VAR_BCN_VALID: + /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */ + val[0] = (BIT0 & rtw_read8(adapter, REG_TDECTRL + 2)) ? _TRUE : _FALSE; + break; + + case HW_VAR_AC_PARAM_VO: + val32 = rtw_read32(adapter, REG_EDCA_VO_PARAM); + val[0] = val32 & 0xFF; + val[1] = (val32 >> 8) & 0xFF; + val[2] = (val32 >> 16) & 0xFF; + val[3] = (val32 >> 24) & 0x07; + break; + + case HW_VAR_AC_PARAM_VI: + val32 = rtw_read32(adapter, REG_EDCA_VI_PARAM); + val[0] = val32 & 0xFF; + val[1] = (val32 >> 8) & 0xFF; + val[2] = (val32 >> 16) & 0xFF; + val[3] = (val32 >> 24) & 0x07; + break; + + case HW_VAR_AC_PARAM_BE: + val32 = rtw_read32(adapter, REG_EDCA_BE_PARAM); + val[0] = val32 & 0xFF; + val[1] = (val32 >> 8) & 0xFF; + val[2] = (val32 >> 16) & 0xFF; + val[3] = (val32 >> 24) & 0x07; + break; + + case HW_VAR_AC_PARAM_BK: + val32 = rtw_read32(adapter, REG_EDCA_BK_PARAM); + val[0] = val32 & 0xFF; + val[1] = (val32 >> 8) & 0xFF; + val[2] = (val32 >> 16) & 0xFF; + val[3] = (val32 >> 24) & 0x07; + break; + + case HW_VAR_EFUSE_BYTES: /* To get EFUE total used bytes, added by Roger, 2008.12.22. */ + *((u16 *)(val)) = pHalData->EfuseUsedBytes; + break; + case HW_VAR_CHK_HI_QUEUE_EMPTY: + *val = ((rtw_read32(adapter, REG_HGQ_INFO) & 0x0000ff00) == 0) ? _TRUE : _FALSE; + break; + case HW_VAR_CHK_MGQ_CPU_EMPTY: + *val = (rtw_read16(adapter, REG_TXPKT_EMPTY) & BIT8) ? _TRUE : _FALSE; + break; +#ifdef CONFIG_PROC_DEBUG + case HW_VAR_DUMP_MAC_QUEUE_INFO: + dump_mac_qinfo_88e(val, adapter); + break; + case HW_VAR_DUMP_MAC_TXFIFO: + dump_mac_txfifo_88e(val, adapter); + break; +#endif + default: + GetHwReg(adapter, variable, val); + break; + } + +} +void hal_ra_info_dump(_adapter *padapter , void *sel) +{ + int i; + u8 mac_id; + u8 bLinked = _FALSE; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + _adapter *iface; + + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if ((iface) && rtw_is_adapter_up(iface)) { + if (rtw_linked_check(iface)) { + bLinked = _TRUE; + break; + } + } + } + + for (i = 0; i < macid_ctl->num; i++) { + + if (rtw_macid_is_used(macid_ctl, i) && !rtw_macid_is_bmc(macid_ctl, i)) { + + mac_id = (u8) i; + + if (bLinked) { + RTW_PRINT_SEL(sel , "============ RA status - Mac_id:%d ===================\n", mac_id); + if (pHalData->fw_ractrl == _FALSE) { +#if (RATE_ADAPTIVE_SUPPORT == 1) + RTW_PRINT_SEL(sel , "Mac_id:%d ,RSSI:%d(%%)\n", mac_id, pHalData->odmpriv.ra_info[mac_id].rssi_sta_ra); + + RTW_PRINT_SEL(sel , "rate_sgi = %d, decision_rate = %s\n", rtw_get_current_tx_sgi(padapter, macid_ctl->sta[mac_id]), + HDATA_RATE(rtw_get_current_tx_rate(padapter, macid_ctl->sta[mac_id]))); + + RTW_PRINT_SEL(sel , "pt_stage = %d\n", pHalData->odmpriv.ra_info[mac_id].pt_stage); + + RTW_PRINT_SEL(sel , "rate_id = %d,ra_use_rate = 0x%08x\n", pHalData->odmpriv.ra_info[mac_id].rate_id, pHalData->odmpriv.ra_info[mac_id].ra_use_rate); + +#endif /* (RATE_ADAPTIVE_SUPPORT == 1)*/ + } else { + u8 cur_rate = 0; + u8 sgi = 0; + + if (padapter->fix_rate == 0xff) { + cur_rate = rtw_read8(padapter, REG_ADAPTIVE_DATA_RATE_0 + mac_id) & 0x7f; + sgi = (cur_rate & BIT7) ? _TRUE : _FALSE; + } else { + cur_rate = padapter->fix_rate & 0x7f; + sgi = ((padapter->fix_rate) & 0x80) >> 7; + } + + RTW_PRINT_SEL(sel , "Mac_id:%d ,SGI:%d ,Rate:%s\n", mac_id, sgi, HDATA_RATE(cur_rate)); + } + } + } + } +} + +u8 +GetHalDefVar8188E( + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch (eVariable) { + case HAL_DEF_IS_SUPPORT_ANT_DIV: +#ifdef CONFIG_ANTENNA_DIVERSITY + *((u8 *)pValue) = (pHalData->AntDivCfg == 0) ? _FALSE : _TRUE; +#endif + break; + case HAL_DEF_DRVINFO_SZ: + *((u32 *)pValue) = DRVINFO_SZ; + break; + case HAL_DEF_MAX_RECVBUF_SZ: +#ifdef CONFIG_SDIO_HCI + *((u32 *)pValue) = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter); +#else + *((u32 *)pValue) = MAX_RECVBUF_SZ; +#endif + break; + case HAL_DEF_RX_PACKET_OFFSET: + *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ * 8; + break; +#if (RATE_ADAPTIVE_SUPPORT == 1) + case HAL_DEF_RA_DECISION_RATE: { + u8 MacID = *((u8 *)pValue); + *((u8 *)pValue) = odm_ra_get_decision_rate_8188e(&(pHalData->odmpriv), MacID); + } + break; + + case HAL_DEF_RA_SGI: { + u8 MacID = *((u8 *)pValue); + *((u8 *)pValue) = odm_ra_get_sgi_8188e(&(pHalData->odmpriv), MacID); + } + break; +#endif + + + case HAL_DEF_PT_PWR_STATUS: +#if (POWER_TRAINING_ACTIVE == 1) + { + u8 MacID = *((u8 *)pValue); + *((u8 *)pValue) = odm_ra_get_hw_pwr_status_8188e(&(pHalData->odmpriv), MacID); + } +#endif /* (POWER_TRAINING_ACTIVE==1) */ + break; + case HAL_DEF_EXPLICIT_BEAMFORMEE: + case HAL_DEF_EXPLICIT_BEAMFORMER: + *((u8 *)pValue) = _FALSE; + break; + + case HW_DEF_RA_INFO_DUMP: + hal_ra_info_dump(Adapter, pValue); + break; + + case HAL_DEF_TX_PAGE_SIZE: + *((u32 *)pValue) = PAGE_SIZE_128; + break; + case HAL_DEF_TX_PAGE_BOUNDARY: + if (!Adapter->registrypriv.wifi_spec) + *(u8 *)pValue = TX_PAGE_BOUNDARY_88E(Adapter); + else + *(u8 *)pValue = WMM_NORMAL_TX_PAGE_BOUNDARY_88E(Adapter); + break; + case HAL_DEF_RX_DMA_SZ_WOW: + *(u32 *)pValue = RX_DMA_SIZE_88E(Adapter) - RESV_FMWF; + break; + case HAL_DEF_RX_DMA_SZ: + *(u32 *)pValue = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter); + break; + case HAL_DEF_RX_PAGE_SIZE: + *(u32 *)pValue = PAGE_SIZE_128; + break; + case HW_VAR_BEST_AMPDU_DENSITY: + *((u32 *)pValue) = AMPDU_DENSITY_VALUE_7; + break; + default: + bResult = GetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + +#ifdef CONFIG_GPIO_API +int rtl8188e_GpioFuncCheck(PADAPTER adapter, u8 gpio_num) +{ + int ret = _SUCCESS; + + if (IS_HARDWARE_TYPE_8188E(adapter) == _FAIL) { + if ((gpio_num > 7) || (gpio_num < 4)) { + RTW_INFO("%s The gpio number does not included 4~7.\n",__FUNCTION__); + ret = _FAIL; + } + } + + return ret; +} +#endif diff --git a/hal/rtl8188e/rtl8188e_phycfg.c b/hal/rtl8188e/rtl8188e_phycfg.c new file mode 100644 index 0000000..4ea3ee3 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_phycfg.c @@ -0,0 +1,1733 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_PHYCFG_C_ + +#include +#include + + +/*---------------------------Define Local Constant---------------------------*/ +/* Channel switch:The size of command tables for switch channel*/ +#define MAX_PRECMD_CNT 16 +#define MAX_RFDEPENDCMD_CNT 16 +#define MAX_POSTCMD_CNT 16 + +#define MAX_DOZE_WAITING_TIMES_9x 64 + +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ + +/*------------------------Define local variable------------------------------*/ + + +/*--------------------Define export function prototype-----------------------*/ +/* Please refer to header file + *--------------------Define export function prototype-----------------------*/ + +/*----------------------------Function Body----------------------------------*/ +/* + * 1. BB register R/W API + * */ + +#if (SIC_ENABLE == 1) +static BOOLEAN +sic_IsSICReady( + PADAPTER Adapter +) +{ + BOOLEAN bRet = _FALSE; + u32 retryCnt = 0; + u8 sic_cmd = 0xff; + + while (1) { + if (retryCnt++ >= SIC_MAX_POLL_CNT) { + /* RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady() return FALSE\n")); */ + return _FALSE; + } + + /* if(RT_SDIO_CANNOT_IO(Adapter)) */ + /* return _FALSE; */ + + sic_cmd = rtw_read8(Adapter, SIC_CMD_REG); + /* sic_cmd = PlatformEFIORead1Byte(Adapter, SIC_CMD_REG); */ +#if (SIC_HW_SUPPORT == 1) + sic_cmd &= 0xf0; /* [7:4] */ +#endif + /* RTPRINT(FPHY, (PHY_SICR|PHY_SICW), ("[SIC], sic_IsSICReady(), readback 0x%x=0x%x\n", SIC_CMD_REG, sic_cmd)); */ + if (sic_cmd == SIC_CMD_READY) + return _TRUE; + else { + rtw_msleep_os(1); + /* delay_ms(1); */ + } + } + + return bRet; +} + +/* +u32 +sic_CalculateBitShift( + u32 BitMask + ) +{ + u32 i; + + for(i=0; i<=31; i++) + { + if ( ((BitMask>>i) & 0x1 ) == 1) + break; + } + + return i; +} +*/ + +static u32 +sic_Read4Byte( + void *Adapter, + u32 offset +) +{ + u32 u4ret = 0xffffffff; +#if RTL8188E_SUPPORT == 1 + u8 retry = 0; +#endif + + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset)); */ + + if (sic_IsSICReady(Adapter)) { +#if (SIC_HW_SUPPORT == 1) + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); + /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREREAD); */ + /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREREAD)); */ +#endif + rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ + rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICR, ("write 0x%x = 0x%x\n", SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8))); */ + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_READ); + /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ); */ + /* RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ)); */ + +#if RTL8188E_SUPPORT == 1 + retry = 4; + while (retry--) { + rtw_udelay_os(50); + /* PlatformStallExecution(50); */ + } +#else + rtw_udelay_os(200); + /* PlatformStallExecution(200); */ +#endif + + if (sic_IsSICReady(Adapter)) { + u4ret = rtw_read32(Adapter, SIC_DATA_REG); + /* u4ret = PlatformEFIORead4Byte(Adapter, SIC_DATA_REG); */ + /* RTPRINT(FPHY, PHY_SICR, ("read 0x%x = 0x%x\n", SIC_DATA_REG, u4ret)); */ + /* DbgPrint("<===Read 0x%x = 0x%x\n", offset, u4ret); */ + } + } + + return u4ret; +} + +static void +sic_Write4Byte( + void *Adapter, + u32 offset, + u32 data +) +{ +#if RTL8188E_SUPPORT == 1 + u8 retry = 6; +#endif + /* DbgPrint("=>Write 0x%x = 0x%x\n", offset, data); */ + /* RTPRINT(FPHY, PHY_SICW, ("[SIC], sic_Write4Byte(): write offset(%#x)=0x%x\n", offset, data)); */ + if (sic_IsSICReady(Adapter)) { +#if (SIC_HW_SUPPORT == 1) + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); + /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE); */ + /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE)); */ +#endif + rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset & 0xff)); + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u8)(offset&0xff)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u8)(offset&0xff))); */ + rtw_write8(Adapter, SIC_ADDR_REG + 1, (u8)((offset & 0xff00) >> 8)); + /* PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8)); */ + /* RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u8)((offset&0xff00)>>8))); */ + rtw_write32(Adapter, SIC_DATA_REG, (u32)data); + /* PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u32)data); */ + /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data)); */ + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); + /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE); */ + /* RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_WRITE)); */ +#if RTL8188E_SUPPORT == 1 + while (retry--) { + rtw_udelay_os(50); + /* PlatformStallExecution(50); */ + } +#else + rtw_udelay_os(150); + /* PlatformStallExecution(150); */ +#endif + + } +} +/* ************************************************************ + * extern function + * ************************************************************ */ +static void +SIC_SetBBReg( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 OriginalValue, BitShift; + u16 BBWaitCounter = 0; + + /* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() start\n")); */ +#if 0 + while (PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) { + BBWaitCounter++; + delay_ms(10); /* 1 ms */ + + if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) { + /* Wait too long, return FALSE to avoid to be stuck here. */ + RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); + return; + } + } +#endif + /* */ + /* Critical section start */ + /* */ + + /* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), mask=0x%x, addr[0x%x]=0x%x\n", BitMask, RegAddr, Data)); */ + + if (BitMask != bMaskDWord) { /* if not "double word" write */ + OriginalValue = sic_Read4Byte(Adapter, RegAddr); + /* BitShift = sic_CalculateBitShift(BitMask); */ + BitShift = PHY_CalculateBitShift(BitMask); + Data = (((OriginalValue)&(~BitMask)) | (Data << BitShift)); + } + + sic_Write4Byte(Adapter, RegAddr, Data); + + /* PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); */ + /* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() end\n")); */ +} + +static u32 +SIC_QueryBBReg( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() start\n")); */ + +#if 0 + while (PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) { + BBWaitCounter++; + delay_ms(10); /* 10 ms */ + + if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) { + /* Wait too long, return FALSE to avoid to be stuck here. */ + RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter)); + return ReturnValue; + } + } +#endif + OriginalValue = sic_Read4Byte(Adapter, RegAddr); + /* BitShift = sic_CalculateBitShift(BitMask); */ + BitShift = PHY_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg(), 0x%x=0x%x\n", RegAddr, OriginalValue)); */ + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() end\n")); */ + + /* PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); */ + return ReturnValue; +} + +void +SIC_Init( + PADAPTER Adapter +) +{ + /* Here we need to write 0x1b8~0x1bf = 0 after fw is downloaded */ + /* because for 8723E at beginning 0x1b8=0x1e, that will cause */ + /* sic always not be ready */ +#if (SIC_HW_SUPPORT == 1) + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", */ + /* SIC_INIT_REG, SIC_INIT_VAL)); */ + rtw_write8(Adapter, SIC_INIT_REG, SIC_INIT_VAL); + /* PlatformEFIOWrite1Byte(Adapter, SIC_INIT_REG, SIC_INIT_VAL); */ + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x%x = 0x%x\n", */ + /* SIC_CMD_REG, SIC_CMD_INIT)); */ + rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_INIT); + /* PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_INIT); */ +#else + /* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_Init(), write 0x1b8~0x1bf = 0x0\n")); */ + rtw_write32(Adapter, SIC_CMD_REG, 0); + /* PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG, 0); */ + rtw_write32(Adapter, SIC_CMD_REG + 4, 0); + /* PlatformEFIOWrite4Byte(Adapter, SIC_CMD_REG+4, 0); */ +#endif +} + +static BOOLEAN +SIC_LedOff( + PADAPTER Adapter +) +{ + /* When SIC is enabled, led pin will be used as debug pin, */ + /* so don't execute led function when SIC is enabled. */ + return _TRUE; +} +#endif + +/** +* Function: PHY_QueryBBReg +* +* OverView: Read "sepcific bits" from BB register +* +* Input: +* PADAPTER Adapter, +* u32 RegAddr, //The target address to be readback +* u32 BitMask //The target bit position in the target address +* //to be readback +* Output: None +* Return: u32 Data //The readback register value +* Note: This function is equal to "GetRegSetting" in PHY programming guide +*/ +u32 +PHY_QueryBBReg8188E( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask +) +{ + u32 ReturnValue = 0, OriginalValue, BitShift; + u16 BBWaitCounter = 0; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + +#if (SIC_ENABLE == 1) + return SIC_QueryBBReg(Adapter, RegAddr, BitMask); +#endif + + + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = PHY_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + /* RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); */ + + return ReturnValue; + +} + + +/** +* Function: PHY_SetBBReg +* +* OverView: Write "Specific bits" to BB register (page 8~) +* +* Input: +* PADAPTER Adapter, +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address +* //to be modified +* u32 Data //The new register value in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRegSetting" in PHY programming guide +*/ + +void +PHY_SetBBReg8188E( + PADAPTER Adapter, + u32 RegAddr, + u32 BitMask, + u32 Data +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + /* u16 BBWaitCounter = 0; */ + u32 OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return; +#endif + +#if (SIC_ENABLE == 1) + SIC_SetBBReg(Adapter, RegAddr, BitMask, Data); + return; +#endif + + + if (BitMask != bMaskDWord) { /* if not "double word" write */ + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = PHY_CalculateBitShift(BitMask); + Data = ((OriginalValue & (~BitMask)) | ((Data << BitShift) & BitMask)); + } + + rtw_write32(Adapter, RegAddr, Data); + + /* RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); */ + +} + + +/* + * 2. RF register R/W API + * + ** +* Function: phy_RFSerialRead +* +* OverView: Read regster from RF chips +* +* Input: +* PADAPTER Adapter, + enum rf_path eRFPath, //Radio path of A/B/C/D +* u32 Offset, //The target address to be read +* +* Output: None +* Return: u32 reback value +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() +*/ +static u32 +phy_RFSerialRead( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset +) +{ + u32 retValue = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + u32 tmplong, tmplong2; + u8 RfPiEnable = 0; + + _enter_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); +#if 0 + if (pHalData->RFChipID == RF_8225 && Offset > 0x24) /* 36 valid regs */ + return retValue; + if (pHalData->RFChipID == RF_8256 && Offset > 0x2D) /* 45 valid regs */ + return retValue; +#endif + /* */ + /* Make sure RF register offset is correct */ + /* */ + Offset &= 0xff; + + /* */ + /* Switch page for 8256 RF IC */ + /* */ + NewOffset = Offset; + + /* 2009/06/17 MH We can not execute IO for power save or other accident mode. */ + /* if(RT_CANNOT_IO(Adapter)) */ + /* { */ + /* RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); */ + /* return 0xFFFFFFFF; */ + /* } */ + + /* For 92S LSSI Read RFLSSIRead */ + /* For RF A/B write 0x824/82c(does not work in the future) */ + /* We must use 0x824 for RF A and B to execute read trigger */ + tmplong = phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); + if (eRFPath == RF_PATH_A) + tmplong2 = tmplong; + else + tmplong2 = phy_query_bb_reg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); + + tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */ + + phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong & (~bLSSIReadEdge)); + rtw_udelay_os(10);/* PlatformStallExecution(10); */ + + phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); + rtw_udelay_os(100);/* PlatformStallExecution(100); */ + + /* phy_set_bb_reg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); */ + rtw_udelay_os(10);/* PlatformStallExecution(10); */ + + if (eRFPath == RF_PATH_A) + RfPiEnable = (u8)phy_query_bb_reg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); + else if (eRFPath == RF_PATH_B) + RfPiEnable = (u8)phy_query_bb_reg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); + + if (RfPiEnable) { + /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */ + retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); + /* RTW_INFO("Readback from RF-PI : 0x%x\n", retValue); */ + } else { + /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */ + retValue = phy_query_bb_reg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); + /* RTW_INFO("Readback from RF-SI : 0x%x\n", retValue); */ + } + /* RTW_INFO("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); */ + _exit_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL); + return retValue; + +} + + + +/** +* Function: phy_RFSerialWrite +* +* OverView: Write data to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, + enum rf_path eRFPath, //Radio path of A/B/C/D +* u32 Offset, //The target address to be read +* u32 Data //The new register Data in the target bit position +* //of the target to be read +* +* Output: None +* Return: None +* Note: Threre are three types of serial operations: +* 1. Software serial write +* 2. Hardware LSSI-Low Speed Serial Interface +* 3. Hardware HSSI-High speed +* serial write. Driver need to implement (1) and (2). +* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() + * + * Note: For RF8256 only + * The total count of RTL8256(Zebra4) register is around 36 bit it only employs + * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) + * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration + * programming guide" for more details. + * Thus, we define a sub-finction for RTL8526 register address conversion + * =========================================================== + * Register Mode RegCTL[1] RegCTL[0] Note + * (Reg00[12]) (Reg00[10]) + * =========================================================== + * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) + * ------------------------------------------------------------------ + * + * 2008/09/02 MH Add 92S RF definition + * + * + * +*/ +static void +phy_RFSerialWrite( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 Offset, + u32 Data +) +{ + u32 DataAndAddr = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + u32 NewOffset; + +#if 0 + /* We should check valid regs for RF_6052 case. */ + if (pHalData->RFChipID == RF_8225 && Offset > 0x24) /* 36 valid regs */ + return; + if (pHalData->RFChipID == RF_8256 && Offset > 0x2D) /* 45 valid regs */ + return; +#endif + + /* 2009/06/17 MH We can not execute IO for power save or other accident mode. */ + /* if(RT_CANNOT_IO(Adapter)) */ + /* { */ + /* RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); */ + /* return; */ + /* } */ + + Offset &= 0xff; + + /* */ + /* Shadow Update */ + /* */ + /* PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); */ + + /* */ + /* Switch page for 8256 RF IC */ + /* */ + NewOffset = Offset; + + /* */ + /* Put write addr in [5:0] and write data in [31:16] */ + /* */ + /* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */ + DataAndAddr = ((NewOffset << 20) | (Data & 0x000fffff)) & 0x0fffffff; /* T65 RF */ + + /* */ + /* Write Operation */ + /* */ + phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */ + +} + + +/** +* Function: PHY_QueryRFReg +* +* OverView: Query "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, + enum rf_path eRFPath, //Radio path of A/B/C/D +* u32 RegAddr, //The target address to be read +* u32 BitMask //The target bit position in the target address +* //to be read +* +* Output: None +* Return: u32 Readback value +* Note: This function is equal to "GetRFRegSetting" in PHY programming guide +*/ +u32 +PHY_QueryRFReg8188E( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask +) +{ + u32 Original_Value, Readback_Value, BitShift; + /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); */ + /* u8 RFWaitCounter = 0; */ + /* _irqL irqL; */ + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + +#ifdef CONFIG_USB_HCI + /* PlatformAcquireMutex(&pHalData->mxRFOperate); */ +#else + /* _enter_critical(&pHalData->rf_lock, &irqL); */ +#endif + + + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + + BitShift = PHY_CalculateBitShift(BitMask); + Readback_Value = (Original_Value & BitMask) >> BitShift; + +#ifdef CONFIG_USB_HCI + /* PlatformReleaseMutex(&pHalData->mxRFOperate); */ +#else + /* _exit_critical(&pHalData->rf_lock, &irqL); */ +#endif + + + /* RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, */ + + return Readback_Value; +} + +/** +* Function: PHY_SetRFReg +* +* OverView: Write "Specific bits" to RF register (page 8~) +* +* Input: +* PADAPTER Adapter, + enum rf_path eRFPath, //Radio path of A/B/C/D +* u32 RegAddr, //The target address to be modified +* u32 BitMask //The target bit position in the target address +* //to be modified +* u32 Data //The new register Data in the target bit position +* //of the target address +* +* Output: None +* Return: None +* Note: This function is equal to "PutRFRegSetting" in PHY programming guide +*/ +void +PHY_SetRFReg8188E( + PADAPTER Adapter, + enum rf_path eRFPath, + u32 RegAddr, + u32 BitMask, + u32 Data +) +{ + + /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); */ + /* u8 RFWaitCounter = 0; */ + u32 Original_Value, BitShift; + /* _irqL irqL; */ + +#if (DISABLE_BB_RF == 1) + return; +#endif + + /* RTPRINT(FINIT, INIT_RF, ("phy_set_rf_reg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", */ + /* RegAddr, BitMask, Data, eRFPath)); */ + + +#ifdef CONFIG_USB_HCI + /* PlatformAcquireMutex(&pHalData->mxRFOperate); */ +#else + /* _enter_critical(&pHalData->rf_lock, &irqL); */ +#endif + + + /* RF data is 12 bits only */ + if (BitMask != bRFRegOffsetMask) { + Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); + BitShift = PHY_CalculateBitShift(BitMask); + Data = ((Original_Value & (~BitMask)) | (Data << BitShift)); + } + + phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); + + +#ifdef CONFIG_USB_HCI + /* PlatformReleaseMutex(&pHalData->mxRFOperate); */ +#else + /* _exit_critical(&pHalData->rf_lock, &irqL); */ +#endif + + /* phy_query_rf_reg(Adapter,eRFPath,RegAddr,BitMask); */ + +} + + +/* + * 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. + * */ + +/*----------------------------------------------------------------------------- + * Function: PHY_MACConfig8192C + * + * Overview: Condig MAC by header file or parameter file. + * + * Input: NONE + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 08/12/2008 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +s32 PHY_MACConfig8188E(PADAPTER Adapter) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 val = 0; + + /* */ + /* Config MAC */ + /* */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + rtStatus = phy_ConfigMACWithParaFile(Adapter, PHY_FILE_MAC_REG); + if (rtStatus == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_FAILURE == odm_config_mac_with_header_file(&pHalData->odmpriv)) + rtStatus = _FAIL; + else + rtStatus = _SUCCESS; +#endif/* CONFIG_EMBEDDED_FWIMG */ + } + + /* 2010.07.13 AMPDU aggregation number B */ + val |= MAX_AGGR_NUM; + val = val << 8; + val |= MAX_AGGR_NUM; + rtw_write16(Adapter, REG_MAX_AGGR_NUM, val); + /* rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0B); */ + + return rtStatus; + +} + +/*----------------------------------------------------------------------------- +* Function: phy_InitBBRFRegisterDefinition +* +* OverView: Initialize Register definition offset for Radio Path A/B/C/D +* +* Input: +* PADAPTER Adapter, +* +* Output: None +* Return: None +* Note: The initialization value is constant and it should never be changes +-----------------------------------------------------------------------------*/ +static void +phy_InitBBRFRegisterDefinition( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + /* RF Interface Sowrtware Control */ + pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */ + pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */ + pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 LSBs if read 32-bit from 0x874 */ + pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) */ + + /* RF Interface Output (and Enable) */ + pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */ + pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */ + + /* RF Interface (Output and) Enable */ + pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */ + pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */ + + /* Addr of LSSI. Wirte RF register by driver */ + pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */ + pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; + + /* Tranceiver A~D HSSI Parameter-2 */ + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */ + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */ + + /* Tranceiver LSSI Readback SI mode */ + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; + + /* Tranceiver LSSI Readback PI mode */ + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; + /* pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; */ + /* pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; */ + +} + +static int +phy_BB8188E_Config_ParaFile( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + /* */ + /* 1. Read PHY_REG.TXT BB INIT!! */ + /* */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_PHY_REG, CONFIG_BB_PHY_REG) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_FAILURE == odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) { + goto phy_BB8190_Config_ParaFile_Fail; + } + +#if (MP_DRIVER == 1) + /* */ + /* 1.1 Read PHY_REG_MP.TXT BB INIT!! */ + /* */ + if (Adapter->registrypriv.mp_mode == 1) { + /* 3 Read PHY_REG.TXT BB INIT!! */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithMpParaFile(Adapter, PHY_FILE_PHY_REG_MP) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) { + RTW_INFO("phy_BB8188E_Config_ParaFile():Write BB Reg MP Fail!!"); + goto phy_BB8190_Config_ParaFile_Fail; + } + } +#endif /* #if (MP_DRIVER == 1) */ + + /* */ + /* 3. BB AGC table Initialization */ + /* */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_AGC_TAB, CONFIG_BB_AGC_TAB) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_FAILURE == odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) { + goto phy_BB8190_Config_ParaFile_Fail; + } + + +phy_BB8190_Config_ParaFile_Fail: + + return rtStatus; +} + + +int +PHY_BBConfig8188E( + PADAPTER Adapter +) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 RegVal; + u8 TmpU1B = 0; + u8 value8; + + phy_InitBBRFRegisterDefinition(Adapter); + + + /* Enable BB and RF */ + RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); + rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT13 | BIT0 | BIT1)); + + /* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */ + /* rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); */ + /* rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); */ + + rtw_write8(Adapter, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB); + +#ifdef CONFIG_USB_HCI + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); +#elif defined CONFIG_PCI_HCI + rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE | FEN_BB_GLB_RSTn | FEN_BBRSTB); +#endif + +#if 0 +#ifdef CONFIG_USB_HCI + /* To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. */ + rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); + rtw_write8(Adapter, 0x15, 0xe9); +#endif + + rtw_write8(Adapter, REG_AFE_XTAL_CTRL + 1, 0x80); +#endif + +#ifdef CONFIG_USB_HCI + /* rtw_write8(Adapter, 0x15, 0xe9); */ +#endif + + +#ifdef CONFIG_PCI_HCI +#ifdef CONFIG_RTW_LED + /* Force use left antenna by default for 88C. */ + if (adapter_to_led(Adapter)->LedStrategy != SW_LED_MODE10) { + RegVal = rtw_read32(Adapter, REG_LEDCFG0); + rtw_write32(Adapter, REG_LEDCFG0, RegVal | BIT23); + } +#endif +#endif + + /* */ + /* Config BB and AGC */ + /* */ + rtStatus = phy_BB8188E_Config_ParaFile(Adapter); + + if (rtw_phydm_set_crystal_cap(Adapter, pHalData->crystal_cap) == _FALSE) { + RTW_ERR("Init crystal_cap failed\n"); + rtw_warn_on(1); + rtStatus = _FAIL; + } + + return rtStatus; + +} + + +int +PHY_RFConfig8188E( + PADAPTER Adapter +) +{ + int rtStatus = _SUCCESS; + + /* */ + /* RF config */ + /* */ + rtStatus = PHY_RF6052_Config8188E(Adapter); + return rtStatus; +} + + +/*----------------------------------------------------------------------------- + * Function: PHY_ConfigRFWithParaFile() + * + * Overview: This function read RF parameters from general file format, and do RF 3-wire + * + * Input: PADAPTER Adapter + * ps1Byte pFileName + * u8 eRFPath + * + * Output: NONE + * + * Return: RT_STATUS_SUCCESS: configuration file exist + * + * Note: Delay may be required for RF configuration + *---------------------------------------------------------------------------*/ +int +rtl8188e_PHY_ConfigRFWithParaFile( + PADAPTER Adapter, + u8 *pFileName, + enum rf_path eRFPath +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + int rtStatus = _SUCCESS; + + + return rtStatus; + +} + +/* **************************************** + * The following is for High Power PA + * **************************************** */ +#define HighPowerRadioAArrayLen 22 +/* This is for High power PA */ +u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { + 0x013, 0x00029ea4, + 0x013, 0x00025e74, + 0x013, 0x00020ea4, + 0x013, 0x0001ced0, + 0x013, 0x00019f40, + 0x013, 0x00014e70, + 0x013, 0x000106a0, + 0x013, 0x0000c670, + 0x013, 0x000082a0, + 0x013, 0x00004270, + 0x013, 0x00000240, +}; + +/*----------------------------------------------------------------------------- + * Function: SetTxPowerLevel8190() + * + * Overview: This function is export to "HalCommon" moudule + * We must consider RF path later!!!!!!! + * + * Input: PADAPTER Adapter + * u8 channel + * + * Output: NONE + * + * Return: NONE + * 2008/11/04 MHC We remove EEPROM_93C56. + * We need to move CCX relative code to independet file. + * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. + * + *---------------------------------------------------------------------------*/ +void +PHY_SetTxPowerLevel8188E( + PADAPTER Adapter, + u8 Channel +) +{ + phy_set_tx_power_level_by_path(Adapter, Channel, RF_PATH_A); +} + +void +PHY_SetTxPowerIndex_8188E( + PADAPTER Adapter, + u32 PowerIndex, + enum rf_path RFPath, + u8 Rate +) +{ + if (RFPath == RF_PATH_A) { + switch (Rate) { + case MGN_1M: + phy_set_bb_reg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex); + break; + case MGN_2M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1, PowerIndex); + break; + case MGN_5_5M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte2, PowerIndex); + break; + case MGN_11M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte3, PowerIndex); + break; + + case MGN_6M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); + break; + case MGN_9M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte1, PowerIndex); + break; + case MGN_12M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte2, PowerIndex); + break; + case MGN_18M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate18_06, bMaskByte3, PowerIndex); + break; + + case MGN_24M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); + break; + case MGN_36M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte1, PowerIndex); + break; + case MGN_48M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte2, PowerIndex); + break; + case MGN_54M: + phy_set_bb_reg(Adapter, rTxAGC_A_Rate54_24, bMaskByte3, PowerIndex); + break; + + case MGN_MCS0: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); + break; + case MGN_MCS1: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte1, PowerIndex); + break; + case MGN_MCS2: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte2, PowerIndex); + break; + case MGN_MCS3: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte3, PowerIndex); + break; + + case MGN_MCS4: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); + break; + case MGN_MCS5: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte1, PowerIndex); + break; + case MGN_MCS6: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte2, PowerIndex); + break; + case MGN_MCS7: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte3, PowerIndex); + break; + + case MGN_MCS8: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte0, PowerIndex); + break; + case MGN_MCS9: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte1, PowerIndex); + break; + case MGN_MCS10: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte2, PowerIndex); + break; + case MGN_MCS11: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskByte3, PowerIndex); + break; + + case MGN_MCS12: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte0, PowerIndex); + break; + case MGN_MCS13: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte1, PowerIndex); + break; + case MGN_MCS14: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte2, PowerIndex); + break; + case MGN_MCS15: + phy_set_bb_reg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskByte3, PowerIndex); + break; + + default: + RTW_INFO("Invalid Rate!!\n"); + break; + } + } else if (RFPath == RF_PATH_B) { + switch (Rate) { + case MGN_1M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte1, PowerIndex); + break; + case MGN_2M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte2, PowerIndex); + break; + case MGN_5_5M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte3, PowerIndex); + break; + case MGN_11M: + phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, PowerIndex); + break; + + case MGN_6M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate18_06, bMaskByte0, PowerIndex); + break; + case MGN_9M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate18_06, bMaskByte1, PowerIndex); + break; + case MGN_12M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate18_06, bMaskByte2, PowerIndex); + break; + case MGN_18M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate18_06, bMaskByte3, PowerIndex); + break; + + case MGN_24M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate54_24, bMaskByte0, PowerIndex); + break; + case MGN_36M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate54_24, bMaskByte1, PowerIndex); + break; + case MGN_48M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate54_24, bMaskByte2, PowerIndex); + break; + case MGN_54M: + phy_set_bb_reg(Adapter, rTxAGC_B_Rate54_24, bMaskByte3, PowerIndex); + break; + + case MGN_MCS0: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte0, PowerIndex); + break; + case MGN_MCS1: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte1, PowerIndex); + break; + case MGN_MCS2: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte2, PowerIndex); + break; + case MGN_MCS3: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskByte3, PowerIndex); + break; + + case MGN_MCS4: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte0, PowerIndex); + break; + case MGN_MCS5: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte1, PowerIndex); + break; + case MGN_MCS6: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte2, PowerIndex); + break; + case MGN_MCS7: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskByte3, PowerIndex); + break; + + case MGN_MCS8: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte0, PowerIndex); + break; + case MGN_MCS9: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte1, PowerIndex); + break; + case MGN_MCS10: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte2, PowerIndex); + break; + case MGN_MCS11: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskByte3, PowerIndex); + break; + + case MGN_MCS12: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte0, PowerIndex); + break; + case MGN_MCS13: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte1, PowerIndex); + break; + case MGN_MCS14: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte2, PowerIndex); + break; + case MGN_MCS15: + phy_set_bb_reg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskByte3, PowerIndex); + break; + + default: + RTW_INFO("Invalid Rate!!\n"); + break; + } + } else + RTW_INFO("Invalid RFPath!!\n"); +} + +s8 phy_get_txpwr_target_extra_bias_8188e(_adapter *adapter, enum rf_path rfpath + , RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch) +{ + s8 bias = 0; + + if (adapter->registrypriv.mp_mode) + goto exit; + + if (rate == MGN_2M) + bias = -9; + +exit: + return bias; +} + +void +PHY_ScanOperationBackup8188E( + PADAPTER Adapter, + u8 Operation +) +{ +#if 0 + IO_TYPE IoType; + + if (!rtw_is_drv_stopped(padapter)) { + switch (Operation) { + case SCAN_OPT_BACKUP: + IoType = IO_CMD_PAUSE_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (u8 *)&IoType); + + break; + + case SCAN_OPT_RESTORE: + IoType = IO_CMD_RESUME_DM_BY_SCAN; + rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (u8 *)&IoType); + break; + + default: + break; + } + } +#endif +} +void +phy_SpurCalibration_8188E( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *p_dm_odm = &(pHalData->odmpriv); + + /* DbgPrint("===> phy_SpurCalibration_8188E current_channel_bw = %d, current_channel = %d\n", pHalData->current_channel_bw, pHalData->current_channel);*/ + if (pHalData->current_channel_bw == CHANNEL_WIDTH_20 && (pHalData->current_channel == 13 || pHalData->current_channel == 14)) { + phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1);/* enable notch filter */ + phy_set_bb_reg(Adapter, rOFDM1_IntfDet, BIT(8) | BIT(7) | BIT(6), 0x2); /* intf_TH */ + phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(28) | BIT(27) | BIT(26) | BIT(25) | BIT(24), 0x1f); + p_dm_odm->is_rx_blocking_en = false; + } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40 && pHalData->current_channel == 11) { + phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1);/* enable notch filter */ + phy_set_bb_reg(Adapter, rOFDM1_IntfDet, BIT(8) | BIT(7) | BIT(6), 0x2); /* intf_TH */ + phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(28) | BIT(27) | BIT(26) | BIT(25) | BIT(24), 0x1f); + p_dm_odm->is_rx_blocking_en = false; + } else { + if (Adapter->registrypriv.notch_filter == 0) + phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x0);/* disable notch filter */ + } +} + +/*----------------------------------------------------------------------------- + * Function: PHY_SetBWModeCallback8192C() + * + * Overview: Timer callback function for SetSetBWMode + * + * Input: PRT_TIMER pTimer + * + * Output: NONE + * + * Return: NONE + * + * Note: (1) We do not take j mode into consideration now + * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run + * concurrently? + *---------------------------------------------------------------------------*/ +static void +_PHY_SetBWMode88E( + PADAPTER Adapter +) +{ + /* PADAPTER Adapter = (PADAPTER)pTimer->Adapter; */ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 regBwOpMode; + u8 regRRSR_RSC; + + /* return; */ + + /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ + /* u32 NowL, NowH; */ + /* u64 BeginTime, EndTime; */ + + if (pHalData->rf_chip == RF_PSEUDO_11N) { + /* pHalData->SetBWModeInProgress= _FALSE; */ + return; + } + + /* There is no 40MHz mode in RF_8225. */ + if (pHalData->rf_chip == RF_8225) + return; + + if (rtw_is_drv_stopped(Adapter)) + return; + + /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ + /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ + /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ + /* BeginTime = ((u64)NowH << 32) + NowL; */ + + /* 3 */ + /* 3 */ /* <1>Set MAC register */ + /* 3 */ + /* Adapter->hal_func.SetBWModeHandler(); */ + + regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); + regRRSR_RSC = rtw_read8(Adapter, REG_RRSR + 2); + /* regBwOpMode = rtw_hal_get_hwreg(Adapter,HW_VAR_BWMODE,(u8 *)®BwOpMode); */ + + switch (pHalData->current_channel_bw) { + case CHANNEL_WIDTH_20: + regBwOpMode |= BW_OPMODE_20MHZ; + /* 2007/02/07 Mark by Emily becasue we have not verify whether this register works */ + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + break; + + case CHANNEL_WIDTH_40: + regBwOpMode &= ~BW_OPMODE_20MHZ; + /* 2007/02/07 Mark by Emily becasue we have not verify whether this register works */ + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); + + regRRSR_RSC = (regRRSR_RSC & 0x90) | (pHalData->nCur40MhzPrimeSC << 5); + rtw_write8(Adapter, REG_RRSR + 2, regRRSR_RSC); + break; + + default: + break; + } + + /* 3 */ + /* 3 */ /* <2>Set PHY related register */ + /* 3 */ + switch (pHalData->current_channel_bw) { + /* 20 MHz channel*/ + case CHANNEL_WIDTH_20: + phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); + phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); + /* phy_set_bb_reg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); */ + + break; + + + /* 40 MHz channel*/ + case CHANNEL_WIDTH_40: + phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); + phy_set_bb_reg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); + + /* Set Control channel to upper or lower. These settings are required only for 40MHz */ + phy_set_bb_reg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1)); + phy_set_bb_reg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); + /* phy_set_bb_reg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); */ + + phy_set_bb_reg(Adapter, 0x818, (BIT26 | BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); + + break; + + + + default: + break; + + } + /* Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 */ + + /* Added it for 20/40 mhz switch time evaluation by guangan 070531 */ + /* NowL = PlatformEFIORead4Byte(Adapter, TSFR); */ + /* NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); */ + /* EndTime = ((u64)NowH << 32) + NowL; */ + + /* 3<3>Set RF related register */ + switch (pHalData->rf_chip) { + case RF_8225: + /* PHY_SetRF8225Bandwidth(Adapter, pHalData->current_channel_bw); */ + break; + + case RF_8256: + /* Please implement this function in Hal8190PciPhy8256.c */ + /* PHY_SetRF8256Bandwidth(Adapter, pHalData->current_channel_bw); */ + break; + + case RF_8258: + /* Please implement this function in Hal8190PciPhy8258.c */ + /* PHY_SetRF8258Bandwidth(); */ + break; + + case RF_PSEUDO_11N: + /* Do Nothing */ + break; + + case RF_6052: + rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->current_channel_bw); + break; + + default: + /* RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); */ + break; + } + + /* pHalData->SetBWModeInProgress= FALSE; */ + +} + + +#if 0 + /* ----------------------------------------------------------------------------- + * * Function: SetBWMode8190Pci() + * * + * * Overview: This function is export to "HalCommon" moudule + * * + * * Input: PADAPTER Adapter + * * CHANNEL_WIDTH Bandwidth 20M or 40M + * * + * * Output: NONE + * * + * * Return: NONE + * * + * * Note: We do not take j mode into consideration now + * *--------------------------------------------------------------------------- */ +#endif +void +PHY_SetBWMode8188E( + PADAPTER Adapter, + enum channel_width Bandwidth, /* 20M or 40M */ + unsigned char Offset /* Upper, Lower, or Don't care */ +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + enum channel_width tmpBW = pHalData->current_channel_bw; + /* Modified it for 20/40 mhz switch by guangan 070531 */ + /* PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; */ + + /* return; */ + + /* if(pHalData->SwChnlInProgress) + * if(pMgntInfo->bScanInProgress) + * { + * return; + * } */ + + /* if(pHalData->SetBWModeInProgress) + * { + * */ /* Modified it for 20/40 mhz switch by guangan 070531 + * PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); + * */ /* return; + * } */ + + /* if(pHalData->SetBWModeInProgress) */ + /* return; */ + + /* pHalData->SetBWModeInProgress= TRUE; */ + + pHalData->current_channel_bw = Bandwidth; + +#if 0 + if (Offset == EXTCHNL_OFFSET_LOWER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if (Offset == EXTCHNL_OFFSET_UPPER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#else + pHalData->nCur40MhzPrimeSC = Offset; +#endif + + if (!RTW_CANNOT_RUN(Adapter)) { +#if 0 + /* PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); */ +#else + _PHY_SetBWMode88E(Adapter); +#endif +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) + phy_SpurCalibration_8188E(Adapter); +#endif + } else { + /* pHalData->SetBWModeInProgress= FALSE; */ + pHalData->current_channel_bw = tmpBW; + } + +} + + +static void _PHY_SwChnl8188E(PADAPTER Adapter, u8 channel) +{ + enum rf_path eRFPath; + u32 param1, param2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); + + if (Adapter->bNotifyChannelChange) + RTW_INFO("[%s] ch = %d\n", __FUNCTION__, channel); + + /* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */ + param1 = RF_CHNLBW; + param2 = channel; + for (eRFPath = RF_PATH_A; eRFPath < hal_spec->rf_reg_path_num; eRFPath++) { + pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); + phy_set_rf_reg(Adapter, eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); + } + + + /* s3. post common command - CmdID_End, None */ + +} +void +PHY_SwChnl8188E(/* Call after initialization */ + PADAPTER Adapter, + u8 channel +) +{ + /* PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); */ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tmpchannel = pHalData->current_channel; + + if (pHalData->rf_chip == RF_PSEUDO_11N) { + /* pHalData->SwChnlInProgress=FALSE; */ + return; /* return immediately if it is peudo-phy */ + } + + /* if(pHalData->SwChnlInProgress) */ + /* return; */ + + /* if(pHalData->SetBWModeInProgress) */ + /* return; */ + + while (pHalData->odmpriv.rf_calibrate_info.is_lck_in_progress) + rtw_msleep_os(50); + + /* -------------------------------------------- */ + switch (pHalData->CurrentWirelessMode) { + case WIRELESS_MODE_A: + case WIRELESS_MODE_N_5G: + /* RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); */ + break; + + case WIRELESS_MODE_B: + /* RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); */ + break; + + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + /* RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); */ + break; + + default: + /* RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); */ + break; + } + /* -------------------------------------------- */ + + /* pHalData->SwChnlInProgress = TRUE; */ + if (channel == 0) + channel = 1; + + pHalData->current_channel = channel; + + /* pHalData->SwChnlStage=0; */ + /* pHalData->SwChnlStep=0; */ + + if (!RTW_CANNOT_RUN(Adapter)) { +#if 0 + /* PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); */ +#else + _PHY_SwChnl8188E(Adapter, channel); +#endif + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter)) + phy_SpurCalibration_8188E(Adapter); +#endif + + + } else { + /* if(IS_HARDWARE_TYPE_8192SU(Adapter)) */ + /* { */ + /* pHalData->SwChnlInProgress = FALSE; */ + pHalData->current_channel = tmpchannel; + /* } */ + } +} + +void +PHY_SetSwChnlBWMode8188E( + PADAPTER Adapter, + u8 channel, + enum channel_width Bandwidth, + u8 Offset40, + u8 Offset80 +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + /* RTW_INFO("%s()===>\n",__FUNCTION__); */ + + PHY_SwChnl8188E(Adapter, channel); + PHY_SetBWMode8188E(Adapter, Bandwidth, Offset40); + + rtw_hal_set_tx_power_level(Adapter, channel); + + if (pHalData->bNeedIQK == _TRUE) { + if (pHalData->neediqk_24g == _TRUE) { + + halrf_iqk_trigger(&pHalData->odmpriv, _FALSE); + pHalData->bIQKInitialized = _TRUE; + pHalData->neediqk_24g = _FALSE; + } + pHalData->bNeedIQK = _FALSE; + } + /* RTW_INFO("<==%s()\n",__FUNCTION__); */ +} + + +void +PHY_SetRFEReg_8188E( + PADAPTER Adapter +) +{ + u8 u1tmp = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if ((pHalData->ExternalPA_2G == 0) && (pHalData->ExternalLNA_2G == 0)) + return; + + switch (pHalData->rfe_type) { + /* 88EU rfe_type should always be 0 */ + case 0: + default: + phy_set_bb_reg(Adapter, 0x40, BIT2|BIT3, 0x3); /*0x3 << 2*/ + phy_set_bb_reg(Adapter, 0xEE8, BIT28, 0x1); + phy_set_bb_reg(Adapter, 0x87C, BIT0, 0x0); + break; + } +} diff --git a/hal/rtl8188e/rtl8188e_rf6052.c b/hal/rtl8188e/rtl8188e_rf6052.c new file mode 100644 index 0000000..2987439 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_rf6052.c @@ -0,0 +1,297 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +/****************************************************************************** + * + * + * Module: rtl8188e_rf6052.c ( Source C File) + * + * Note: Provide RF 6052 series relative API. + * + * Function: + * + * Export: + * + * Abbrev: + * + * History: + * Data Who Remark + * + * 09/25/2008 MHC Create initial version. + * 11/05/2008 MHC Add API for tw power setting. + * + * +******************************************************************************/ + +#define _RTL8188E_RF6052_C_ + +#include +#include + +/*---------------------------Define Local Constant---------------------------*/ + +/*---------------------------Define Local Constant---------------------------*/ + + +/*------------------------Define global variable-----------------------------*/ +/*------------------------Define global variable-----------------------------*/ + + +/*------------------------Define local variable------------------------------*/ + +/*------------------------Define local variable------------------------------*/ + + +/*----------------------------------------------------------------------------- + * Function: RF_ChangeTxPath + * + * Overview: For RL6052, we must change some RF settign for 1T or 2T. + * + * Input: u16 DataRate // 0x80-8f, 0x90-9f + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 09/25/2008 MHC Create Version 0. + * Firmwaer support the utility later. + * + *---------------------------------------------------------------------------*/ +void rtl8188e_RF_ChangeTxPath(PADAPTER Adapter, + u16 DataRate) +{ + /* We do not support gain table change inACUT now !!!! Delete later !!! */ +#if 0/* (RTL92SE_FPGA_VERIFY == 0) */ + static u8 RF_Path_Type = 2; /* 1 = 1T 2= 2T */ + static u32 tx_gain_tbl1[6] + = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; + static u32 tx_gain_tbl2[6] + = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; + u8 i; + + if (RF_Path_Type == 2 && (DataRate & 0xF) <= 0x7) { + /* Set TX SYNC power G2G3 loop filter */ + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); + + /* Change TX AGC gain table */ + for (i = 0; i < 6; i++) + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); + + /* Set PA to high value */ + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); + } else if (RF_Path_Type == 1 && (DataRate & 0xF) >= 0x8) { + /* Set TX SYNC power G2G3 loop filter */ + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x04440); + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); + + /* Change TX AGC gain table */ + for (i = 0; i < 6; i++) + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); + + /* Set PA low gain */ + phy_set_rf_reg(Adapter, RF_PATH_A, + RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); + } +#endif + +} /* RF_ChangeTxPath */ + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetBandwidth() + * + * Overview: This function is called by SetBWModeCallback8190Pci() only + * + * Input: PADAPTER Adapter + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: For RF type 0222D + *---------------------------------------------------------------------------*/ +void +rtl8188e_PHY_RF6052SetBandwidth( + PADAPTER Adapter, + enum channel_width Bandwidth) /* 20M or 40M */ +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch (Bandwidth) { + case CHANNEL_WIDTH_20: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11)); + phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + case CHANNEL_WIDTH_40: + pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10)); + phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); + break; + + default: + break; + } + +} + +static int +phy_RF6052_Config_ParaFile( + PADAPTER Adapter +) +{ + u32 u4RegValue = 0; + enum rf_path eRFPath; + BB_REGISTER_DEFINITION_T *pPhyReg; + + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(Adapter); + + /* 3 */ /* ----------------------------------------------------------------- */ + /* 3 */ /* <2> Initialize RF */ + /* 3 */ /* ----------------------------------------------------------------- */ + for (eRFPath = RF_PATH_A; eRFPath < hal_spec->rf_reg_path_num; eRFPath++) { + + pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + /*----Store original RFENV control type----*/ + switch (eRFPath) { + case RF_PATH_A: + case RF_PATH_C: + u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); + break; + case RF_PATH_B: + case RF_PATH_D: + u4RegValue = phy_query_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16); + break; + default: + RTW_ERR("Invalid rf_path:%d\n", eRFPath); + break; + } + + /*----Set RF_ENV enable----*/ + phy_set_bb_reg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1); + rtw_udelay_os(1);/* PlatformStallExecution(1); */ + + /*----Set RF_ENV output high----*/ + phy_set_bb_reg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); + rtw_udelay_os(1);/* PlatformStallExecution(1); */ + + /* Set bit number of Address and Data for RF register */ + phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */ + rtw_udelay_os(1);/* PlatformStallExecution(1); */ + + phy_set_bb_reg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */ + rtw_udelay_os(1);/* PlatformStallExecution(1); */ + + /*----Initialize RF fom connfiguration file----*/ + switch (eRFPath) { + case RF_PATH_A: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_A, eRFPath) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE) + rtStatus = _FAIL; +#endif + } + break; + case RF_PATH_B: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, PHY_FILE_RADIO_B, eRFPath) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (odm_config_rf_with_header_file(&pHalData->odmpriv, CONFIG_RF_RADIO, eRFPath) == HAL_STATUS_FAILURE) + rtStatus = _FAIL; +#endif + } + break; + case RF_PATH_C: + break; + case RF_PATH_D: + break; + default: + RTW_ERR("Invalid rf_path:%d\n", eRFPath); + break; + } + + /*----Restore RFENV control type----*/; + switch (eRFPath) { + case RF_PATH_A: + case RF_PATH_C: + phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); + break; + case RF_PATH_B: + case RF_PATH_D: + phy_set_bb_reg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue); + break; + default: + RTW_ERR("Invalid rf_path:%d\n", eRFPath); + break; + } + + if (rtStatus != _SUCCESS) { + goto phy_RF6052_Config_ParaFile_Fail; + } + + } + + + /* 3 ----------------------------------------------------------------- */ + /* 3 Configuration of Tx Power Tracking */ + /* 3 ----------------------------------------------------------------- */ + +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, PHY_FILE_TXPWR_TRACK) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv); +#endif + } + + return rtStatus; + +phy_RF6052_Config_ParaFile_Fail: + return rtStatus; +} + + +int +PHY_RF6052_Config8188E( + PADAPTER Adapter) +{ + int rtStatus = _SUCCESS; + + /* */ + /* Config BB and RF */ + /* */ + rtStatus = phy_RF6052_Config_ParaFile(Adapter); + return rtStatus; +} + +/* End of HalRf6052.c */ diff --git a/hal/rtl8188e/rtl8188e_rxdesc.c b/hal/rtl8188e/rtl8188e_rxdesc.c new file mode 100644 index 0000000..0c0ad8b --- /dev/null +++ b/hal/rtl8188e/rtl8188e_rxdesc.c @@ -0,0 +1,89 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_REDESC_C_ + +#include +#include + +void rtl8188e_query_rx_desc_status( + union recv_frame *precvframe, + struct recv_stat *prxstat) +{ + struct rx_pkt_attrib *pattrib; + struct recv_stat report; + PRXREPORT prxreport; + /* struct recv_frame_hdr *phdr; */ + + /* phdr = &precvframe->u.hdr; */ + + report.rxdw0 = le32_to_cpu(prxstat->rxdw0); + report.rxdw1 = le32_to_cpu(prxstat->rxdw1); + report.rxdw2 = le32_to_cpu(prxstat->rxdw2); + report.rxdw3 = le32_to_cpu(prxstat->rxdw3); + report.rxdw4 = le32_to_cpu(prxstat->rxdw4); + report.rxdw5 = le32_to_cpu(prxstat->rxdw5); + + prxreport = (PRXREPORT)&report; + + pattrib = &precvframe->u.hdr.attrib; + _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); + + pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;/* (u8)prxreport->crc32; */ + + /* update rx report to recv_frame attribute */ + pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);/* prxreport->rpt_sel; */ + + if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */ + pattrib->pkt_len = (u16)(report.rxdw0 & 0x00003fff); /* (u16)prxreport->pktlen; */ + pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;/* (u8)(prxreport->drvinfosize << 3); */ + + pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1); /* (u8)prxreport->physt; */ + + pattrib->bdecrypted = (report.rxdw0 & BIT(27)) ? 0 : 1; /* (u8)(prxreport->swdec ? 0 : 1); */ + pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);/* (u8)prxreport->security; */ + + pattrib->qos = (u8)((report.rxdw0 >> 23) & 0x1);/* (u8)prxreport->qos; */ + pattrib->priority = (u8)((report.rxdw1 >> 8) & 0xf);/* (u8)prxreport->tid; */ + + pattrib->amsdu = (u8)((report.rxdw1 >> 13) & 0x1);/* (u8)prxreport->amsdu; */ + + pattrib->seq_num = (u16)(report.rxdw2 & 0x00000fff);/* (u16)prxreport->seq; */ + pattrib->frag_num = (u8)((report.rxdw2 >> 12) & 0xf);/* (u8)prxreport->frag; */ + pattrib->mfrag = (u8)((report.rxdw1 >> 27) & 0x1);/* (u8)prxreport->mf; */ + pattrib->mdata = (u8)((report.rxdw1 >> 26) & 0x1);/* (u8)prxreport->md; */ + + pattrib->data_rate = (u8)(report.rxdw3 & 0x3f);/* (u8)prxreport->rxmcs; */ + + pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);/* (u8)prxreport->icverr; */ + pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3); + + } else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */ + pattrib->pkt_len = TX_RPT1_PKT_LEN; + pattrib->drvinfo_sz = 0; + } else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */ + pattrib->pkt_len = (u16)(report.rxdw0 & 0x3FF); /* Rx length[9:0] */ + pattrib->drvinfo_sz = 0; + + /* */ + /* Get TX report MAC ID valid. */ + /* */ + pattrib->MacIDValidEntry[0] = report.rxdw4; + pattrib->MacIDValidEntry[1] = report.rxdw5; + + } else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */ + pattrib->pkt_len = (u16)(report.rxdw0 & 0x00003fff); /* (u16)prxreport->pktlen; */ + } + +} diff --git a/hal/rtl8188e/rtl8188e_sreset.c b/hal/rtl8188e/rtl8188e_sreset.c new file mode 100644 index 0000000..21b840b --- /dev/null +++ b/hal/rtl8188e/rtl8188e_sreset.c @@ -0,0 +1,114 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_SRESET_C_ + +/* #include */ +#include + +#ifdef DBG_CONFIG_ERROR_DETECT + +void rtl8188e_sreset_xmit_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + systime current_time; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + unsigned int diff_time; + u32 txdma_status; + + txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS); + if (txdma_status != 0x00 && txdma_status != 0xeaeaeaea) { + RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); + rtw_hal_sreset_reset(padapter); + } +#ifdef CONFIG_USB_HCI + /* total xmit irp = 4 */ + /* RTW_INFO("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); */ + /* if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) */ + current_time = rtw_get_current_time(); + + if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { + + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); + + if (diff_time > 2000) { + if (psrtpriv->last_tx_complete_time == 0) + psrtpriv->last_tx_complete_time = current_time; + else { + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); + if (diff_time > 4000) { + + /* padapter->Wifi_Error_Status = WIFI_TX_HANG; */ + RTW_INFO("%s tx hang %s\n", __FUNCTION__, + (rtw_odm_adaptivity_needed(padapter)) ? "ODM_BB_ADAPTIVITY" : ""); + + if (!rtw_odm_adaptivity_needed(padapter)) + rtw_hal_sreset_reset(padapter); + } + } + } + } +#endif /* CONFIG_USB_HCI */ + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} + +void rtl8188e_sreset_linked_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + u32 rx_dma_status = 0; + u8 fw_status = 0; + rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS); + if (rx_dma_status != 0x00) { + RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status); + rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status); + } + fw_status = rtw_read8(padapter, REG_FMETHR); + if (fw_status != 0x00) { + if (fw_status == 1) + RTW_INFO("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __FUNCTION__, fw_status); + else if (fw_status == 2) + RTW_INFO("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __FUNCTION__, fw_status); + } +#if 0 + u32 regc50, regc58, reg824, reg800; + regc50 = rtw_read32(padapter, 0xc50); + regc58 = rtw_read32(padapter, 0xc58); + reg824 = rtw_read32(padapter, 0x824); + reg800 = rtw_read32(padapter, 0x800); + if (((regc50 & 0xFFFFFF00) != 0x69543400) || + ((regc58 & 0xFFFFFF00) != 0x69543400) || + (((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) || + (((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) { + RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, + regc50, regc58, reg824, reg800); + rtw_hal_sreset_reset(padapter); + } +#endif + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} +#endif diff --git a/hal/rtl8188e/rtl8188e_xmit.c b/hal/rtl8188e/rtl8188e_xmit.c new file mode 100644 index 0000000..8f75ff6 --- /dev/null +++ b/hal/rtl8188e/rtl8188e_xmit.c @@ -0,0 +1,299 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_XMIT_C_ + +#include +#include + +#ifdef CONFIG_XMIT_ACK +void dump_txrpt_ccx_88e(void *buf) +{ + struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; + + RTW_INFO("%s:\n" + "tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n" + "mac_id:%u, pkt_ok:%u, bmc:%u\n" + "retry_cnt:%u, lifetime_over:%u, retry_over:%u\n" + "ccx_qtime:%u\n" + "final_data_rate:0x%02x\n" + "qsel:%u, sw:0x%03x\n" + , __func__ + , txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx + , txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc + , txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over + , txrpt_ccx_qtime_88e(txrpt_ccx) + , txrpt_ccx->final_data_rate + , txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx) + ); +} + +void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf) +{ + struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf; + +#ifdef DBG_CCX + dump_txrpt_ccx_88e(buf); +#endif + + if (txrpt_ccx->int_ccx) { + if (txrpt_ccx->pkt_ok) + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); + else + rtw_ack_tx_done(&adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); + } +} +#endif /* CONFIG_XMIT_ACK */ + +void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc) +{ + u8 bDumpTxPkt; + u8 bDumpTxDesc = _FALSE; + rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(bDumpTxPkt)); + + if (bDumpTxPkt == 1) { /* dump txdesc for data frame */ + RTW_INFO("dump tx_desc for data frame\n"); + if ((frame_tag & 0x0f) == DATA_FRAMETAG) + bDumpTxDesc = _TRUE; + } else if (bDumpTxPkt == 2) { /* dump txdesc for mgnt frame */ + RTW_INFO("dump tx_desc for mgnt frame\n"); + if ((frame_tag & 0x0f) == MGNT_FRAMETAG) + bDumpTxDesc = _TRUE; + } else if (bDumpTxPkt == 3) { /* dump early info */ + } + + if (bDumpTxDesc) { + /* ptxdesc->txdw4 = cpu_to_le32(0x00001006); */ /* RTS Rate=24M */ + /* ptxdesc->txdw6 = 0x6666f800; */ + RTW_INFO("=====================================\n"); + RTW_INFO("txdw0(0x%08x)\n", ptxdesc->txdw0); + RTW_INFO("txdw1(0x%08x)\n", ptxdesc->txdw1); + RTW_INFO("txdw2(0x%08x)\n", ptxdesc->txdw2); + RTW_INFO("txdw3(0x%08x)\n", ptxdesc->txdw3); + RTW_INFO("txdw4(0x%08x)\n", ptxdesc->txdw4); + RTW_INFO("txdw5(0x%08x)\n", ptxdesc->txdw5); + RTW_INFO("txdw6(0x%08x)\n", ptxdesc->txdw6); + RTW_INFO("txdw7(0x%08x)\n", ptxdesc->txdw7); + RTW_INFO("=====================================\n"); + } + +} + +/* + * Description: + * Aggregation packets and send to hardware + * + * Return: + * 0 Success + * -1 Hardware resource(TX FIFO) not ready + * -2 Software resource(xmitbuf) not ready + */ +#ifdef CONFIG_TX_EARLY_MODE + +/* #define DBG_EMINFO */ + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + #define EARLY_MODE_MAX_PKT_NUM 10 +#else + #define EARLY_MODE_MAX_PKT_NUM 5 +#endif + + +struct EMInfo { + u8 EMPktNum; + u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; +}; + + +void +InsertEMContent_8188E( + struct EMInfo *pEMInfo, + u8 *VirtualAddress) +{ + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + u8 index = 0; + u32 dwtmp = 0; +#endif + + _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); + if (pEMInfo->EMPktNum == 0) + return; + +#ifdef DBG_EMINFO + { + int i; + RTW_INFO("\n%s ==> pEMInfo->EMPktNum =%d\n", __FUNCTION__, pEMInfo->EMPktNum); + for (i = 0; i < EARLY_MODE_MAX_PKT_NUM; i++) + RTW_INFO("%s ==> pEMInfo->EMPktLen[%d] =%d\n", __FUNCTION__, i, pEMInfo->EMPktLen[i]); + + } +#endif + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + + if (pEMInfo->EMPktNum == 1) + dwtmp = pEMInfo->EMPktLen[0]; + else { + dwtmp = pEMInfo->EMPktLen[0]; + dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4; + dwtmp += pEMInfo->EMPktLen[1]; + } + SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); + if (pEMInfo->EMPktNum <= 3) + dwtmp = pEMInfo->EMPktLen[2]; + else { + dwtmp = pEMInfo->EMPktLen[2]; + dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4; + dwtmp += pEMInfo->EMPktLen[3]; + } + SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); + if (pEMInfo->EMPktNum <= 5) + dwtmp = pEMInfo->EMPktLen[4]; + else { + dwtmp = pEMInfo->EMPktLen[4]; + dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4; + dwtmp += pEMInfo->EMPktLen[5]; + } + SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp & 0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp >> 4); + if (pEMInfo->EMPktNum <= 7) + dwtmp = pEMInfo->EMPktLen[6]; + else { + dwtmp = pEMInfo->EMPktLen[6]; + dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4; + dwtmp += pEMInfo->EMPktLen[7]; + } + SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); + if (pEMInfo->EMPktNum <= 9) + dwtmp = pEMInfo->EMPktLen[8]; + else { + dwtmp = pEMInfo->EMPktLen[8]; + dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4; + dwtmp += pEMInfo->EMPktLen[9]; + } + SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); +#else + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); + SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); + SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2] & 0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2] >> 4); + SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); + SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); +#endif + +} + + + +void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + /* _adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */ + int index, j; + u16 offset, pktlen; + PTXDESC_8188E ptxdesc; + + u8 *pmem, *pEMInfo_mem; + s8 node_num_0 = 0, node_num_1 = 0; + struct EMInfo eminfo; + struct agg_pkt_info *paggpkt; + struct xmit_frame *pframe = (struct xmit_frame *)pxmitbuf->priv_data; + pmem = pframe->buf_addr; + +#ifdef DBG_EMINFO + RTW_INFO("\n%s ==> agg_num:%d\n", __FUNCTION__, pframe->agg_num); + for (index = 0; index < pframe->agg_num; index++) { + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + RTW_INFO("%s ==> agg_pkt[%d].offset=%d\n", __FUNCTION__, index, offset); + RTW_INFO("%s ==> agg_pkt[%d].pkt_len=%d\n", __FUNCTION__, index, pktlen); + } +#endif + + if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) { + node_num_0 = pframe->agg_num; + node_num_1 = EARLY_MODE_MAX_PKT_NUM - 1; + } + + for (index = 0; index < pframe->agg_num; index++) { + + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + + _rtw_memset(&eminfo, 0, sizeof(struct EMInfo)); + if (pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) { + if (node_num_0 > EARLY_MODE_MAX_PKT_NUM) { + eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; + node_num_0--; + } else { + eminfo.EMPktNum = node_num_1; + node_num_1--; + } + } else + eminfo.EMPktNum = pframe->agg_num - (index + 1); + for (j = 0; j < eminfo.EMPktNum ; j++) { + eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index + 1 + j].pkt_len + 4; /* 4 bytes CRC */ + } + + if (pmem) { + if (index == 0) { + ptxdesc = (PTXDESC_8188E)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE; + } else { + pmem = pmem + pxmitpriv->agg_pkt[index - 1].offset; + ptxdesc = (PTXDESC_8188E)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc) + TXDESC_SIZE; + } + +#ifdef DBG_EMINFO + RTW_INFO("%s ==> desc.pkt_len=%d\n", __FUNCTION__, ptxdesc->pktlen); +#endif + InsertEMContent_8188E(&eminfo, pEMInfo_mem); + } + + + } + _rtw_memset(pxmitpriv->agg_pkt, 0, sizeof(struct agg_pkt_info) * MAX_AGG_PKT_NUM); + +} +#endif + +void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) +{ + if ((pattrib->encrypt > 0) && (!pattrib->bswenc) + && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) { + + ptxdesc->txdw1 |= cpu_to_le32((0x01 << 21) & 0x00200000); + ptxdesc->txdw1 |= cpu_to_le32((pattrib->bmc_camid) & 0x1f); + } +} + +void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc) +{ + u16 *usPtr = (u16 *)ptxdesc; + u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */ + u32 index; + u16 checksum = 0; + + + /* Clear first */ + ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + + for (index = 0; index < count; index++) + checksum ^= le16_to_cpu(*(usPtr + index)); + + ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff); +} diff --git a/hal/rtl8188e/usb/rtl8188eu_led.c b/hal/rtl8188e/usb/rtl8188eu_led.c new file mode 100644 index 0000000..177ad52 --- /dev/null +++ b/hal/rtl8188e/usb/rtl8188eu_led.c @@ -0,0 +1,157 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include +#include +#ifdef CONFIG_RTW_SW_LED + +/* ******************************************************************************** + * LED object. + * ******************************************************************************** */ + + +/* ******************************************************************************** + * Prototype of protected function. + * ******************************************************************************** */ + + +/* ******************************************************************************** + * LED_819xUsb routines. + * ******************************************************************************** */ + +/* + * Description: + * Turn on LED according to LedPin specified. + * */ +static void +SwLedOn_8188EU( + _adapter *padapter, + PLED_USB pLed +) +{ + u8 LedCfg; + /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */ + + if (RTW_CANNOT_RUN(padapter)) + return; + + LedCfg = rtw_read8(padapter, REG_LEDCFG2); + switch (pLed->LedPin) { + case LED_PIN_LED0: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0xf0) | BIT5 | BIT6); /* SW control led0 on. */ + break; + + case LED_PIN_LED1: + rtw_write8(padapter, REG_LEDCFG2, (LedCfg & 0x0f) | BIT5); /* SW control led1 on. */ + break; + + default: + break; + } + + pLed->bLedOn = _TRUE; +} + + +/* + * Description: + * Turn off LED according to LedPin specified. + * */ +static void +SwLedOff_8188EU( + _adapter *padapter, + PLED_USB pLed +) +{ + u8 LedCfg; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (RTW_CANNOT_RUN(padapter)) + goto exit; + + + LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */ + + switch (pLed->LedPin) { + case LED_PIN_LED0: + if (pHalData->bLedOpenDrain == _TRUE) { /* Open-drain arrangement for controlling the LED) */ + LedCfg &= 0x90; /* Set to software control. */ + rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3)); + LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); + LedCfg &= 0xFE; + rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); + } else + rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3 | BIT5 | BIT6)); + break; + + case LED_PIN_LED1: + LedCfg &= 0x0f; /* Set to software control. */ + rtw_write8(padapter, REG_LEDCFG2, (LedCfg | BIT3)); + break; + + default: + break; + } +exit: + pLed->bLedOn = _FALSE; + +} + +/* ******************************************************************************** + * Interface to manipulate LED objects. + * ******************************************************************************** */ + + +/* ******************************************************************************** + * Default LED behavior. + * ******************************************************************************** */ + +/* + * Description: + * Initialize all LED_871x objects. + * */ +void +rtl8188eu_InitSwLeds( + _adapter *padapter +) +{ + struct led_priv *pledpriv = adapter_to_led(padapter); + + pledpriv->LedControlHandler = LedControlUSB; + + pledpriv->SwLedOn = SwLedOn_8188EU; + pledpriv->SwLedOff = SwLedOff_8188EU; + + InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); + + InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); +} + + +/* + * Description: + * DeInitialize all LED_819xUsb objects. + * */ +void +rtl8188eu_DeInitSwLeds( + _adapter *padapter +) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + + DeInitLed(&(ledpriv->SwLed0)); + DeInitLed(&(ledpriv->SwLed1)); +} +#endif diff --git a/hal/rtl8188e/usb/rtl8188eu_recv.c b/hal/rtl8188e/usb/rtl8188eu_recv.c new file mode 100644 index 0000000..1a99532 --- /dev/null +++ b/hal/rtl8188e/usb/rtl8188eu_recv.c @@ -0,0 +1,28 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188EU_RECV_C_ + +#include +#include + +int rtl8188eu_init_recv_priv(_adapter *padapter) +{ + return usb_init_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} + +void rtl8188eu_free_recv_priv(_adapter *padapter) +{ + usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} diff --git a/hal/rtl8188e/usb/rtl8188eu_xmit.c b/hal/rtl8188e/usb/rtl8188eu_xmit.c new file mode 100644 index 0000000..8d8fe77 --- /dev/null +++ b/hal/rtl8188e/usb/rtl8188eu_xmit.c @@ -0,0 +1,1338 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8188E_XMIT_C_ + +#include +#include + + +s32 rtl8188eu_init_xmit_priv(_adapter *padapter) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +#ifdef PLATFORM_LINUX + tasklet_init(&pxmitpriv->xmit_tasklet, + (void(*)(unsigned long))rtl8188eu_xmit_tasklet, + (unsigned long)padapter); +#endif +#ifdef CONFIG_TX_EARLY_MODE + pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; +#endif + + return _SUCCESS; +} + +void rtl8188eu_free_xmit_priv(_adapter *padapter) +{ +} + +u8 urb_zero_packet_chk(_adapter *padapter, int sz) +{ + u8 blnSetTxDescOffset; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) == 0) ? 1 : 0; + + return blnSetTxDescOffset; +} + +void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc) +{ + u16 *usPtr = (u16 *)ptxdesc; + u32 count = 16; /* (32 bytes / 2 bytes per XOR) => 16 times */ + u32 index; + u16 checksum = 0; + + /* Clear first */ + ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); + + for (index = 0 ; index < count ; index++) + checksum = checksum ^ le16_to_cpu(*(usPtr + index)); + + ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff & checksum); + +} +/* + * Description: In normal chip, we should send some packet to Hw which will be used by Fw + * in FW LPS mode. The function is to fill the Tx descriptor of this packets, then + * Fw can tell Hw to send these packet derectly. + * */ +void rtl8188e_fill_fake_txdesc( + PADAPTER padapter, + u8 *pDesc, + u32 BufferLen, + u8 IsPsPoll, + u8 IsBTQosNull, + u8 bDataFrame) +{ + struct tx_desc *ptxdesc; + + + /* Clear all status */ + ptxdesc = (struct tx_desc *)pDesc; + _rtw_memset(pDesc, 0, TXDESC_SIZE); + + /* offset 0 */ + ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */ + + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */ + + ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */ + + /* offset 4 */ + ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue */ + + /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */ + if (IsPsPoll) + ptxdesc->txdw1 |= cpu_to_le32(NAVUSEHDR); + else { + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */ + ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */ + } + + if (_TRUE == IsBTQosNull) { + ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */ + } + + /* offset 16 */ + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */ + + /* */ + /* Encrypt the data frame if under security mode excepct null data. Suggested by CCW. */ + /* */ + if (_TRUE == bDataFrame) { + u32 EncAlg; + + EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; + switch (EncAlg) { + case _NO_PRIVACY_: + SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x0); + break; + case _WEP40_: + case _WEP104_: + case _TKIP_: + SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x1); + break; + case _SMS4_: + SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x2); + break; + case _AES_: + SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x3); + break; + default: + SET_TX_DESC_SEC_TYPE_8188E(pDesc, 0x0); + break; + } + } + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + /* USB interface drop packet if the checksum of descriptor isn't correct. */ + /* Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). */ + rtl8188eu_cal_txdesc_chksum(ptxdesc); +#endif +} + +void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) +{ + if ((pattrib->encrypt > 0) && !pattrib->bswenc) { + switch (pattrib->encrypt) { + /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */ + case _WEP40_: + case _WEP104_: + ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000); + ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; + case _TKIP_: + case _TKIP_WTMIC_: + ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000); + ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + ptxdesc->txdw1 |= cpu_to_le32((0x02 << SEC_TYPE_SHT) & 0x00c00000); + ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; +#endif + case _AES_: + ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000); + ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT); + break; + case _NO_PRIVACY_: + default: + break; + + } + + } + +} + +void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) +{ + /* RTW_INFO("cvs_mode=%d\n", pattrib->vcs_mode); */ + + switch (pattrib->vcs_mode) { + case RTS_CTS: + *pdw |= cpu_to_le32(RTS_EN); + break; + case CTS_TO_SELF: + *pdw |= cpu_to_le32(CTS_2_SELF); + break; + case NONE_VCS: + default: + break; + } + + if (pattrib->vcs_mode) { + *pdw |= cpu_to_le32(HW_RTS_EN); + + /* Set RTS BW */ + if (pattrib->ht_en) { + *pdw |= (pattrib->bwmode & CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0; + + if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01 << 28) & 0x30000000); + else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02 << 28) & 0x30000000); + else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + *pdw |= 0; + else + *pdw |= cpu_to_le32((0x03 << 28) & 0x30000000); + } + } +} + +void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) +{ + /* RTW_INFO("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); */ + + if (pattrib->ht_en) { + *pdw |= (pattrib->bwmode & CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0; + + if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) + *pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000); + else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) + *pdw |= cpu_to_le32((0x02 << DATA_SC_SHT) & 0x003f0000); + else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) + *pdw |= 0; + else + *pdw |= cpu_to_le32((0x03 << DATA_SC_SHT) & 0x003f0000); + } +} + + +static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 bagg_pkt) +{ + int pull = 0; + uint qsel; + bool sgi = 0; + u8 data_rate = 0, pwr_status, offset; + _adapter *padapter = pxmitframe->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + struct tx_desc *ptxdesc = (struct tx_desc *)pmem; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + sint bmcst = IS_MCAST(pattrib->ra); +#ifdef CONFIG_P2P + struct wifidirect_info *pwdinfo = &padapter->wdinfo; +#endif /* CONFIG_P2P */ + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + if (padapter->registrypriv.mp_mode == 0) { + /* if((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0)) */ /* (sz %512) != 0 */ + if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt) && (rtw_usb_bulk_size_boundary(padapter, TXDESC_SIZE + sz) == _FALSE)) { + ptxdesc = (struct tx_desc *)(pmem + PACKET_OFFSET_SZ); + /* RTW_INFO("==> non-agg-pkt,shift pointer...\n"); */ + pull = 1; + } + } +#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ + + _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); + + /* 4 offset 0 */ + ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); + /* RTW_INFO("%s==> pkt_len=%d,bagg_pkt=%02x\n",__FUNCTION__,sz,bagg_pkt); */ + ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);/* update TXPKTSIZE */ + + offset = TXDESC_SIZE + OFFSET_SZ; + +#ifdef CONFIG_TX_EARLY_MODE + if (bagg_pkt) { + offset += EARLY_MODE_INFO_SIZE ;/* 0x28 */ + } +#endif + /* RTW_INFO("%s==>offset(0x%02x)\n",__FUNCTION__,offset); */ + ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */ + + if (bmcst) + ptxdesc->txdw0 |= cpu_to_le32(BMC); + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + if (padapter->registrypriv.mp_mode == 0) { + if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt)) { + if ((pull) && (pxmitframe->pkt_offset > 0)) + pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1; + } + } +#endif + /* RTW_INFO("%s, pkt_offset=0x%02x\n",__FUNCTION__,pxmitframe->pkt_offset); */ + + /* pkt_offset, unit:8 bytes padding */ + if (pxmitframe->pkt_offset > 0) + ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); + + if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { + /* RTW_INFO("pxmitframe->frame_tag == DATA_FRAMETAG\n"); */ + + /* offset 4 */ + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3F); + + qsel = (uint)(pattrib->qsel & 0x0000001f); + /* RTW_INFO("==> macid(%d) qsel:0x%02x\n",pattrib->mac_id,qsel); */ + ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); + + fill_txdesc_sectype(pattrib, ptxdesc); + + if (bmcst) + fill_txdesc_force_bmc_camid(pattrib, ptxdesc); + + if (pattrib->ampdu_en == _TRUE) { + ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);/* AGG EN */ + ptxdesc->txdw2 |= (pattrib->ampdu_spacing << AMPDU_DENSITY_SHT) & 0x00700000; + + /* SET_TX_DESC_MAX_AGG_NUM_88E(pDesc, 0x1F); */ + /* SET_TX_DESC_MCSG1_MAX_LEN_88E(pDesc, 0x6); */ + /* SET_TX_DESC_MCSG2_MAX_LEN_88E(pDesc, 0x6); */ + /* SET_TX_DESC_MCSG3_MAX_LEN_88E(pDesc, 0x6); */ + /* SET_TX_DESC_MCS7_SGI_MAX_LEN_88E(pDesc, 0x6); */ + ptxdesc->txdw6 = 0x6666f800; + } else { + ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ + } + + /* offset 8 */ + + + /* offset 12 */ + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000); + + + /* offset 16 , offset 20 */ + if (pattrib->qos_en) + ptxdesc->txdw4 |= cpu_to_le32(QOS);/* QoS */ + + /* offset 20 */ +#ifdef CONFIG_USB_TX_AGGREGATION + if (pxmitframe->agg_num > 1) { + /* RTW_INFO("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); */ + ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << USB_TXAGG_NUM_SHT) & 0xFF000000); + } +#endif + + if ((pattrib->ether_type != 0x888e) && + (pattrib->ether_type != 0x0806) && + (pattrib->ether_type != 0x88b4) && + (pattrib->dhcp_pkt != 1)) { + /* Non EAP & ARP & DHCP type data packet */ + + fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); + fill_txdesc_phy(pattrib, &ptxdesc->txdw4); + + ptxdesc->txdw4 |= cpu_to_le32(0x00000008);/* RTS Rate=24M */ + ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);/* DATA/RTS Rate FB LMT */ + +#if (RATE_ADAPTIVE_SUPPORT == 1) + if (pHalData->fw_ractrl == _FALSE) { + /* driver-based RA*/ + /* driver uses rate */ + ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */ + if (pattrib->ht_en) + sgi = odm_ra_get_sgi_8188e(&pHalData->odmpriv, pattrib->mac_id); + + data_rate = odm_ra_get_decision_rate_8188e(&pHalData->odmpriv, pattrib->mac_id); + +#if (POWER_TRAINING_ACTIVE == 1) + pwr_status = odm_ra_get_hw_pwr_status_8188e(&pHalData->odmpriv, pattrib->mac_id); + ptxdesc->txdw4 |= cpu_to_le32((pwr_status & 0x7) << PWR_STATUS_SHT); +#endif + } else +#endif/* if (RATE_ADAPTIVE_SUPPORT == 1) */ + { + /* FW-based RA, TODO */ + if (pattrib->ht_en) + sgi = 1; + + data_rate = DESC_RATEMCS7; /* default rate: MCS7 */ + } + if (bmcst) { + data_rate = MRateToHwRate(pattrib->rate); + ptxdesc->txdw4 |= cpu_to_le32(USERATE); + ptxdesc->txdw4 |= cpu_to_le32(DISDATAFB); + } + + if (padapter->fix_rate != 0xFF) { + data_rate = padapter->fix_rate; + ptxdesc->txdw4 |= cpu_to_le32(USERATE); + if (!padapter->data_fb) + ptxdesc->txdw4 |= cpu_to_le32(DISDATAFB); + sgi = (padapter->fix_rate & BIT(7)) ? 1 : 0; + } + + if (sgi) + ptxdesc->txdw5 |= cpu_to_le32(SGI); + + ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F); + } else { + /* EAP data packet and ARP packet and DHCP. */ + /* Use the 1M data rate to send the EAP/ARP packet. */ + /* This will maybe make the handshake smooth. */ + + /* driver uses rate */ + ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */ + ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);/* AGG BK */ + + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) + ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */ +#ifdef CONFIG_IP_R_MONITOR + if((pattrib->ether_type == ETH_P_ARP) && + (IsSupportedTxOFDM(padapter->registrypriv.wireless_mode))) { + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(IEEE80211_OFDM_RATE_6MB)); + #ifdef DBG_IP_R_MONITOR + RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n", + FUNC_ADPT_ARG(padapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum); + #endif/*DBG_IP_R_MONITOR*/ + } else +#endif/*CONFIG_IP_R_MONITOR*/ + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + +#ifdef CONFIG_TDLS +#ifdef CONFIG_XMIT_ACK + /* CCX-TXRPT ack for xmit mgmt frames. */ + if (pxmitframe->ack_report) { +#ifdef DBG_CCX + static u16 ccx_sw = 0x123; + + ptxdesc->txdw7 |= cpu_to_le32(((ccx_sw) << 16) & 0x0fff0000); + RTW_INFO("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); + ccx_sw = (ccx_sw + 1) % 0xfff; +#endif + ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); + } +#endif /* CONFIG_XMIT_ACK */ +#endif + } else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) { + /* RTW_INFO("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); */ + /* driver uses rate */ + ptxdesc->txdw4 |= cpu_to_le32(USERATE);/* rate control always by driver */ + + /* offset 4 */ + ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f); + + qsel = (uint)(pattrib->qsel & 0x0000001f); + ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000); + + /* fill_txdesc_sectype(pattrib, ptxdesc); */ + + /* offset 8 */ +#ifdef CONFIG_XMIT_ACK + /* CCX-TXRPT ack for xmit mgmt frames. */ + if (pxmitframe->ack_report) { +#ifdef DBG_CCX + static u16 ccx_sw = 0x123; + ptxdesc->txdw7 |= cpu_to_le32(((ccx_sw) << 16) & 0x0fff0000); + RTW_INFO("%s set ccx, sw:0x%03x\n", __func__, ccx_sw); + ccx_sw = (ccx_sw + 1) % 0xfff; +#endif + ptxdesc->txdw2 |= cpu_to_le32(BIT(19)); + } +#endif /* CONFIG_XMIT_ACK */ + + /* offset 12 */ + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000); + + /* offset 20 */ + ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */ + if (pattrib->retry_ctrl == _TRUE) + ptxdesc->txdw5 |= cpu_to_le32(0x00180000);/* retry limit = 6 */ + else + ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */ + + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pattrib->rate)); + + } else if ((pxmitframe->frame_tag & 0x0f) == TXAGG_FRAMETAG) + RTW_INFO("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); +#ifdef CONFIG_MP_INCLUDED + else if (((pxmitframe->frame_tag & 0x0f) == MP_FRAMETAG) && + (padapter->registrypriv.mp_mode == 1)) + fill_txdesc_for_mp(padapter, (u8 *)ptxdesc); +#endif + else { + RTW_INFO("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); + + /* offset 4 */ + ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f); /* CAM_ID(MAC_ID) */ + + ptxdesc->txdw1 |= cpu_to_le32((6 << RATE_ID_SHT) & 0x000f0000); /* raid */ + + /* offset 8 */ + + /* offset 12 */ + ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000); + + /* offset 20 */ + ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate)); + } + + /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. */ + /* (1) The sequence number of each non-Qos frame / broadcast / multicast / */ + /* mgnt frame should be controled by Hw because Fw will also send null data */ + /* which we cannot control when Fw LPS enable. */ + /* --> default enable non-Qos data sequense number. 2010.06.23. by tynli. */ + /* (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. */ + /* (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. */ + /* 2010.06.23. Added by tynli. */ + if (!pattrib->qos_en) { + /* ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); */ /* Hw set sequence number */ + /* ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); */ /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */ + + ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); /* Hw set sequence number */ + ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */ + + } + +#ifdef CONFIG_ANTENNA_DIVERSITY + if (!bmcst && pattrib->psta) + odm_set_tx_ant_by_tx_info(adapter_to_phydm(padapter), pmem, pattrib->psta->cmn.mac_id); +#endif + + rtl8188eu_cal_txdesc_chksum(ptxdesc); + _dbg_dump_tx_info(padapter, pxmitframe->frame_tag, ptxdesc); + return pull; + +} + + +#ifdef CONFIG_XMIT_THREAD_MODE +/* + * Description + * Transmit xmitbuf to hardware tx fifo + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter) +{ + /* PHAL_DATA_TYPE phal; */ + struct xmit_priv *pxmitpriv; + struct xmit_buf *pxmitbuf; + struct xmit_frame *pxmitframe; + s32 ret; + + + /* phal = GET_HAL_DATA(padapter); */ + pxmitpriv = &padapter->xmitpriv; + + ret = _rtw_down_sema(&pxmitpriv->xmit_sema); + if (_FAIL == ret) { + return _FAIL; + } + if (RTW_CANNOT_RUN(padapter)) { + RTW_DBG(FUNC_ADPT_FMT "- bDriverStopped(%s) bSurpriseRemoved(%s)\n", + FUNC_ADPT_ARG(padapter), + rtw_is_drv_stopped(padapter) ? "True" : "False", + rtw_is_surprise_removed(padapter) ? "True" : "False"); + return _FAIL; + } + + if (rtw_mi_check_pending_xmitbuf(padapter) == 0) + return _SUCCESS; + +#ifdef CONFIG_LPS_LCLK + ret = rtw_register_tx_alive(padapter); + if (ret != _SUCCESS) { + return _SUCCESS; + } +#endif + + do { + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) + break; + pxmitframe = (struct xmit_frame *) pxmitbuf->priv_data; + rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char *)pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + } while (1); + +#ifdef CONFIG_LPS_LCLK + rtw_unregister_tx_alive(padapter); +#endif + + return _SUCCESS; +} +#endif + +#ifdef CONFIG_IOL_IOREG_CFG_DBG + #include +#endif +/* for non-agg data frame or management frame */ +static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 ret = _SUCCESS; + s32 inner_ret = _SUCCESS; + int t, sz, w_sz, pull = 0; + u8 *mem_addr; + u32 ff_hwaddr; + struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; +#ifdef CONFIG_80211N_HT + if ((pxmitframe->frame_tag == DATA_FRAMETAG) && + (pxmitframe->attrib.ether_type != 0x0806) && + (pxmitframe->attrib.ether_type != 0x888e) && + (pxmitframe->attrib.ether_type != 0x88b4) && + (pxmitframe->attrib.dhcp_pkt != 1)) + rtw_issue_addbareq_cmd(padapter, pxmitframe, _FALSE); +#endif /* CONFIG_80211N_HT */ + mem_addr = pxmitframe->buf_addr; + + + for (t = 0; t < pattrib->nr_frags; t++) { + if (inner_ret != _SUCCESS && ret == _SUCCESS) + ret = _FAIL; + + if (t != (pattrib->nr_frags - 1)) { + + sz = pxmitpriv->frag_len; + sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); + } else /* no frag */ + sz = pattrib->last_txcmdsz; + + pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); + + if (pull) { + mem_addr += PACKET_OFFSET_SZ; /* pull txdesc head */ + + /* pxmitbuf->pbuf = mem_addr; */ + pxmitframe->buf_addr = mem_addr; + + w_sz = sz + TXDESC_SIZE; + } else + w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; +#ifdef CONFIG_IOL_IOREG_CFG_DBG + rtw_IOL_cmd_buf_dump(padapter, w_sz, pxmitframe->buf_addr); +#endif + ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); + +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = w_sz; + pxmitbuf->ff_hwaddr = ff_hwaddr; + + if (pxmitframe->attrib.qsel == QSLT_BEACON) + /* download rsvd page*/ + rtw_write_port(padapter, ff_hwaddr, w_sz, (u8 *)pxmitbuf); + else + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else + /* RTW_INFO("%s: rtw_write_port size =%d\n", __func__,w_sz); */ + inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf); +#endif + + rtw_count_tx_stats(padapter, pxmitframe, sz); + + /* RTW_INFO("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); */ + + mem_addr += w_sz; + + mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); + + } + +#ifdef CONFIG_XMIT_THREAD_MODE + if (pxmitframe->attrib.qsel == QSLT_BEACON) +#endif + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + if (ret != _SUCCESS) + rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); + + return ret; +} + +#ifdef CONFIG_USB_TX_AGGREGATION +#define IDEA_CONDITION 1 /* check all packets before enqueue */ +s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct xmit_frame *pxmitframe = NULL; + struct xmit_frame *pfirstframe = NULL; + + /* aggregate variable */ + struct hw_xmit *phwxmit; + struct sta_info *psta = NULL; + struct tx_servq *ptxservq = NULL; + + _irqL irqL; + _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; + + u32 pbuf; /* next pkt address */ + u32 pbuf_tail; /* last pkt tail */ + u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */ + + u32 bulkSize = pHalData->UsbBulkOutSize; + u8 descCount; + u32 bulkPtr; + + /* dump frame variable */ + u32 ff_hwaddr; + + _list *sta_plist, *sta_phead; + u8 single_sta_in_queue = _FALSE; + +#ifndef IDEA_CONDITION + int res = _SUCCESS; +#endif + +#ifdef CONFIG_RTW_MGMT_QUEUE + /* dump management frame directly */ + pxmitframe = rtw_dequeue_mgmt_xframe(pxmitpriv); + if (pxmitframe) { + rtw_dump_xframe(padapter, pxmitframe); + return _TRUE; + } +#endif + + /* check xmitbuffer is ok */ + if (pxmitbuf == NULL) { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) { + /* RTW_INFO("%s #1, connot alloc xmitbuf!!!!\n",__FUNCTION__); */ + return _FALSE; + } + } + + /* RTW_INFO("%s =====================================\n",__FUNCTION__); */ + /* 3 1. pick up first frame */ + do { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); + if (pxmitframe == NULL) { + /* no more xmit frame, release xmit buffer */ + /* RTW_INFO("no more xmit frame ,return\n"); */ + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + +#ifndef IDEA_CONDITION + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + /* rtw_free_xmitframe(pxmitpriv, pxmitframe); */ + continue; + } + + /* TID 0~15 */ + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + /* rtw_free_xmitframe(pxmitpriv, pxmitframe); */ + continue; + } +#endif + /* RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); */ + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ +#ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = (PACKET_OFFSET_SZ / 8) + 1; /* 2; */ /* first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check */ +#else + pxmitframe->pkt_offset = (PACKET_OFFSET_SZ / 8); /* 1; */ /* first frame of aggregation, reserve offset */ +#endif + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + RTW_INFO("%s coalesce 1st xmitframe failed\n", __FUNCTION__); + continue; + } + + /* always return ndis_packet after rtw_xmitframe_coalesce */ + rtw_os_xmit_complete(padapter, pxmitframe); + + break; + } while (1); + + /* 3 2. aggregate same priority and same DA(AP or STA) frames */ + pfirstframe = pxmitframe; + len = rtw_wlan_pkt_size(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); + pbuf_tail = len; + pbuf = _RND8(pbuf_tail); + + /* check pkt amount in one bulk */ + descCount = 0; + bulkPtr = bulkSize; + if (pbuf < bulkPtr) { + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) + goto agg_end; + } else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; /* round to next bulkSize */ + } + + /* dequeue same priority packet from station tx queue */ + /* psta = pfirstframe->attrib.psta; */ + psta = rtw_get_stainfo(&padapter->stapriv, pfirstframe->attrib.ra); + if (pfirstframe->attrib.psta != psta) + RTW_INFO("%s, pattrib->psta(%p) != psta(%p)\n", __func__, pfirstframe->attrib.psta, psta); + if (psta == NULL) + RTW_INFO("rtw_xmit_classifier: psta == NULL\n"); + if (!(psta->state & WIFI_ASOC_STATE)) + RTW_INFO("%s, psta->state(0x%x) != WIFI_ASOC_STATE\n", __func__, psta->state); + + switch (pfirstframe->attrib.priority) { + case 1: + case 2: + ptxservq = &(psta->sta_xmitpriv.bk_q); + phwxmit = pxmitpriv->hwxmits + 3; + break; + + case 4: + case 5: + ptxservq = &(psta->sta_xmitpriv.vi_q); + phwxmit = pxmitpriv->hwxmits + 1; + break; + + case 6: + case 7: + ptxservq = &(psta->sta_xmitpriv.vo_q); + phwxmit = pxmitpriv->hwxmits; + break; + + case 0: + case 3: + default: + ptxservq = &(psta->sta_xmitpriv.be_q); + phwxmit = pxmitpriv->hwxmits + 2; + break; + } + /* RTW_INFO("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", */ + /* pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); */ + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + + sta_phead = get_list_head(phwxmit->sta_queue); + sta_plist = get_next(sta_phead); + single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist)); + + xmitframe_phead = get_list_head(&ptxservq->sta_pending); + xmitframe_plist = get_next(xmitframe_phead); + + while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { + pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); + xmitframe_plist = get_next(xmitframe_plist); + + if (_FAIL == rtw_hal_busagg_qsel_check(padapter, pfirstframe->attrib.qsel, pxmitframe->attrib.qsel)) + break; + + pxmitframe->agg_num = 0; /* not first frame of aggregation */ +#ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = 1;/* not first frame of aggregation,reserve offset for EM Info */ +#else + pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */ +#endif + + len = rtw_wlan_pkt_size(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); + + if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) { + /* RTW_INFO("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); */ + pxmitframe->agg_num = 1; + pxmitframe->pkt_offset = 1; + break; + } + rtw_list_delete(&pxmitframe->list); + ptxservq->qcnt--; + phwxmit->accnt--; + +#ifndef IDEA_CONDITION + /* suppose only data frames would be in queue */ + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + /* TID 0~15 */ + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + + /* pxmitframe->pxmitbuf = pxmitbuf; */ + pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + RTW_INFO("%s coalesce failed\n", __FUNCTION__); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + /* RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); */ + /* always return ndis_packet after rtw_xmitframe_coalesce */ + rtw_os_xmit_complete(padapter, pxmitframe); + + /* (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz */ + update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz, _TRUE); + + /* don't need xmitframe any more */ + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + /* handle pointer and stop condition */ + pbuf_tail = pbuf + len; + pbuf = _RND8(pbuf_tail); + + + pfirstframe->agg_num++; +#ifdef CONFIG_TX_EARLY_MODE + pxmitpriv->agg_pkt[pfirstframe->agg_num - 1].offset = _RND8(len); + pxmitpriv->agg_pkt[pfirstframe->agg_num - 1].pkt_len = pxmitframe->attrib.last_txcmdsz; +#endif + if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) + break; + + if (pbuf < bulkPtr) { + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) + break; + } else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; + } + } /* end while( aggregate same priority and same DA(AP or STA) frames) */ + if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) + rtw_list_delete(&ptxservq->tx_pending); + else if (single_sta_in_queue == _FALSE) { + /* Re-arrange the order of stations in this ac queue to balance the service for these stations */ + rtw_list_delete(&ptxservq->tx_pending); + rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue)); + } + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + +agg_end: + +#ifdef CONFIG_80211N_HT + if ((pfirstframe->attrib.ether_type != 0x0806) && + (pfirstframe->attrib.ether_type != 0x888e) && + (pfirstframe->attrib.ether_type != 0x88b4) && + (pfirstframe->attrib.dhcp_pkt != 1)) + rtw_issue_addbareq_cmd(padapter, pfirstframe, _FALSE); +#endif /* CONFIG_80211N_HT */ +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + /* 3 3. update first frame txdesc */ + if ((PACKET_OFFSET_SZ != 0) && ((pbuf_tail % bulkSize) == 0)) { + /* remove pkt_offset */ + pbuf_tail -= PACKET_OFFSET_SZ; + pfirstframe->buf_addr += PACKET_OFFSET_SZ; + pfirstframe->pkt_offset--; + /* RTW_INFO("$$$$$ buf size equal to USB block size $$$$$$\n"); */ + } +#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ + + update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz, _TRUE); + +#ifdef CONFIG_TX_EARLY_MODE + /* prepare EM info for first frame, agg_num value start from 1 */ + pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ)); + pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;/* get from rtw_xmitframe_coalesce */ + + UpdateEarlyModeInfo8188E(pxmitpriv, pxmitbuf); +#endif + + /* 3 4. write xmit buffer to USB FIFO */ + ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); + /* RTW_INFO("%s ===================================== write port,buf_size(%d)\n",__FUNCTION__,pbuf_tail); */ + /* xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr */ + +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = pbuf_tail; + pxmitbuf->ff_hwaddr = ff_hwaddr; + + if (pfirstframe->attrib.qsel == QSLT_BEACON) + /* download rsvd page*/ + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf); + else + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf); +#endif + + + /* 3 5. update statisitc */ + pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); + pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); + + + rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); + +#ifdef CONFIG_XMIT_THREAD_MODE + if (pfirstframe->attrib.qsel == QSLT_BEACON) +#endif + rtw_free_xmitframe(pxmitpriv, pfirstframe); + + return _TRUE; +} + +#else + +s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + + struct hw_xmit *phwxmits; + sint hwentry; + struct xmit_frame *pxmitframe = NULL; + int res = _SUCCESS, xcnt = 0; + + phwxmits = pxmitpriv->hwxmits; + hwentry = pxmitpriv->hwxmit_entry; + +#ifdef CONFIG_RTW_MGMT_QUEUE + /* dump management frame directly */ + pxmitframe = rtw_dequeue_mgmt_xframe(pxmitpriv); + if (pxmitframe) { + rtw_dump_xframe(padapter, pxmitframe); + return _TRUE; + } +#endif + + if (pxmitbuf == NULL) { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (!pxmitbuf) + return _FALSE; + } + + + do { + pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); + + if (pxmitframe) { + pxmitframe->pxmitbuf = pxmitbuf; + + pxmitframe->buf_addr = pxmitbuf->pbuf; + + pxmitbuf->priv_data = pxmitframe; + + if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { + if (pxmitframe->attrib.priority <= 15) /* TID0~15 */ + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + /* RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); */ + rtw_os_xmit_complete(padapter, pxmitframe);/* always return ndis_packet after rtw_xmitframe_coalesce */ + } + + + + + if (res == _SUCCESS) + rtw_dump_xframe(padapter, pxmitframe); + else { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + xcnt++; + + } else { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + + break; + + } while (0/*xcnt < (NR_XMITFRAME >> 3)*/); + + return _TRUE; + +} +#endif + + + +static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 res = _SUCCESS; + /* RTW_INFO("==> %s\n",__FUNCTION__); */ + + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + if (res == _SUCCESS) + rtw_dump_xframe(padapter, pxmitframe); + else + RTW_INFO("==> %s xmitframe_coalsece failed\n", __FUNCTION__); + + return res; +} + +/* + * Return + * _TRUE dump packet directly + * _FALSE enqueue packet + */ +static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + _irqL irqL; + s32 res; + struct xmit_buf *pxmitbuf = NULL; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + + /* RTW_INFO("==> %s\n",__FUNCTION__); */ + + if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) { + /* RTW_INFO("enqueue AC(%d)\n",pattrib->priority); */ + goto enqueue; + } + + if (rtw_xmit_ac_blocked(padapter) == _TRUE) + goto enqueue; + + if (DEV_STA_LG_NUM(padapter->dvobj)) + goto enqueue; + + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) + goto enqueue; + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + return _TRUE; + +enqueue: + res = rtw_xmitframe_enqueue(padapter, pxmitframe); + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + if (res != _SUCCESS) { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitpriv->tx_drop++; + return _TRUE; + } + + return _FALSE; +} + +s32 rtl8188eu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) +{ + return rtw_dump_xframe(padapter, pmgntframe); +} + +/* + * Return + * _TRUE dump packet directly ok + * _FALSE temporary can't transmit packets to hardware + */ +s32 rtl8188eu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + return pre_xmitframe(padapter, pxmitframe); +} + +#ifdef CONFIG_RTW_MGMT_QUEUE +s32 rtl8188eu_hal_mgmt_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + err = rtw_mgmt_xmitframe_enqueue(padapter, pxmitframe); + if (err != _SUCCESS) { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + pxmitpriv->tx_drop++; + } else { +#ifdef PLATFORM_LINUX + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +#endif + } + return err; +} +#endif + +s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + err = rtw_xmitframe_enqueue(padapter, pxmitframe); + if (err != _SUCCESS) { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitpriv->tx_drop++; + } else { +#ifdef PLATFORM_LINUX + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +#endif + } + + return err; + +} + + +#ifdef CONFIG_HOSTAPD_MLME + +static void rtl8188eu_hostap_mgnt_xmit_cb(struct urb *urb) +{ +#ifdef PLATFORM_LINUX + struct sk_buff *skb = (struct sk_buff *)urb->context; + + /* RTW_INFO("%s\n", __FUNCTION__); */ + + rtw_skb_free(skb); +#endif +} + +s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) +{ +#ifdef PLATFORM_LINUX + u16 fc; + int rc, len, pipe; + unsigned int bmcst, tid, qsel; + struct sk_buff *skb, *pxmit_skb; + struct urb *urb; + unsigned char *pxmitbuf; + struct tx_desc *ptxdesc; + struct rtw_ieee80211_hdr *tx_hdr; + struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; + struct net_device *pnetdev = padapter->pnetdev; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + + + /* RTW_INFO("%s\n", __FUNCTION__); */ + + skb = pkt; + + len = skb->len; + tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); + fc = le16_to_cpu(tx_hdr->frame_ctl); + bmcst = IS_MCAST(tx_hdr->addr1); + + if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) + goto _exit; + + pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); + + if (!pxmit_skb) + goto _exit; + + pxmitbuf = pxmit_skb->data; + + urb = usb_alloc_urb(0, GFP_ATOMIC); + if (!urb) + goto _exit; + + /* ----- fill tx desc ----- */ + ptxdesc = (struct tx_desc *)pxmitbuf; + _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); + + /* offset 0 */ + ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* default = 32 bytes for TX Desc */ + ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); + + if (bmcst) + ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); + + /* offset 4 */ + ptxdesc->txdw1 |= cpu_to_le32(0x00);/* MAC_ID */ + + ptxdesc->txdw1 |= cpu_to_le32((0x12 << QSEL_SHT) & 0x00001f00); + + ptxdesc->txdw1 |= cpu_to_le32((0x06 << 16) & 0x000f0000); /* b mode */ + + /* offset 8 */ + + /* offset 12 */ + ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl) << 16) & 0xffff0000); + + /* offset 16 */ + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));/* driver uses rate */ + + /* offset 20 */ + + + /* HW append seq */ + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); /* Hw set sequence number */ + ptxdesc->txdw3 |= cpu_to_le32((8 << 28)); /* set bit3 to 1. Suugested by TimChen. 2009.12.29. */ + + + rtl8188eu_cal_txdesc_chksum(ptxdesc); + /* ----- end of fill tx desc ----- */ + + /* */ + skb_put(pxmit_skb, len + TXDESC_SIZE); + pxmitbuf = pxmitbuf + TXDESC_SIZE; + _rtw_memcpy(pxmitbuf, skb->data, len); + + /* RTW_INFO("mgnt_xmit, len=%x\n", pxmit_skb->len); */ + + + /* ----- prepare urb for submit ----- */ + + /* translate DMA FIFO addr to pipehandle */ + /* pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); */ + pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX] & 0x0f); + + usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, + pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); + + urb->transfer_flags |= URB_ZERO_PACKET; + usb_anchor_urb(urb, &phostapdpriv->anchored); + rc = usb_submit_urb(urb, GFP_ATOMIC); + if (rc < 0) { + usb_unanchor_urb(urb); + kfree_skb(skb); + } + usb_free_urb(urb); + + +_exit: + + rtw_skb_free(skb); + +#endif + + return 0; + +} +#endif diff --git a/hal/rtl8188e/usb/usb_halinit.c b/hal/rtl8188e/usb/usb_halinit.c new file mode 100644 index 0000000..f4c4afb --- /dev/null +++ b/hal/rtl8188e/usb/usb_halinit.c @@ -0,0 +1,2216 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HCI_HAL_INIT_C_ + +#include +#include +#include "hal_com_h2c.h" + +#ifndef CONFIG_USB_HCI + + #error "CONFIG_USB_HCI shall be on!\n" + +#endif + + +static void +_ConfigNormalChipOutEP_8188E( + PADAPTER pAdapter, + u8 NumOutPipe +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + switch (NumOutPipe) { + case 3: + pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ; + pHalData->OutEpNumber = 3; + break; + case 2: + pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ; + pHalData->OutEpNumber = 2; + break; + case 1: + pHalData->OutEpQueueSel = TX_SELE_HQ; + pHalData->OutEpNumber = 1; + break; + default: + break; + + } + RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __FUNCTION__, pHalData->OutEpQueueSel, pHalData->OutEpNumber); + +} + +static BOOLEAN HalUsbSetQueuePipeMapping8188EUsb( + PADAPTER pAdapter, + u8 NumInPipe, + u8 NumOutPipe +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN result = _FALSE; + + _ConfigNormalChipOutEP_8188E(pAdapter, NumOutPipe); + + /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */ + if (1 == pHalData->OutEpNumber) { + if (1 != NumInPipe) + return result; + } + + /* All config other than above support one Bulk IN and one Interrupt IN. */ + /* if(2 != NumInPipe){ */ + /* return result; */ + /* } */ + + result = Hal_MappingOutPipe(pAdapter, NumOutPipe); + + return result; + +} + +void rtl8188eu_interface_configure(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct registry_priv *registry_par = &padapter->registrypriv; + + if (IS_HIGH_SPEED_USB(padapter)) { + pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */ + } else { + pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */ + } + +#ifdef CONFIG_USB_TX_AGGREGATION + pHalData->UsbTxAggMode = 1; + pHalData->UsbTxAggDescNum = 0x1; /* only 4 bits */ +#endif + +#ifdef CONFIG_USB_RX_AGGREGATION + pHalData->rxagg_mode = registry_par->usb_rxagg_mode; + + if ((pHalData->rxagg_mode != RX_AGG_DMA) && (pHalData->rxagg_mode != RX_AGG_USB)) + pHalData->rxagg_mode = RX_AGG_DMA; + + if (pHalData->rxagg_mode == RX_AGG_DMA) { + pHalData->rxagg_dma_size = 48; /* uint: 128b, 0x0A = 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize */ + pHalData->rxagg_dma_timeout = 0x4; /* 6, absolute time = 34ms/(2^6) */ + } else if (pHalData->rxagg_mode == RX_AGG_USB) { + pHalData->rxagg_usb_size = 16; /* unit: 512b */ + pHalData->rxagg_usb_timeout = 0x6; + } +#endif + + HalUsbSetQueuePipeMapping8188EUsb(padapter, + pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); + +} + +static u32 _InitPowerOn_8188EU(_adapter *padapter) +{ + u16 value16; + /* HW Power on sequence */ + u8 bMacPwrCtrlOn = _FALSE; + + + rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (bMacPwrCtrlOn == _TRUE) + return _SUCCESS; + + if (!HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_PWR_ON_FLOW)) { + RTW_ERR("%s: run power on flow fail\n", __func__); + return _FAIL; + } + + /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ + /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ + rtw_write16(padapter, REG_CR, 0x00); /* suggseted by zhouzhou, by page, 20111230 */ + + + /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ + value16 = rtw_read16(padapter, REG_CR); + value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN + | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); + /* for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */ + + rtw_write16(padapter, REG_CR, value16); + + bMacPwrCtrlOn = _TRUE; + rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + + return _SUCCESS; + +} + +#ifdef CONFIG_BT_COEXIST +static void _InitBTCoexist(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); + u8 u1Tmp; + + if (pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) { + + /* #if MP_DRIVER != 1 */ + if (padapter->registrypriv.mp_mode == 0) { + if (pbtpriv->BT_Ant_isolation) { + rtw_write8(padapter, REG_GPIO_MUXCFG, 0xa0); + RTW_INFO("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0); + } + } + /* #endif */ + + u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0; + u1Tmp = u1Tmp | + ((pbtpriv->BT_Ant_isolation == 1) ? 0 : BIT1) | + ((pbtpriv->BT_Service == BT_SCO) ? 0 : BIT2); + rtw_write8(padapter, 0x4fd, u1Tmp); + RTW_INFO("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp); + + + rtw_write32(padapter, REG_BT_COEX_TABLE + 4, 0xaaaa9aaa); + RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 4, 0xaaaa9aaa); + + rtw_write32(padapter, REG_BT_COEX_TABLE + 8, 0xffbd0040); + RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 8, 0xffbd0040); + + rtw_write32(padapter, REG_BT_COEX_TABLE + 0xc, 0x40000010); + RTW_INFO("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE + 0xc, 0x40000010); + + /* Config to 1T1R */ + u1Tmp = rtw_read8(padapter, rOFDM0_TRxPathEnable); + u1Tmp &= ~(BIT1); + rtw_write8(padapter, rOFDM0_TRxPathEnable, u1Tmp); + RTW_INFO("BT write 0xC04 = 0x%x\n", u1Tmp); + + u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); + u1Tmp &= ~(BIT1); + rtw_write8(padapter, rOFDM1_TRxPathEnable, u1Tmp); + RTW_INFO("BT write 0xD04 = 0x%x\n", u1Tmp); + + } +} +#endif + + + +/* --------------------------------------------------------------- + * + * MAC init functions + * + * --------------------------------------------------------------- */ + +/* Shall USB interface init this? */ +static void +_InitInterrupt( + PADAPTER Adapter +) +{ + u32 imr, imr_ex; + u8 usb_opt; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + struct dvobj_priv *pdev = adapter_to_dvobj(Adapter); +#endif + + /* HISR write one to clear */ + rtw_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF); + /* HIMR - */ + imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E ; + rtw_write32(Adapter, REG_HIMR_88E, imr); + pHalData->IntrMask[0] = imr; + + imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E; + rtw_write32(Adapter, REG_HIMRE_88E, imr_ex); + pHalData->IntrMask[1] = imr_ex; + +#ifdef CONFIG_SUPPORT_USB_INT + /* REG_USB_SPECIAL_OPTION - BIT(4) */ + /* 0; Use interrupt endpoint to upload interrupt pkt */ + /* 1; Use bulk endpoint to upload interrupt pkt, */ + usb_opt = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); + + if ((IS_FULL_SPEED_USB(Adapter)) +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + || (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] == 0x05) +#endif + ) + usb_opt = usb_opt & (~INT_BULK_SEL); + else + usb_opt = usb_opt | (INT_BULK_SEL); + + rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt); + +#endif/* CONFIG_SUPPORT_USB_INT */ + +} + + +static void +_InitQueueReservedPage( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u32 outEPNum = (u32)pHalData->OutEpNumber; + u32 numHQ = 0; + u32 numLQ = 0; + u32 numNQ = 0; + u32 numPubQ = 0x00; + u32 value32; + u8 value8; + BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; + + if (bWiFiConfig || pregistrypriv->qos_opt_enable) { + if (pHalData->OutEpQueueSel & TX_SELE_HQ) + numHQ = WMM_NORMAL_PAGE_NUM_HPQ_88E; + + if (pHalData->OutEpQueueSel & TX_SELE_LQ) + numLQ = WMM_NORMAL_PAGE_NUM_LPQ_88E; + + /* NOTE: This step shall be proceed before writting REG_RQPN. */ + if (pHalData->OutEpQueueSel & TX_SELE_NQ) + numNQ = WMM_NORMAL_PAGE_NUM_NPQ_88E; + } else { + if (pHalData->OutEpQueueSel & TX_SELE_HQ) + numHQ = NORMAL_PAGE_NUM_HPQ_88E; + + if (pHalData->OutEpQueueSel & TX_SELE_LQ) + numLQ = NORMAL_PAGE_NUM_LPQ_88E; + + /* NOTE: This step shall be proceed before writting REG_RQPN. */ + if (pHalData->OutEpQueueSel & TX_SELE_NQ) + numNQ = NORMAL_PAGE_NUM_NPQ_88E; + } + + value8 = (u8)_NPQ(numNQ); + rtw_write8(Adapter, REG_RQPN_NPQ, value8); + + numPubQ = TX_TOTAL_PAGE_NUMBER_88E(Adapter) - numHQ - numLQ - numNQ; + + /* TX DMA */ + value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; + rtw_write32(Adapter, REG_RQPN, value32); +} + +static void +_InitTxBufferBoundary( + PADAPTER Adapter, + u8 txpktbuf_bndy +) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + /* HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); */ + + /* u16 txdmactrl; */ + + rtw_write8(Adapter, REG_BCNQ_BDNY, txpktbuf_bndy); + rtw_write8(Adapter, REG_MGQ_BDNY, txpktbuf_bndy); + rtw_write8(Adapter, REG_WMAC_LBK_BF_HD, txpktbuf_bndy); + rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); + rtw_write8(Adapter, REG_TDECTRL + 1, txpktbuf_bndy); + +} + +static void +_InitPageBoundary( + PADAPTER Adapter +) +{ + /* RX Page Boundary */ + u16 rxff_bndy = 0; + + rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter) - 1; + +#if 0 + + /* RX Page Boundary */ + /* srand(static_cast(time(NULL)) ); */ + if (bSupportRemoteWakeUp) { + Offset = MAX_RX_DMA_BUFFER_SIZE_88E(Adapter) + MAX_TX_REPORT_BUFFER_SIZE - MAX_SUPPORT_WOL_PATTERN_NUM(Adapter) * WKFMCAM_SIZE; + Offset = Offset / 128; /* RX page size = 128 byte */ + rxff_bndy = (Offset * 128) - 1; + } else + +#endif + rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); +} + + +static void +_InitNormalChipRegPriority( + PADAPTER Adapter, + u16 beQ, + u16 bkQ, + u16 viQ, + u16 voQ, + u16 mgtQ, + u16 hiQ +) +{ + u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); + + value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | + _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | + _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ); + + rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); +} + +static void +_InitNormalChipOneOutEpPriority( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u16 value = 0; + switch (pHalData->OutEpQueueSel) { + case TX_SELE_HQ: + value = QUEUE_HIGH; + break; + case TX_SELE_LQ: + value = QUEUE_LOW; + break; + case TX_SELE_NQ: + value = QUEUE_NORMAL; + break; + default: + /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ + break; + } + + _InitNormalChipRegPriority(Adapter, + value, + value, + value, + value, + value, + value + ); + +} + +static void +_InitNormalChipTwoOutEpPriority( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; + + + u16 valueHi = 0; + u16 valueLow = 0; + + switch (pHalData->OutEpQueueSel) { + case (TX_SELE_HQ | TX_SELE_LQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_NQ | TX_SELE_LQ): + valueHi = QUEUE_NORMAL; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_HQ | TX_SELE_NQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + default: + /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ + break; + } + + if (!pregistrypriv->wifi_spec) { + beQ = valueLow; + bkQ = valueLow; + viQ = valueHi; + voQ = valueHi; + mgtQ = valueHi; + hiQ = valueHi; + } else { /* for WMM ,CONFIG_OUT_EP_WIFI_MODE */ + beQ = valueLow; + bkQ = valueHi; + viQ = valueHi; + voQ = valueLow; + mgtQ = valueHi; + hiQ = valueHi; + } + + _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); + +} + +static void +_InitNormalChipThreeOutEpPriority( + PADAPTER Adapter +) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; + + if (!pregistrypriv->wifi_spec) { /* typical setting */ + beQ = QUEUE_LOW; + bkQ = QUEUE_LOW; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } else { /* for WMM */ + beQ = QUEUE_LOW; + bkQ = QUEUE_NORMAL; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); +} + +static void +_InitQueuePriority( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch (pHalData->OutEpNumber) { + case 1: + _InitNormalChipOneOutEpPriority(Adapter); + break; + case 2: + _InitNormalChipTwoOutEpPriority(Adapter); + break; + case 3: + _InitNormalChipThreeOutEpPriority(Adapter); + break; + default: + /* RT_ASSERT(FALSE,("Shall not reach here!\n")); */ + break; + } + + +} + + + +static void +_InitHardwareDropIncorrectBulkOut( + PADAPTER Adapter +) +{ +#ifdef ENABLE_USB_DROP_INCORRECT_OUT + u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); + value32 |= DROP_DATA_EN; + rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); +#endif +} + +static void +_InitNetworkType( + PADAPTER Adapter +) +{ + u32 value32; + + value32 = rtw_read32(Adapter, REG_CR); + /* TODO: use the other function to set network type */ + value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); + + rtw_write32(Adapter, REG_CR, value32); + /* RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); */ +} + + +static void +_InitDriverInfoSize( + PADAPTER Adapter, + u8 drvInfoSize +) +{ + rtw_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize); +} + +static void +_InitWMACSetting( + PADAPTER Adapter +) +{ + /* u32 value32; */ + /* u16 value16; */ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 rcr; + + /* rcr = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; */ + /* rcr = */ + /* RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; */ + /* don't turn on AAP, it will allow all packets to driver */ + rcr = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF | RCR_APPFCS; + +#if (1 == RTL8188E_RX_PACKET_INCLUDE_CRC) + rcr |= ACRC32; +#endif + rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&rcr); + + /* Accept all multicast address */ + rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); + rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); + + + /* Accept all data frames */ + /* value16 = 0xFFFF; */ + /* rtw_write16(Adapter, REG_RXFLTMAP2, value16); */ + + /* 2010.09.08 hpfan */ + /* Since ADF is removed from RCR, ps-poll will not be indicate to driver, */ + /* RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. */ + /* value16 = 0x400; */ + /* rtw_write16(Adapter, REG_RXFLTMAP1, value16); */ + + /* Accept all management frames */ + /* value16 = 0xFFFF; */ + /* rtw_write16(Adapter, REG_RXFLTMAP0, value16); */ + + /* enable RX_SHIFT bits */ + /* rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); */ + +} + +static void +_InitAdaptiveCtrl( + PADAPTER Adapter +) +{ + u16 value16; + u32 value32; + + /* Response Rate Set */ + value32 = rtw_read32(Adapter, REG_RRSR); + value32 &= ~RATE_BITMAP_ALL; + value32 |= RATE_RRSR_CCK_ONLY_1M; + + rtw_phydm_set_rrsr(Adapter, value32, TRUE); + + + /* CF-END Threshold */ + /* m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); */ + + /* SIFS (used in NAV) */ + value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); + rtw_write16(Adapter, REG_SPEC_SIFS, value16); + + /* Retry Limit */ + value16 = BIT_LRL(RL_VAL_STA) | BIT_SRL(RL_VAL_STA); + rtw_write16(Adapter, REG_RETRY_LIMIT, value16); + +} + +static void +_InitEDCA( + PADAPTER Adapter +) +{ + /* Set Spec SIFS (used in NAV) */ + rtw_write16(Adapter, REG_SPEC_SIFS, 0x100a); + rtw_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a); + + /* Set SIFS for CCK */ + rtw_write16(Adapter, REG_SIFS_CTX, 0x100a); + + /* Set SIFS for OFDM */ + rtw_write16(Adapter, REG_SIFS_TRX, 0x100a); + + /* TXOP */ + rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); + rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); + rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); + rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); +} + + +static void +_InitBeaconMaxError( + PADAPTER Adapter, + BOOLEAN InfraMode +) +{ + +} + + +#ifdef CONFIG_RTW_LED +static void _InitHWLed(PADAPTER Adapter) +{ + struct led_priv *pledpriv = adapter_to_led(Adapter); + + if (pledpriv->LedStrategy != HW_LED) + return; + + /* HW led control + * to do .... + * must consider cases of antenna diversity/ commbo card/solo card/mini card */ + +} +#endif /* CONFIG_RTW_LED */ + +static void +_InitRDGSetting( + PADAPTER Adapter +) +{ + rtw_write8(Adapter, REG_RD_CTRL, 0xFF); + rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); + rtw_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); +} + +static void +_InitRetryFunction( + PADAPTER Adapter +) +{ + u8 value8; + + value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); + value8 |= EN_AMPDU_RTY_NEW; + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); + + /* Set ACK timeout */ + rtw_write8(Adapter, REG_ACKTO, 0x40); +} + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingTxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static void +usb_AggSettingTxUpdate( + PADAPTER Adapter +) +{ +#ifdef CONFIG_USB_TX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */ + u32 value32; + + if (Adapter->registrypriv.wifi_spec) + pHalData->UsbTxAggMode = _FALSE; + + if (pHalData->UsbTxAggMode) { + value32 = rtw_read32(Adapter, REG_TDECTRL); + value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); + value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); + + rtw_write32(Adapter, REG_TDECTRL, value32); + } + +#endif +} /* usb_AggSettingTxUpdate */ + + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingRxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static void +usb_AggSettingRxUpdate( + PADAPTER Adapter +) +{ +#ifdef CONFIG_USB_RX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */ + u8 valueDMA; + u8 valueUSB; + + valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); + valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); + + switch (pHalData->rxagg_mode) { + case RX_AGG_DMA: + valueDMA |= RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; + case RX_AGG_USB: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case RX_AGG_MIX: + valueDMA |= RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN; + break; + case RX_AGG_DISABLE: + default: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN; + break; + } + + rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); + rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); + + switch (pHalData->rxagg_mode) { + case RX_AGG_DMA: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->rxagg_dma_size); + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_dma_timeout); + break; + case RX_AGG_USB: + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->rxagg_usb_size); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->rxagg_usb_timeout); + break; + case RX_AGG_MIX: + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->rxagg_dma_size); + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_dma_timeout & 0x1F); /* 0x280[12:8] */ + + rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->rxagg_usb_size); + rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->rxagg_usb_timeout); + + break; + case RX_AGG_DISABLE: + default: + /* TODO: */ + break; + } + + switch (PBP_128) { + case PBP_128: + pHalData->HwRxPageSize = 128; + break; + case PBP_64: + pHalData->HwRxPageSize = 64; + break; + case PBP_256: + pHalData->HwRxPageSize = 256; + break; + case PBP_512: + pHalData->HwRxPageSize = 512; + break; + case PBP_1024: + pHalData->HwRxPageSize = 1024; + break; + default: + /* RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); */ + break; + } +#endif +} /* usb_AggSettingRxUpdate */ + +static void +InitUsbAggregationSetting( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + /* Tx aggregation setting */ + usb_AggSettingTxUpdate(Adapter); + + /* Rx aggregation setting */ + usb_AggSettingRxUpdate(Adapter); + + /* 201/12/10 MH Add for USB agg mode dynamic switch. */ + pHalData->UsbRxHighSpeedMode = _FALSE; +} +void +HalRxAggr8188EUsb( + PADAPTER Adapter, + BOOLEAN Value +) +{ +#if 0/* USB_RX_AGGREGATION_92C */ + + PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; + u8 valueDMATimeout; + u8 valueDMAPageCount; + u8 valueUSBTimeout; + u8 valueUSBBlockCount; + + /* selection to prevent bad TP. */ + if (IS_WIRELESS_MODE_B(Adapter) || IS_WIRELESS_MODE_G(Adapter) || IS_WIRELESS_MODE_A(Adapter) || pMgntInfo->bWiFiConfg) { + /* 2010.04.27 hpfan */ + /* Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer */ + /* Timeout value is calculated by 34 / (2^n) */ + valueDMATimeout = 0x0f; + valueDMAPageCount = 0x01; + valueUSBTimeout = 0x0f; + valueUSBBlockCount = 0x01; + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTO, (u8 *)&valueDMATimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_PGTH, (u8 *)&valueDMAPageCount); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&valueUSBTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&valueUSBBlockCount); + } else { + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTO, (u8 *)&pMgntInfo->RegRxAggBlockTimeout); + rtw_hal_set_hwreg(Adapter, HW_VAR_RX_AGGR_USBTH, (u8 *)&pMgntInfo->RegRxAggBlockCount); + } + +#endif +} + +/*----------------------------------------------------------------------------- + * Function: USB_AggModeSwitch() + * + * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase + * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we + * need to monitor the influence of FTP/network share. + * For TX mode, we are still ubder investigation. + * + * Input: PADAPTER + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +void +USB_AggModeSwitch( + PADAPTER Adapter +) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + /* pHalData->UsbRxHighSpeedMode = FALSE; */ + /* How to measure the RX speed? We assume that when traffic is more than */ + if (pMgntInfo->bRegAggDMEnable == FALSE) { + return; /* Inf not support. */ + } + + + if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == TRUE && + pHalData->UsbRxHighSpeedMode == FALSE) { + pHalData->UsbRxHighSpeedMode = TRUE; + } else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == FALSE && + pHalData->UsbRxHighSpeedMode == TRUE) { + pHalData->UsbRxHighSpeedMode = FALSE; + } else + return; + + +#if USB_RX_AGGREGATION_92C + if (pHalData->UsbRxHighSpeedMode == TRUE) { + /* 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. */ + /* USB mode */ +#if (RT_PLATFORM == PLATFORM_LINUX) + if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) { + pHalData->RxAggBlockCount = 16; + pHalData->RxAggBlockTimeout = 7; + } else +#endif + { + pHalData->RxAggBlockCount = 40; + pHalData->RxAggBlockTimeout = 5; + } + /* Mix mode */ + pHalData->RxAggPageCount = 72; + pHalData->RxAggPageTimeout = 6; + } else { + /* USB mode */ + pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount; + pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout; + /* Mix mode */ + pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount; + pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout; + } + + if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT) + pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT; +#if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) /* do not support WINXP to prevent usbehci.sys BSOD */ + if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) { + /* */ + /* 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test */ + /* with the aggregation dynamic change!! We need to disable the function to prevent it is broken */ + /* in usbehci.sys. */ + /* */ + usb_AggSettingRxUpdate_8188E(Adapter); + + /* 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse */ + /* there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the */ + /* issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may */ + /* BSOD. */ + } +#endif + +#endif +#endif +} /* USB_AggModeSwitch */ + +static void +_InitRFType( + PADAPTER Adapter +) +{ + struct registry_priv *pregpriv = &Adapter->registrypriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; + return; +#endif + pHalData->rf_chip = RF_6052; + + /* TODO: Consider that EEPROM set 92CU to 1T1R later. */ + /* Force to overwrite setting according to chip version. Ignore EEPROM setting. */ + /* pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; */ + RTW_INFO("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); + +} + +/* Set CCK and OFDM Block "ON" */ +static void _BBTurnOnBlock( + PADAPTER Adapter +) +{ +#if (DISABLE_BB_RF) + return; +#endif + + phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); + phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); +} + +static void +_InitAntenna_Selection(PADAPTER Adapter) +{ +#ifdef CONFIG_ANTENNA_DIVERSITY + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if (pHalData->AntDivCfg == 0) + return; + RTW_INFO("==> %s ....\n", __FUNCTION__); + + rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0) | BIT23); + phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); +#endif +} + +/* + * 2010/08/26 MH Add for selective suspend mode check. + * If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and + * slim card. + * */ +#if 0 +static void +HalDetectSelectiveSuspendMode( + PADAPTER Adapter +) +{ + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + + /* If support HW radio detect, we need to enable WOL ability, otherwise, we */ + /* can not use FW to notify host the power state switch. */ + + EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); + + RTW_INFO("HalDetectSelectiveSuspendMode(): SS "); + if (tmpvalue & BIT1) + RTW_INFO("Enable\n"); + else { + RTW_INFO("Disable\n"); + pdvobjpriv->RegUsbSS = _FALSE; + } + + /* 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. */ + if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) { + /* PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); */ + + /* if (!pMgntInfo->bRegDongleSS) */ + /* { */ + pdvobjpriv->RegUsbSS = _FALSE; + /* } */ + } +} /* HalDetectSelectiveSuspendMode */ +#endif + +rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter) +{ + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(pAdapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + u8 val8; + rt_rf_power_state rfpowerstate = rf_off; + + if (pwrctl->bHWPowerdown) { + val8 = rtw_read8(pAdapter, REG_HSISR); + RTW_INFO("pwrdown, 0x5c(BIT7)=%02x\n", val8); + rfpowerstate = (val8 & BIT7) ? rf_off : rf_on; + } else { /* rf on/off */ + rtw_write8(pAdapter, REG_MAC_PINMUX_CFG, rtw_read8(pAdapter, REG_MAC_PINMUX_CFG) & ~(BIT3)); + val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); + RTW_INFO("GPIO_IN=%02x\n", val8); + rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; + } + return rfpowerstate; +} /* HalDetectPwrDownMode */ + +void _ps_open_RF(_adapter *padapter); + +u32 rtl8188eu_hal_init(PADAPTER Adapter) +{ + u8 value8 = 0; + u16 value16; + u8 txpktbuf_bndy; + u32 status = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + + rt_rf_power_state eRfPowerStateToSet; +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); +#endif + + systime init_start_time = rtw_get_current_time(); + + +#ifdef DBG_HAL_INIT_PROFILING + + enum HAL_INIT_STAGES { + HAL_INIT_STAGES_BEGIN = 0, + HAL_INIT_STAGES_INIT_PW_ON, + HAL_INIT_STAGES_MISC01, + HAL_INIT_STAGES_DOWNLOAD_FW, + HAL_INIT_STAGES_MAC, + HAL_INIT_STAGES_BB, + HAL_INIT_STAGES_RF, + HAL_INIT_STAGES_EFUSE_PATCH, + HAL_INIT_STAGES_INIT_LLTT, + + HAL_INIT_STAGES_MISC02, + HAL_INIT_STAGES_TURN_ON_BLOCK, + HAL_INIT_STAGES_INIT_SECURITY, + HAL_INIT_STAGES_MISC11, + HAL_INIT_STAGES_INIT_HAL_DM, + /* HAL_INIT_STAGES_RF_PS, */ + HAL_INIT_STAGES_IQK, + HAL_INIT_STAGES_PW_TRACK, + HAL_INIT_STAGES_LCK, + /* HAL_INIT_STAGES_MISC21, */ + /* HAL_INIT_STAGES_INIT_PABIAS, */ +#ifdef CONFIG_BT_COEXIST + HAL_INIT_STAGES_BT_COEXIST, +#endif + /* HAL_INIT_STAGES_ANTENNA_SEL, */ + /* HAL_INIT_STAGES_MISC31, */ + HAL_INIT_STAGES_END, + HAL_INIT_STAGES_NUM + }; + + char *hal_init_stages_str[] = { + "HAL_INIT_STAGES_BEGIN", + "HAL_INIT_STAGES_INIT_PW_ON", + "HAL_INIT_STAGES_MISC01", + "HAL_INIT_STAGES_DOWNLOAD_FW", + "HAL_INIT_STAGES_MAC", + "HAL_INIT_STAGES_BB", + "HAL_INIT_STAGES_RF", + "HAL_INIT_STAGES_EFUSE_PATCH", + "HAL_INIT_STAGES_INIT_LLTT", + "HAL_INIT_STAGES_MISC02", + "HAL_INIT_STAGES_TURN_ON_BLOCK", + "HAL_INIT_STAGES_INIT_SECURITY", + "HAL_INIT_STAGES_MISC11", + "HAL_INIT_STAGES_INIT_HAL_DM", + /* "HAL_INIT_STAGES_RF_PS", */ + "HAL_INIT_STAGES_IQK", + "HAL_INIT_STAGES_PW_TRACK", + "HAL_INIT_STAGES_LCK", + /* "HAL_INIT_STAGES_MISC21", */ +#ifdef CONFIG_BT_COEXIST + "HAL_INIT_STAGES_BT_COEXIST", +#endif + /* "HAL_INIT_STAGES_ANTENNA_SEL", */ + /* "HAL_INIT_STAGES_MISC31", */ + "HAL_INIT_STAGES_END", + }; + + int hal_init_profiling_i; + systime hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; /* used to record the time of each stage's starting point */ + + for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM; hal_init_profiling_i++) + hal_init_stages_timestamp[hal_init_profiling_i] = 0; + +#define HAL_INIT_PROFILE_TAG(stage) do { hal_init_stages_timestamp[(stage)] = rtw_get_current_time(); } while (0) +#else +#define HAL_INIT_PROFILE_TAG(stage) do {} while (0) +#endif /* DBG_HAL_INIT_PROFILING */ + + + + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN); + + if (pwrctrlpriv->bkeepfwalive) { + _ps_open_RF(Adapter); + + if (pHalData->bIQKInitialized) { + /* PHY_IQCalibrate(padapter, _TRUE); */ + /*phy_iq_calibrate_8188e(Adapter, _TRUE);*/ + halrf_iqk_trigger(&pHalData->odmpriv, _TRUE); + } else { + /* PHY_IQCalibrate(padapter, _FALSE); */ + /*phy_iq_calibrate_8188e(Adapter, _FALSE);*/ + halrf_iqk_trigger(&pHalData->odmpriv, _FALSE); + pHalData->bIQKInitialized = _TRUE; + } + + /* dm_check_txpowertracking(padapter); + * phy_lc_calibrate(padapter); */ + odm_txpowertracking_check(&pHalData->odmpriv); + /*phy_lc_calibrate_8188e(&pHalData->odmpriv);*/ + halrf_lck_trigger(&pHalData->odmpriv); + goto exit; + } + + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); + status = rtw_hal_power_on(Adapter); + if (status == _FAIL) { + goto exit; + } + + /* Set RF type for BB/RF configuration */ + _InitRFType(Adapter);/* ->_ReadRFType() */ + + /* Save target channel */ + /* Current Channel will be updated again later. */ + pHalData->current_channel = 6;/* default set to 6 */ + if (pwrctrlpriv->reg_rfoff == _TRUE) + pwrctrlpriv->rf_pwrstate = rf_off; + + /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */ + /* HW GPIO pin. Before PHY_RFConfig8192C. */ + /* HalDetectPwrDownMode(Adapter); */ + /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */ + /*HalDetectSelectiveSuspendMode(Adapter);*/ + + if (!pregistrypriv->wifi_spec) + txpktbuf_bndy = TX_PAGE_BOUNDARY_88E(Adapter); + else { + /* for WMM */ + txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E(Adapter); + } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); + _InitQueueReservedPage(Adapter); + _InitQueuePriority(Adapter); + _InitPageBoundary(Adapter); + _InitTransferPageSize(Adapter); + +#ifdef CONFIG_IOL_IOREG_CFG + _InitTxBufferBoundary(Adapter, 0); +#endif + + + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); + if (Adapter->registrypriv.mp_mode == 0) { + status = rtl8188e_FirmwareDownload(Adapter, _FALSE); + if (status != _SUCCESS) { + RTW_INFO("%s: Download Firmware failed!!\n", __FUNCTION__); + pHalData->bFWReady = _FALSE; + pHalData->fw_ractrl = _FALSE; + return status; + } else { + pHalData->bFWReady = _TRUE; +#ifdef CONFIG_SFW_SUPPORTED + pHalData->fw_ractrl = IS_VENDOR_8188E_I_CUT_SERIES(Adapter) ? _TRUE : _FALSE; +#else + pHalData->fw_ractrl = _FALSE; +#endif + } + } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); +#if (HAL_MAC_ENABLE == 1) + status = PHY_MACConfig8188E(Adapter); + if (status == _FAIL) { + RTW_INFO(" ### Failed to init MAC ......\n "); + goto exit; + } +#endif + + /* */ + /* d. Initialize BB related configurations. */ + /* */ + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); +#if (HAL_BB_ENABLE == 1) + status = PHY_BBConfig8188E(Adapter); + if (status == _FAIL) { + RTW_INFO(" ### Failed to init BB ......\n "); + goto exit; + } +#endif + + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); +#if (HAL_RF_ENABLE == 1) + status = PHY_RFConfig8188E(Adapter); + if (status == _FAIL) { + RTW_INFO(" ### Failed to init RF ......\n "); + goto exit; + } +#endif + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH); +#if defined(CONFIG_IOL_EFUSE_PATCH) + status = rtl8188e_iol_efuse_patch(Adapter); + if (status == _FAIL) { + RTW_INFO("%s rtl8188e_iol_efuse_patch failed\n", __FUNCTION__); + goto exit; + } +#endif + + _InitTxBufferBoundary(Adapter, txpktbuf_bndy); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); + status = InitLLTTable(Adapter, txpktbuf_bndy); + if (status == _FAIL) { + goto exit; + } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); + /* Get Rx PHY status in order to report RSSI and others. */ + _InitDriverInfoSize(Adapter, DRVINFO_SZ); + + _InitInterrupt(Adapter); + _InitNetworkType(Adapter);/* set msr */ + _InitWMACSetting(Adapter); + _InitAdaptiveCtrl(Adapter); + _InitEDCA(Adapter); + _InitRetryFunction(Adapter); + InitUsbAggregationSetting(Adapter); + InitBeaconParameters_8188e(Adapter); + _InitBeaconMaxError(Adapter, _TRUE); + + /* */ + /* Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */ + /* Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. */ + /* */ + /* Enable MACTXEN/MACRXEN block */ + value16 = rtw_read16(Adapter, REG_CR); + value16 |= (MACTXEN | MACRXEN); + rtw_write8(Adapter, REG_CR, value16); + + _InitHardwareDropIncorrectBulkOut(Adapter); + + + if (pHalData->bRDGEnable) + _InitRDGSetting(Adapter); + + /* Enable TX Report & Tx Report Timer */ + value8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); + rtw_write8(Adapter, REG_TX_RPT_CTRL, (value8 | BIT1 | BIT0)); + +#if (RATE_ADAPTIVE_SUPPORT == 1) + if (!pHalData->fw_ractrl) { + /* Set MAX RPT MACID */ + rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 2); /* FOR sta mode ,0: bc/mc ,1:AP */ + /* Tx RPT Timer. Unit: 32us */ + rtw_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0); + } else +#endif + { + /* disable tx rpt */ + rtw_write8(Adapter, REG_TX_RPT_CTRL + 1, 0); /* FOR sta mode ,0: bc/mc ,1:AP */ + } +#if 0 + if (pHTInfo->bRDGEnable) + _InitRDGSetting_8188E(Adapter); +#endif + +#ifdef CONFIG_TX_EARLY_MODE + if (pHalData->bEarlyModeEnable) { + + value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL); +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + value8 = value8 | 0x1f; +#else + value8 = value8 | 0xf; +#endif + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8); + + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x80); + + value8 = rtw_read8(Adapter, REG_TCR + 1); + value8 = value8 | 0x40; + rtw_write8(Adapter, REG_TCR + 1, value8); + } else +#endif + { + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); + } + + rtw_write32(Adapter, REG_MACID_NO_LINK_0, 0xFFFFFFFF); + rtw_write32(Adapter, REG_MACID_NO_LINK_1, 0xFFFFFFFF); + + +#ifdef CONFIG_RTW_LED + _InitHWLed(Adapter); +#endif /* CONFIG_RTW_LED */ + + + /* */ + /* Joseph Note: Keep RfRegChnlVal for later use. */ + /* */ + pHalData->RfRegChnlVal[0] = phy_query_rf_reg(Adapter, 0, RF_CHNLBW, bRFRegOffsetMask); + pHalData->RfRegChnlVal[1] = phy_query_rf_reg(Adapter, 1, RF_CHNLBW, bRFRegOffsetMask); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); + _BBTurnOnBlock(Adapter); + /* NicIFSetMacAddress(padapter, padapter->PermanentAddress); */ + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); + invalidate_cam_all(Adapter); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); + /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ + rtw_hal_set_tx_power_level(Adapter, pHalData->current_channel); + + _InitAntenna_Selection(Adapter); + + /* */ + /* Disable BAR, suggested by Scott */ + /* 2010.04.09 add by hpfan */ + /* */ + rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); + + /* HW SEQ CTRL */ + /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */ + rtw_write8(Adapter, REG_HWSEQ_CTRL, 0xFF); + + PHY_SetRFEReg_8188E(Adapter); + + if (pregistrypriv->wifi_spec) { + rtw_write16(Adapter, REG_FAST_EDCA_CTRL , 0); + /* Nav limit , suggest by scott */ + rtw_write8(Adapter, REG_NAV_UPPER, 0x0); + } + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); + rtl8188e_InitHalDm(Adapter); + +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) { + Adapter->mppriv.channel = pHalData->current_channel; + MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); + } else +#endif /* #if (MP_DRIVER == 1) */ + { + /* */ + /* 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */ + /* and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */ + /* call init_adapter. May cause some problem?? */ + /* */ + /* Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */ + /* in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState */ + /* is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */ + /* Added by tynli. 2010.03.30. */ + pwrctrlpriv->rf_pwrstate = rf_on; + + if (!pHalData->fw_ractrl) { + /* enable Tx report. */ + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL + 1, 0x0F); + /* tynli_test_tx_report. */ + rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); + } + + /* Suggested by SD1 pisa. Added by tynli. 2011.10.21. */ + rtw_write8(Adapter, REG_EARLY_MODE_CONTROL + 3, 0x01); /* Pretx_en, for WEP/TKIP SEC */ + + + /* enable tx DMA to drop the redundate data of packet */ + rtw_write16(Adapter, REG_TXDMA_OFFSET_CHK, (rtw_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN)); + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + /* 2010/08/26 MH Merge from 8192CE. */ + if (pwrctrlpriv->rf_pwrstate == rf_on) { + + pHalData->neediqk_24g = _TRUE; + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + + odm_txpowertracking_check(&pHalData->odmpriv); + + + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + /*phy_lc_calibrate_8188e(&pHalData->odmpriv);*/ + halrf_lck_trigger(&pHalData->odmpriv); + } + } + + rtw_write8(Adapter, REG_USB_HRPWM, 0); + +#ifdef CONFIG_XMIT_ACK + /* ack for xmit mgmt frames. */ + rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12)); +#endif /* CONFIG_XMIT_ACK */ + +exit: + HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); + + RTW_INFO("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); + +#ifdef DBG_HAL_INIT_PROFILING + hal_init_stages_timestamp[HAL_INIT_STAGES_END] = rtw_get_current_time(); + + for (hal_init_profiling_i = 0; hal_init_profiling_i < HAL_INIT_STAGES_NUM - 1; hal_init_profiling_i++) { + RTW_INFO("DBG_HAL_INIT_PROFILING: %35s, %u, %5u, %5u\n" + , hal_init_stages_str[hal_init_profiling_i] + , hal_init_stages_timestamp[hal_init_profiling_i] + , (hal_init_stages_timestamp[hal_init_profiling_i + 1] - hal_init_stages_timestamp[hal_init_profiling_i]) + , rtw_get_time_interval_ms(hal_init_stages_timestamp[hal_init_profiling_i], hal_init_stages_timestamp[hal_init_profiling_i + 1]) + ); + } +#endif + + + + return status; +} + +void _ps_open_RF(_adapter *padapter) +{ + /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */ + /* phy_SsPwrSwitch92CU(padapter, rf_on, 1); */ +} + +void _ps_close_RF(_adapter *padapter) +{ + /* here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified */ + /* phy_SsPwrSwitch92CU(padapter, rf_off, 1); */ +} + + +void +hal_poweroff_8188eu( + PADAPTER Adapter +) +{ + + u8 val8; + u16 val16; + u32 val32; + u8 bMacPwrCtrlOn = _FALSE; + + rtw_hal_get_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); + if (bMacPwrCtrlOn == _FALSE) + return ; + + + /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */ + val8 = rtw_read8(Adapter, REG_TX_RPT_CTRL); + rtw_write8(Adapter, REG_TX_RPT_CTRL, val8 & (~BIT1)); + + /* stop rx */ + rtw_write8(Adapter, REG_CR, 0x0); + + /* Run LPS WL RFOFF flow */ + HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_LPS_ENTER_FLOW); + + + /* 2. 0x1F[7:0] = 0 */ /* turn off RF */ + /* rtw_write8(Adapter, REG_RF_CTRL, 0x00); */ + + val8 = rtw_read8(Adapter, REG_MCUFWDL); + if ((val8 & RAM_DL_SEL) && GET_HAL_DATA(Adapter)->bFWReady) { /* 8051 RAM code */ + /* _8051Reset88E(padapter); */ + + /* Reset MCU 0x2[10]=0. */ + val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN + 1); + val8 &= ~BIT(2); /* 0x2[10], FEN_CPUEN */ + rtw_write8(Adapter, REG_SYS_FUNC_EN + 1, val8); + } + + /* val8 = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); */ + /* val8 &= ~BIT(2); */ /* 0x2[10], FEN_CPUEN */ + /* rtw_write8(Adapter, REG_SYS_FUNC_EN+1, val8); */ + + /* MCUFWDL 0x80[1:0]=0 */ + /* reset MCU ready status */ + rtw_write8(Adapter, REG_MCUFWDL, 0); + + /* YJ,add,111212 */ + /* Disable 32k */ + val8 = rtw_read8(Adapter, REG_32K_CTRL); + rtw_write8(Adapter, REG_32K_CTRL, val8 & (~BIT0)); + + /* Card disable power action flow */ + HalPwrSeqCmdParsing(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8188E_NIC_DISABLE_FLOW); + + /* Reset MCU IO Wrapper */ + val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1); + rtw_write8(Adapter, REG_RSV_CTRL + 1, (val8 & (~BIT3))); + val8 = rtw_read8(Adapter, REG_RSV_CTRL + 1); + rtw_write8(Adapter, REG_RSV_CTRL + 1, val8 | BIT3); + +#if 0 + /* 7. RSV_CTRL 0x1C[7:0] = 0x0E */ /* lock ISO/CLK/Power control register */ + rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); +#endif +#if 1 + /* YJ,test add, 111207. For Power Consumption. */ + val8 = rtw_read8(Adapter, GPIO_IN); + rtw_write8(Adapter, GPIO_OUT, val8); + rtw_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */ + + val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL); + /* rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4)|val8); */ + rtw_write8(Adapter, REG_GPIO_IO_SEL, (val8 << 4)); + val8 = rtw_read8(Adapter, REG_GPIO_IO_SEL + 1); + rtw_write8(Adapter, REG_GPIO_IO_SEL + 1, val8 | 0x0F); /* Reg0x43 */ + rtw_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */ +#endif + + GET_HAL_DATA(Adapter)->bFWReady = _FALSE; + + bMacPwrCtrlOn = _FALSE; + rtw_hal_set_hwreg(Adapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn); +} +static void rtl8188eu_hw_power_down(_adapter *padapter) +{ + /* 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */ + /* Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */ + + /* Enable register area 0x0-0xc. */ + rtw_write8(padapter, REG_RSV_CTRL, 0x0); + rtw_write16(padapter, REG_APS_FSMCO, 0x8812); +} + +u32 rtl8188eu_hal_deinit(PADAPTER Adapter) +{ + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + RTW_INFO("==> %s\n", __FUNCTION__); + +#ifdef CONFIG_SUPPORT_USB_INT + rtw_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E); + rtw_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E); +#endif + +#ifdef SUPPORT_HW_RFOFF_DETECTED + RTW_INFO("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive); + if (pwrctl->bkeepfwalive) { + _ps_close_RF(Adapter); + if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) + rtl8188eu_hw_power_down(Adapter); + } else +#endif + { + if (rtw_is_hw_init_completed(Adapter)) { + rtw_hal_power_off(Adapter); + + if ((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) + rtl8188eu_hw_power_down(Adapter); + + } + } + return _SUCCESS; +} + + +unsigned int rtl8188eu_inirp_init(PADAPTER Adapter) +{ + struct registry_priv *regsty = adapter_to_regsty(Adapter); + u8 i; + struct recv_buf *precvbuf; + uint status; + struct dvobj_priv *pdev = adapter_to_dvobj(Adapter); + struct intf_hdl *pintfhdl = &Adapter->iopriv.intf; + struct recv_priv *precvpriv = &(Adapter->recvpriv); + u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); +#endif + + + _read_port = pintfhdl->io_ops._read_port; + + status = _SUCCESS; + + + precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; + + /* issue Rx irp to receive data */ + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + for (i = 0; i < regsty->recvbuf_nr; i++) { + if (_read_port(pintfhdl, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE) { + status = _FAIL; + goto exit; + } + + precvbuf++; + precvpriv->free_recv_buf_queue_cnt--; + } + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) { + status = _FAIL; + RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]); + goto exit; + } + _read_interrupt = pintfhdl->io_ops._read_interrupt; + if (_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE) { + status = _FAIL; + } +#endif + +exit: + + + + return status; + +} + +unsigned int rtl8188eu_inirp_deinit(PADAPTER Adapter) +{ + + rtw_read_port_cancel(Adapter); + + + return _SUCCESS; +} + + + +/* ------------------------------------------------------------------------- + * + * EEPROM Power index mapping + * + * ------------------------------------------------------------------------- */ + + +/* ------------------------------------------------------------------- + * + * EEPROM/EFUSE Content Parsing + * + * ------------------------------------------------------------------- */ + +static void +_ReadLEDSetting( + PADAPTER Adapter, + u8 *PROMContent, + BOOLEAN AutoloadFail +) +{ +#ifdef CONFIG_RTW_LED + struct led_priv *pledpriv = adapter_to_led(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#ifdef CONFIG_RTW_SW_LED + pledpriv->bRegUseLed = _TRUE; + + switch (pHalData->CustomerID) { + default: + pledpriv->LedStrategy = SW_LED_MODE1; + break; + } + pHalData->bLedOpenDrain = _TRUE;/* Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. */ +#else /* HW LED */ + pledpriv->LedStrategy = HW_LED; +#endif /* CONFIG_RTW_SW_LED */ +#endif +} + +static void +Hal_EfuseParsePIDVID_8188EU( + PADAPTER pAdapter, + u8 *hwinfo, + BOOLEAN AutoLoadFail +) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (!AutoLoadFail) { + /* VID, PID */ + pHalData->EEPROMVID = ReadLE2Byte(&hwinfo[EEPROM_VID_88EU]); + pHalData->EEPROMPID = ReadLE2Byte(&hwinfo[EEPROM_PID_88EU]); + + /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ + pHalData->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CustomID_88E]; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } else { + pHalData->EEPROMVID = EEPROM_Default_VID; + pHalData->EEPROMPID = EEPROM_Default_PID; + + /* Customer ID, 0x00 and 0xff are reserved for Realtek. */ + pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + + } + + RTW_INFO("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID); + RTW_INFO("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID); +} + +static void +Hal_CustomizeByCustomerID_8188EU( + PADAPTER padapter +) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + /* For customized behavior. */ + if ((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629)) /* HP Lite-On for RTL8188CUS Slim Combo. */ + pHalData->CustomerID = RT_CID_819x_HP; + + /* Decide CustomerID according to VID/DID or EEPROM */ + switch (pHalData->EEPROMCustomerID) { + case EEPROM_CID_DEFAULT: + if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pHalData->CustomerID = RT_CID_DLINK; + else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pHalData->CustomerID = RT_CID_DLINK; + else if ((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pHalData->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: + padapter->bInHctTest = TRUE; + + pMgntInfo->bSupportTurboMode = FALSE; + pMgntInfo->bAutoTurboBy8186 = FALSE; + + pMgntInfo->PowerSaveControl.bInactivePs = FALSE; + pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; + pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = FALSE; + pMgntInfo->keepAliveLevel = 0; + + padapter->bUnloadDriverwhenS3S4 = FALSE; + break; + default: + pHalData->CustomerID = RT_CID_DEFAULT; + break; + + } + + + hal_CustomizedBehavior_8723U(padapter); +#endif +} + +static void +readAdapterInfo_8188EU( + PADAPTER padapter +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + /* parse the eeprom/efuse content */ + Hal_EfuseParseIDCode88E(padapter, pHalData->efuse_eeprom_data); + Hal_EfuseParsePIDVID_8188EU(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_config_macaddr(padapter, pHalData->bautoload_fail_flag); + Hal_ReadPowerSavingMode88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadTxPowerInfo88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_EfuseParseEEPROMVer88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + rtl8188e_EfuseParseChnlPlan(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_EfuseParseXtal_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_EfuseParseCustomerID88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadAntennaDiversity88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_EfuseParseBoardType88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadThermalMeter_88E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadPAType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadAmplifierType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + Hal_ReadRFEType_8188E(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +#ifdef CONFIG_RF_POWER_TRIM + Hal_ReadRFGainOffset(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +#endif /*CONFIG_RF_POWER_TRIM*/ + + /* */ + /* The following part initialize some vars by PG info. */ + /* */ + +#if defined(CONFIG_WOWLAN) && defined(CONFIG_SDIO_HCI) + Hal_DetectWoWMode(padapter); +#endif /* CONFIG_WOWLAN && CONFIG_SDIO_HCI */ + + Hal_CustomizeByCustomerID_8188EU(padapter); + + _ReadLEDSetting(padapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +} + +static void _ReadPROMContent( + PADAPTER Adapter +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 eeValue; + + /* check system boot selection */ + eeValue = rtw_read8(Adapter, REG_9346CR); + pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; + + + RTW_INFO("Boot from %s, Autoload %s !\n", (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pHalData->bautoload_fail_flag ? "Fail" : "OK")); + + /* pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; */ + + Hal_InitPGData88E(Adapter); + readAdapterInfo_8188EU(Adapter); +} + + + +static void +_ReadRFType( + PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; +#else + pHalData->rf_chip = RF_6052; +#endif +} + +static u8 ReadAdapterInfo8188EU(PADAPTER Adapter) +{ + /* Read EEPROM size before call any EEPROM function */ + Adapter->EepromAddressSize = GetEEPROMSize8188E(Adapter); + + _ReadRFType(Adapter);/* rf_chip->_InitRFType() */ + _ReadPROMContent(Adapter); + + return _SUCCESS; +} + +void UpdateInterruptMask8188EU(PADAPTER padapter, u8 bHIMR0 , u32 AddMSR, u32 RemoveMSR) +{ + HAL_DATA_TYPE *pHalData; + + u32 *himr; + pHalData = GET_HAL_DATA(padapter); + + if (bHIMR0) + himr = &(pHalData->IntrMask[0]); + else + himr = &(pHalData->IntrMask[1]); + + if (AddMSR) + *himr |= AddMSR; + + if (RemoveMSR) + *himr &= (~RemoveMSR); + + if (bHIMR0) + rtw_write32(padapter, REG_HIMR_88E, *himr); + else + rtw_write32(padapter, REG_HIMRE_88E, *himr); + +} + +u8 SetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 ret = _SUCCESS; + + + switch (variable) { + + case HW_VAR_RXDMA_AGG_PG_TH: +#ifdef CONFIG_USB_RX_AGGREGATION + { + /* threshold == 1 , Disable Rx-agg when AP is B/G mode or wifi_spec=1 to prevent bad TP. */ + + u8 threshold = *((u8 *)val); + + if (threshold == 0) { + switch (pHalData->rxagg_mode) { + case RX_AGG_DMA: + threshold = (pHalData->rxagg_dma_size & 0x0F); + break; + case RX_AGG_USB: + case RX_AGG_MIX: + threshold = (pHalData->rxagg_usb_size & 0x0F); + break; + case RX_AGG_DISABLE: + default: + break; + } + } + + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); + +#ifdef CONFIG_80211N_HT + { + /* 2014-07-24 Fix WIFI Logo -5.2.4/5.2.9 - DT3 low TP issue */ + /* Adjust RxAggrTimeout to close to zero disable RxAggr for RxAgg-USB mode, suggested by designer */ + /* Timeout value is calculated by 34 / (2^n) */ + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + struct ht_priv *phtpriv = &pmlmepriv->htpriv; + + if (pHalData->rxagg_mode == RX_AGG_USB) { + /* BG mode || (wifi_spec=1 && BG mode Testbed) */ + if ((threshold == 1) && (phtpriv->ht_option == _FALSE)) + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, 0); + else + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 1, pHalData->rxagg_usb_timeout); + } + } +#endif/* CONFIG_80211N_HT */ + } +#endif/* CONFIG_USB_RX_AGGREGATION */ + break; + case HW_VAR_SET_RPWM: +#ifdef CONFIG_LPS_LCLK + { + u8 ps_state = *((u8 *)val); + /* rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. */ + /* BIT0 value - 1: 32k, 0:40MHz. */ + /* BIT6 value - 1: report cpwm value after success set, 0:do not report. */ + /* BIT7 value - Toggle bit change. */ + /* modify by Thomas. 2012/4/2. */ + ps_state = ps_state & 0xC1; + /* RTW_INFO("##### Change RPWM value to = %x for switch clk #####\n",ps_state); */ + rtw_write8(Adapter, REG_USB_HRPWM, ps_state); + } +#endif + break; + default: + ret = SetHwReg8188E(Adapter, variable, val); + break; + } + + return ret; +} + +void GetHwReg8188EU(PADAPTER Adapter, u8 variable, u8 *val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch (variable) { + default: + GetHwReg8188E(Adapter, variable, val); + break; + } + +} + +/* + * Description: + * Query setting of specified variable. + * */ +u8 +GetHalDefVar8188EUsb( + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch (eVariable) { + case HW_VAR_MAX_RX_AMPDU_FACTOR: + *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K; + break; + + case HAL_DEF_TX_LDPC: + case HAL_DEF_RX_LDPC: + *((u8 *)pValue) = _FALSE; + break; + case HAL_DEF_RX_STBC: + *((u8 *)pValue) = 1; + break; + default: + bResult = GetHalDefVar8188E(Adapter, eVariable, pValue); + break; + } + + return bResult; +} + + + + +/* + * Description: + * Change default setting of specified variable. + * */ +u8 +SetHalDefVar8188EUsb( + PADAPTER Adapter, + HAL_DEF_VARIABLE eVariable, + void *pValue +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch (eVariable) { + default: + bResult = SetHalDefVar(Adapter, eVariable, pValue); + break; + } + + return bResult; +} +#if 0 +u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +#ifdef CONFIG_BT_COEXIST + struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); +#endif + unsigned int BrateCfg = 0; + +#ifdef CONFIG_BT_COEXIST + if ((pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4)) + BrateCfg = mask & 0x151; + + else +#endif + { + /* if(pHalData->version_id != VERSION_TEST_CHIP_88C) */ + BrateCfg = mask & 0x15F; + /* else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning */ + /* BrateCfg = mask & 0x159; */ + } + + BrateCfg |= 0x01; /* default enable 1M ACK rate */ + + return BrateCfg; +} +#endif + +static void rtl8188eu_init_default_value(_adapter *padapter) +{ + PHAL_DATA_TYPE pHalData; + struct pwrctrl_priv *pwrctrlpriv; + u8 i; + + pHalData = GET_HAL_DATA(padapter); + pwrctrlpriv = adapter_to_pwrctl(padapter); + + + /* init default value */ + pHalData->fw_ractrl = _FALSE; + if (!pwrctrlpriv->bkeepfwalive) + pHalData->LastHMEBoxNum = 0; + + /* init dm default value */ + pHalData->bIQKInitialized = _FALSE; + + pHalData->EfuseHal.fakeEfuseBank = 0; + pHalData->EfuseHal.fakeEfuseUsedBytes = 0; + _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); + _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); + _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); +} + +static u8 rtl8188eu_ps_func(PADAPTER Adapter, HAL_INTF_PS_FUNC efunc_id, u8 *val) +{ + u8 bResult = _TRUE; + switch (efunc_id) { + + default: + break; + } + return bResult; +} + +void rtl8188eu_set_hal_ops(_adapter *padapter) +{ + struct hal_ops *pHalFunc = &padapter->hal_func; + + + pHalFunc->hal_power_on = _InitPowerOn_8188EU; + pHalFunc->hal_power_off = hal_poweroff_8188eu; + + pHalFunc->hal_init = &rtl8188eu_hal_init; + pHalFunc->hal_deinit = &rtl8188eu_hal_deinit; + + pHalFunc->inirp_init = &rtl8188eu_inirp_init; + pHalFunc->inirp_deinit = &rtl8188eu_inirp_deinit; + + pHalFunc->init_xmit_priv = &rtl8188eu_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8188eu_free_xmit_priv; + + pHalFunc->init_recv_priv = &rtl8188eu_init_recv_priv; + pHalFunc->free_recv_priv = &rtl8188eu_free_recv_priv; +#ifdef CONFIG_RTW_SW_LED + pHalFunc->InitSwLeds = &rtl8188eu_InitSwLeds; + pHalFunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds; +#endif/* CONFIG_RTW_SW_LED */ + + pHalFunc->init_default_value = &rtl8188eu_init_default_value; + pHalFunc->intf_chip_configure = &rtl8188eu_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8188EU; + pHalFunc->set_hw_reg_handler = &SetHwReg8188EU; + pHalFunc->GetHwRegHandler = &GetHwReg8188EU; + pHalFunc->get_hal_def_var_handler = &GetHalDefVar8188EUsb; + pHalFunc->SetHalDefVarHandler = &SetHalDefVar8188EUsb; + + pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188E; + + pHalFunc->hal_xmit = &rtl8188eu_hal_xmit; + pHalFunc->mgnt_xmit = &rtl8188eu_mgnt_xmit; +#ifdef CONFIG_RTW_MGMT_QUEUE + pHalFunc->hal_mgmt_xmitframe_enqueue = &rtl8188eu_hal_mgmt_xmitframe_enqueue; +#endif + pHalFunc->hal_xmitframe_enqueue = &rtl8188eu_hal_xmitframe_enqueue; + + +#ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = &rtl8188eu_hostap_mgnt_xmit_entry; +#endif + pHalFunc->interface_ps_func = &rtl8188eu_ps_func; + +#ifdef CONFIG_XMIT_THREAD_MODE + pHalFunc->xmit_thread_handler = &rtl8188eu_xmit_buf_handler; +#endif +#ifdef CONFIG_SUPPORT_USB_INT + pHalFunc->interrupt_handler = interrupt_handler_8188eu; +#endif + rtl8188e_set_hal_ops(pHalFunc); + +} diff --git a/hal/rtl8188e/usb/usb_ops_linux.c b/hal/rtl8188e/usb/usb_ops_linux.c new file mode 100644 index 0000000..26df100 --- /dev/null +++ b/hal/rtl8188e/usb/usb_ops_linux.c @@ -0,0 +1,275 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HCI_OPS_OS_C_ + +#include +#include + + +#ifdef CONFIG_SUPPORT_USB_INT +void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct reportpwrstate_parm pwr_rpt; + + if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) { + RTW_INFO("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len); + return ; + } + + /* HISR */ + _rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); + _rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); + +#if 0 /* DBG */ + { + u32 hisr = 0 , hisr_ex = 0; + _rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4); + hisr = le32_to_cpu(hisr); + + _rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4); + hisr_ex = le32_to_cpu(hisr_ex); + + if ((hisr != 0) || (hisr_ex != 0)) + RTW_INFO("===> %s hisr:0x%08x ,hisr_ex:0x%08x\n", __FUNCTION__, hisr, hisr_ex); + } +#endif + + +#ifdef CONFIG_LPS_LCLK + if (pHalData->IntArray[0] & IMR_CPWM_88E) { + _rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1); + /* _rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */ + + /* 88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. */ + pwr_rpt.state |= PS_STATE_S2; + _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); + } +#endif/* CONFIG_LPS_LCLK */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) /*only for BCN_0*/ +#endif +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + if (pHalData->IntArray[0] & (IMR_TBDER_88E | IMR_TBDOK_88E)) +#endif + { +#if 0 + if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) + RTW_INFO("%s: HISR_BCNERLY_INT\n", __func__); + if (pHalData->IntArray[0] & IMR_TBDOK_88E) + RTW_INFO("%s: HISR_TXBCNOK\n", __func__); + if (pHalData->IntArray[0] & IMR_TBDER_88E) + RTW_INFO("%s: HISR_TXBCNERR\n", __func__); +#endif + + rtw_mi_set_tx_beacon_cmd(padapter); + } +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + + + + +#ifdef DBG_CONFIG_ERROR_DETECT_INT + if (pHalData->IntArray[1] & IMR_TXERR_88E) + RTW_INFO("===> %s Tx Error Flag Interrupt Status\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_RXERR_88E) + RTW_INFO("===> %s Rx Error Flag INT Status\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_TXFOVW_88E) + RTW_INFO("===> %s Transmit FIFO Overflow\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_RXFOVW_88E) + RTW_INFO("===> %s Receive FIFO Overflow\n", __FUNCTION__); +#endif/* DBG_CONFIG_ERROR_DETECT_INT */ + + +#ifdef CONFIG_FW_C2H_REG + /* C2H Event */ + if (pbuf[0] != 0) + usb_c2h_hisr_hdl(padapter, pbuf); +#endif +} +#endif + + +int recvbuf2recvframe(PADAPTER padapter, void *ptr) +{ + u8 *pbuf; + u16 pkt_cnt; + u32 pkt_offset; + s32 transfer_len; + struct recv_stat *prxstat; + union recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + _pkt *pskb; + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + pskb = NULL; + transfer_len = (s32)((struct recv_buf *)ptr)->transfer_len; + pbuf = ((struct recv_buf *)ptr)->pbuf; +#else + pskb = (_pkt *)ptr; + transfer_len = (s32)pskb->len; + pbuf = pskb->data; +#endif + prxstat = (struct recv_stat *)pbuf; + pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff; + +#if 0 /* temp remove when disable usb rx aggregation */ + if ((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len < RXDESC_SIZE) || (pkt_len <= 0)) + return _FAIL; +#endif + + do { + + prxstat = (struct recv_stat *)pbuf; + + precvframe = rtw_alloc_recvframe(pfree_recv_queue); + if (precvframe == NULL) { + RTW_INFO("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); + goto _exit_recvbuf2recvframe; + } + + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */ + precvframe->u.hdr.len = 0; + + rtl8188e_query_rx_desc_status(precvframe, prxstat); + + pattrib = &precvframe->u.hdr.attrib; + + if ((padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err))) { + RTW_INFO("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; + + if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) { + RTW_INFO("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + +#ifdef CONFIG_RX_PACKET_APPEND_FCS + if (check_fwstate(&padapter->mlmepriv, WIFI_MONITOR_STATE) == _FALSE) + if ((pattrib->pkt_rpt_type == NORMAL_RX) && rtw_hal_rcr_check(padapter, RCR_APPFCS)) + pattrib->pkt_len -= IEEE80211_FCS_LEN; +#endif + + if (rtw_os_alloc_recvframe(padapter, precvframe, + (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), pskb) == _FAIL) { + rtw_free_recvframe(precvframe, pfree_recv_queue); + + goto _exit_recvbuf2recvframe; + } + + recvframe_put(precvframe, pattrib->pkt_len); + /* recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); */ + + if (pattrib->pkt_rpt_type == NORMAL_RX) /* Normal rx packet */ + pre_recv_entry(precvframe, pattrib->physt ? (pbuf + RXDESC_OFFSET) : NULL); + else { /* pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP */ + + /* enqueue recvframe to txrtp queue */ + if (pattrib->pkt_rpt_type == TX_REPORT1) { + /* RTW_INFO("rx CCX\n"); */ + /* CCX-TXRPT ack for xmit mgmt frames. */ + handle_txrpt_ccx_88e(padapter, precvframe->u.hdr.rx_data); + } else if (pattrib->pkt_rpt_type == TX_REPORT2) { + /* RTW_INFO("recv TX RPT\n"); */ + odm_ra_tx_rpt2_handle_8188e( + &pHalData->odmpriv, + precvframe->u.hdr.rx_data, + pattrib->pkt_len, + pattrib->MacIDValidEntry[0], + pattrib->MacIDValidEntry[1] + ); + + } else if (pattrib->pkt_rpt_type == HIS_REPORT) { + /* RTW_INFO("%s , rx USB HISR\n",__FUNCTION__); */ +#ifdef CONFIG_SUPPORT_USB_INT + interrupt_handler_8188eu(padapter, pattrib->pkt_len, precvframe->u.hdr.rx_data); +#endif + } + rtw_free_recvframe(precvframe, pfree_recv_queue); + + } + +#ifdef CONFIG_USB_RX_AGGREGATION + switch (pHalData->rxagg_mode) { + case RX_AGG_DMA: + case RX_AGG_MIX: + pkt_offset = (u16)_RND128(pkt_offset); + break; + case RX_AGG_USB: + pkt_offset = (u16)_RND4(pkt_offset); + break; + case RX_AGG_DISABLE: + default: + break; + } +#endif + pkt_cnt--; + transfer_len -= pkt_offset; + pbuf += pkt_offset; + precvframe = NULL; + + if (transfer_len > 0 && pkt_cnt == 0) + pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff; + + } while ((transfer_len > 0) && (pkt_cnt > 0)); + +_exit_recvbuf2recvframe: + + return _SUCCESS; +} + + + +void rtl8188eu_xmit_tasklet(void *priv) +{ + int ret = _FALSE; + _adapter *padapter = (_adapter *)priv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + + while (1) { + if (RTW_CANNOT_TX(padapter)) { + RTW_INFO("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); + break; + } + + if (rtw_xmit_ac_blocked(padapter) == _TRUE) + break; + + ret = rtl8188eu_xmitframe_complete(padapter, pxmitpriv, NULL); + + if (ret == _FALSE) + break; + } + +} + +void rtl8188eu_set_hw_type(struct dvobj_priv *pdvobj) +{ + pdvobj->HardwareType = HARDWARE_TYPE_RTL8188EU; + RTW_INFO("CHIP TYPE: RTL8188E\n"); +}