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ivanovborislav 2021-11-21 14:41:10 +02:00 committed by GitHub
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1674
hal/phydm/halrf/halphyrf_ap.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALPHYRF_H__
#define __HALPHYRF_H__
#include "halrf/halrf_powertracking_ap.h"
#include "halrf/halrf_kfree.h"
#if (RTL8814A_SUPPORT == 1)
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#endif
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#if (RTL8195B_SUPPORT == 1)
// #include "halrf/rtl8195b/halrf.h"
#include "halrf/rtl8195b/halrf_iqk_8195b.h"
#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
#include "halrf/rtl8195b/halrf_dpk_8195b.h"
#endif
#if (RTL8198F_SUPPORT == 1)
#include "halrf/rtl8198f/halrf_iqk_8198f.h"
#include "halrf/rtl8198f/halrf_dpk_8198f.h"
#endif
#if (RTL8812F_SUPPORT == 1)
#include "halrf/rtl8812f/halrf_iqk_8812f.h"
#include "halrf/rtl8812f/halrf_dpk_8812f.h"
#include "halrf/rtl8812f/halrf_tssi_8812f.h"
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
#endif
#if (RTL8197G_SUPPORT == 1)
#include "halrf/rtl8197g/halrf_iqk_8197g.h"
#include "halrf/rtl8197g/halrf_dpk_8197g.h"
#include "halrf/rtl8197g/halrf_tssi_8197g.h"
#endif
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_tssi_dck)(void *, u8);
/* refine by YuChen for 8814A */
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_all_swing_ex)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_all_swing get_delta_all_swing_table;
func_all_swing_ex get_delta_all_swing_table_ex;
};
void
odm_clear_txpowertracking_state(
void *dm_void
);
void
configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
);
void
odm_txpowertracking_callback_thermal_meter(
void *dm_void
);
#if (RTL8192E_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_92e(
void *dm_void
);
#endif
#if (RTL8814A_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series2(
void *dm_void
);
#elif ODM_IC_11AC_SERIES_SUPPORT
void
odm_txpowertracking_callback_thermal_meter_jaguar_series(
void *dm_void
);
#elif (RTL8197F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series3(
void *dm_void
);
#elif (RTL8814B_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
void
odm_txpowertracking_callback_thermal_meter_jaguar_series4(
void *dm_void
);
#endif
#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M)
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
void *dm_void
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void phydm_rf_init(void *dm_void);
void phydm_rf_watchdog(void *dm_void);
#endif /*#ifndef __HALPHYRF_H__*/

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hal/phydm/halrf/halphyrf_ce.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALPHYRF_H__
#define __HALPHYRF_H__
#include "halrf/halrf_kfree.h"
#if (RTL8814A_SUPPORT == 1)
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#endif
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#if (RTL8195B_SUPPORT == 1)
/* #include "halrf/rtl8195b/halrf.h" */
#include "halrf/rtl8195b/halrf_iqk_8195b.h"
#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
#include "halrf/rtl8195b/halrf_dpk_8195b.h"
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
#endif
#include "halrf/halrf_powertracking_ce.h"
enum spur_cal_method {
PLL_RESET,
AFE_PHASE_SEL
};
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void (*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
typedef void (*func_tssi_dck)(void *, u8);
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
typedef void (*func_set_xtal)(void *);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
func_set_xtal odm_txxtaltrack_set_xtal;
};
void configure_txpower_track(void *dm_void, struct txpwrtrack_cfg *config);
void odm_clear_txpowertracking_state(void *dm_void);
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
void odm_txpowertracking_callback_thermal_meter(void *dm_void);
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
void odm_txpowertracking_callback_thermal_meter(void *dm);
#else
void odm_txpowertracking_callback_thermal_meter(void *adapter);
#endif
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void odm_txpowertracking_new_callback_thermal_meter(void *dm_void);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void odm_reset_iqk_result(void *dm_void);
u8 odm_get_right_chnl_place_for_iqk(u8 chnl);
void phydm_rf_init(void *dm_void);
void phydm_rf_watchdog(void *dm_void);
#endif /*__HALPHYRF_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "mp_precomp.h"
#include "phydm_precomp.h"
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _delta_thermal) \
do {\
for (_offset = 0; _offset < _size; _offset++) { \
if (_delta_thermal < thermal_threshold[_direction][_offset]) { \
if (_offset != 0)\
_offset--;\
break;\
} \
} \
if (_offset >= _size)\
_offset = _size-1;\
} while (0)
void configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if RTL8195B_SUPPORT
if (dm->support_ic_type == ODM_RTL8195B)
configure_txpower_track_8195b(config);
#endif
#if RTL8710C_SUPPORT
if (dm->support_ic_type == ODM_RTL8710C)
configure_txpower_track_8710c(config);
#endif
#if RTL8721D_SUPPORT
if (dm->support_ic_type == ODM_RTL8721D)
configure_txpower_track_8721d(config);
#endif
}
/* **********************************************************************
* <20121113, Kordan> This function should be called when tx_agc changed.
* Otherwise the previous compensation is gone, because we record the
* delta of temperature between two TxPowerTracking watch dogs.
*
* NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
* need to call this function.
* ********************************************************************** */
void
odm_clear_txpowertracking_state(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
u8 p = 0;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->bb_swing_idx_cck = cali_info->default_cck_index;
dm->rf_calibrate_info.CCK_index = 0;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->power_index_offset[p] = 0;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->absolute_ofdm_swing_idx[p] = 0;
cali_info->remnant_ofdm_swing_idx[p] = 0;
cali_info->kfree_offset[p] = 0;
}
cali_info->modify_tx_agc_flag_path_a = false;
cali_info->modify_tx_agc_flag_path_b = false;
cali_info->modify_tx_agc_flag_path_c = false;
cali_info->modify_tx_agc_flag_path_d = false;
cali_info->remnant_cck_swing_idx = 0;
cali_info->thermal_value = rf->eeprom_thermal;
cali_info->modify_tx_agc_value_cck = 0;
cali_info->modify_tx_agc_value_ofdm = 0;
}
void
odm_txpowertracking_callback_thermal_meter(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct dm_iqk_info *iqk_info = &dm->IQK_info;
u8 thermal_value = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
u8 thermal_value_avg_count = 0;
u32 thermal_value_avg = 0, regc80, regcd0, regcd4, regab4;
u8 OFDM_min_index = 0; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
u8 indexforchannel = 0; /* get_right_chnl_place_for_iqk(hal_data->current_channel) */
u8 power_tracking_type = rf->pwt_type;
u8 xtal_offset_eanble = 0;
s8 thermal_value_temp = 0;
u8 xtal_track_efuse = 0;
struct txpwrtrack_cfg c = {0};
/* 4 1. The following TWO tables decide the final index of OFDM/CCK swing table. */
u8 *delta_swing_table_idx_tup_a = NULL;
u8 *delta_swing_table_idx_tdown_a = NULL;
u8 *delta_swing_table_idx_tup_b = NULL;
u8 *delta_swing_table_idx_tdown_b = NULL;
#if (RTL8721D_SUPPORT == 1)
u8 *delta_swing_table_idx_tup_a_cck = NULL;
u8 *delta_swing_table_idx_tdown_a_cck = NULL;
u8 *delta_swing_table_idx_tup_b_cck = NULL;
u8 *delta_swing_table_idx_tdown_b_cck = NULL;
#endif
/*for Xtal Offset by James.Tung*/
s8 *delta_swing_table_xtal_up = NULL;
s8 *delta_swing_table_xtal_down = NULL;
/* 4 2. Initialization ( 7 steps in total ) */
indexforchannel = odm_get_right_chnl_place_for_iqk(*dm->channel);
configure_txpower_track(dm, &c);
#if (RTL8721D_SUPPORT == 1)
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b,
(u8 **)&delta_swing_table_idx_tup_a_cck, (u8 **)&delta_swing_table_idx_tdown_a_cck,
(u8 **)&delta_swing_table_idx_tup_b_cck, (u8 **)&delta_swing_table_idx_tdown_b_cck);
#else
(*c.get_delta_swing_table)(dm, (u8 **)&delta_swing_table_idx_tup_a, (u8 **)&delta_swing_table_idx_tdown_a,
(u8 **)&delta_swing_table_idx_tup_b, (u8 **)&delta_swing_table_idx_tdown_b);
#endif
/*for Xtal Offset*/
odm_efuse_one_byte_read(dm, 0xf7, &xtal_track_efuse, false);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Read efuse 0xf7=0x%x\n", xtal_track_efuse);
xtal_track_efuse = xtal_track_efuse & 0x3;
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
(dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2))
(*c.get_delta_swing_xtal_table)(dm,
(s8 **)&delta_swing_table_xtal_up,
(s8 **)&delta_swing_table_xtal_down);
cali_info->txpowertracking_callback_cnt++; /*cosa add for debug*/
cali_info->is_txpowertracking_init = true;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"===>odm_txpowertracking_callback_thermal_meter\n cali_info->bb_swing_idx_cck_base: %d, cali_info->bb_swing_idx_ofdm_base[A]: %d, cali_info->default_ofdm_index: %d\n",
cali_info->bb_swing_idx_cck_base,
cali_info->bb_swing_idx_ofdm_base[RF_PATH_A],
cali_info->default_ofdm_index);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->txpowertrack_control = %d, hal_data->eeprom_thermal_meter %d\n",
cali_info->txpowertrack_control, rf->eeprom_thermal);
if (dm->support_ic_type == ODM_RTL8721D
|| dm->support_ic_type == ODM_RTL8710C)
thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A,
c.thermal_reg_addr, 0x7e0);
/* 0x42: RF Reg[10:5] 8721D */
else
thermal_value = (u8)odm_get_rf_reg(dm, RF_PATH_A,
c.thermal_reg_addr, 0xfc00);
/* 0x42: RF Reg[15:10] 88E */
thermal_value_temp = thermal_value + phydm_get_thermal_offset(dm);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"thermal_value_temp(%d) = thermal_value(%d) + power_trim_thermal(%d)\n", thermal_value_temp, thermal_value, phydm_get_thermal_offset(dm));
if (thermal_value_temp > 63)
thermal_value = 63;
else if (thermal_value_temp < 0)
thermal_value = 0;
else
thermal_value = thermal_value_temp;
if (!cali_info->txpowertrack_control)
return;
if (rf->eeprom_thermal == 0xff) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "no pg, hal_data->eeprom_thermal_meter = 0x%x\n", rf->eeprom_thermal);
return;
}
#if 0
/*4 3. Initialize ThermalValues of rf_calibrate_info*/
//if (cali_info->is_reloadtxpowerindex)
// RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "reload ofdm index for band switch\n");
#endif
/*4 4. Calculate average thermal meter*/
cali_info->thermal_value_avg[cali_info->thermal_value_avg_index] = thermal_value;
cali_info->thermal_value_avg_index++;
if (cali_info->thermal_value_avg_index == c.average_thermal_num) /*Average times = c.average_thermal_num*/
cali_info->thermal_value_avg_index = 0;
for (i = 0; i < c.average_thermal_num; i++) {
if (cali_info->thermal_value_avg[i]) {
thermal_value_avg += cali_info->thermal_value_avg[i];
thermal_value_avg_count++;
}
}
if (thermal_value_avg_count) { /* Calculate Average thermal_value after average enough times */
thermal_value = (u8)(thermal_value_avg / thermal_value_avg_count);
cali_info->thermal_value_delta = thermal_value - rf->eeprom_thermal;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"AVG Thermal Meter = 0x%X, EFUSE Thermal base = 0x%X\n", thermal_value, rf->eeprom_thermal);
}
/* 4 5. Calculate delta, delta_LCK, delta_IQK. */
/* "delta" here is used to determine whether thermal value changes or not. */
delta = (thermal_value > cali_info->thermal_value) ? (thermal_value - cali_info->thermal_value) : (cali_info->thermal_value - thermal_value);
delta_LCK = (thermal_value > cali_info->thermal_value_lck) ? (thermal_value - cali_info->thermal_value_lck) : (cali_info->thermal_value_lck - thermal_value);
delta_IQK = (thermal_value > cali_info->thermal_value_iqk) ? (thermal_value - cali_info->thermal_value_iqk) : (cali_info->thermal_value_iqk - thermal_value);
/*4 6. If necessary, do LCK.*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK);
/* Wait sacn to do LCK by RF Jenyu*/
if ((!*dm->is_scan_in_process) && !iqk_info->rfk_forbidden &&
(!*dm->is_tdma)) {
/* Delta temperature is equal to or larger than 20 centigrade.*/
if (delta_LCK >= c.threshold_iqk) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_LCK(%d) >= threshold_iqk(%d)\n", delta_LCK, c.threshold_iqk);
cali_info->thermal_value_lck = thermal_value;
/*Use RTLCK, so close power tracking driver LCK*/
(*c.phy_lc_calibrate)(dm);
}
}
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
if (delta > 0 && cali_info->txpowertrack_control) {
/* "delta" here is used to record the absolute value of difference. */
delta = thermal_value > rf->eeprom_thermal ? (thermal_value - rf->eeprom_thermal) : (rf->eeprom_thermal - thermal_value);
if (delta >= TXPWR_TRACK_TABLE_SIZE)
delta = TXPWR_TRACK_TABLE_SIZE - 1;
/*4 7.1 The Final Power index = BaseIndex + power_index_offset*/
if (thermal_value > rf->eeprom_thermal) {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b[%d] = %d\n", delta, delta_swing_table_idx_tup_b[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_b_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_b_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n",
cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] =
delta_swing_table_idx_tup_b
[delta];
cali_info->absolute_ofdm_swing_idx[p] =
delta_swing_table_idx_tup_b
[delta];
/*Record delta swing for mix mode*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a[%d] = %d\n", delta, delta_swing_table_idx_tup_a[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tup_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tup_a_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = delta_swing_table_idx_tup_a_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = delta_swing_table_idx_tup_a[delta];
cali_info->absolute_ofdm_swing_idx[p] =
delta_swing_table_idx_tup_a[delta];
/*Record delta swing*/
/*for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is higher and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
(dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_up[%d] = %d\n", delta, delta_swing_table_xtal_up[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_up[delta];
xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
}
} else {
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
cali_info->delta_power_index_last[p] = cali_info->delta_power_index[p]; /*recording poer index offset*/
switch (p) {
case RF_PATH_B:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b[%d] = %d\n", delta, delta_swing_table_idx_tdown_b[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_b_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_b_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_b[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_b[delta]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_B] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
default:
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a[%d] = %d\n", delta, delta_swing_table_idx_tdown_a[delta]);
#if (RTL8721D_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"delta_swing_table_idx_tdown_a_cck[%d] = %d\n", delta, delta_swing_table_idx_tdown_a_cck[delta]);
cali_info->absolute_cck_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a_cck[delta];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_cck_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_cck_swing_idx[p]);
#endif
cali_info->delta_power_index[p] = -1 * delta_swing_table_idx_tdown_a[delta];
cali_info->absolute_ofdm_swing_idx[p] = -1 * delta_swing_table_idx_tdown_a[delta]; /*Record delta swing for mix mode power tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"******Temp is lower and cali_info->absolute_ofdm_swing_idx[RF_PATH_A] = %d\n", cali_info->absolute_ofdm_swing_idx[p]);
break;
}
}
/* JJ ADD 20161014 */
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
(dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
/*Save xtal_offset from Xtal table*/
cali_info->xtal_offset_last = cali_info->xtal_offset; /*recording last Xtal offset*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"[Xtal] delta_swing_table_xtal_down[%d] = %d\n", delta, delta_swing_table_xtal_down[delta]);
cali_info->xtal_offset = delta_swing_table_xtal_down[delta];
xtal_offset_eanble = (cali_info->xtal_offset_last != cali_info->xtal_offset);
}
}
#if 0
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"\n\n=========================== [path-%d] Calculating power_index_offset===========================\n", p);
if (cali_info->delta_power_index[p] == cali_info->delta_power_index_last[p]) /*If Thermal value changes but lookup table value still the same*/
cali_info->power_index_offset[p] = 0;
else
cali_info->power_index_offset[p] = cali_info->delta_power_index[p] - cali_info->delta_power_index_last[p]; /*Power index diff between 2 times Power Tracking*/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"[path-%d] power_index_offset(%d) = delta_power_index(%d) - delta_power_index_last(%d)\n", p, cali_info->power_index_offset[p], cali_info->delta_power_index[p], cali_info->delta_power_index_last[p]);
cali_info->OFDM_index[p] = cali_info->bb_swing_idx_ofdm_base[p] + cali_info->power_index_offset[p];
cali_info->CCK_index = cali_info->bb_swing_idx_cck_base + cali_info->power_index_offset[p];
cali_info->bb_swing_idx_cck = cali_info->CCK_index;
cali_info->bb_swing_idx_ofdm[p] = cali_info->OFDM_index[p];
/*************Print BB Swing base and index Offset*************/
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"The 'CCK' final index(%d) = BaseIndex(%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_cck, cali_info->bb_swing_idx_cck_base, cali_info->power_index_offset[p]);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"The 'OFDM' final index(%d) = BaseIndex[%d](%d) + power_index_offset(%d)\n", cali_info->bb_swing_idx_ofdm[p], p, cali_info->bb_swing_idx_ofdm_base[p], cali_info->power_index_offset[p]);
/*4 7.1 Handle boundary conditions of index.*/
if (cali_info->OFDM_index[p] > c.swing_table_size_ofdm - 1)
cali_info->OFDM_index[p] = c.swing_table_size_ofdm - 1;
else if (cali_info->OFDM_index[p] <= OFDM_min_index)
cali_info->OFDM_index[p] = OFDM_min_index;
}
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"\n\n========================================================================================================\n");
if (cali_info->CCK_index > c.swing_table_size_cck - 1)
cali_info->CCK_index = c.swing_table_size_cck - 1;
else if (cali_info->CCK_index <= 0)
cali_info->CCK_index = 0;
#endif
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"The thermal meter is unchanged or TxPowerTracking OFF(%d): thermal_value: %d, cali_info->thermal_value: %d\n",
cali_info->txpowertrack_control, thermal_value, cali_info->thermal_value);
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->power_index_offset[p] = 0;
}
#if 0
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"TxPowerTracking: [CCK] Swing Current index: %d, Swing base index: %d\n",
cali_info->CCK_index, cali_info->bb_swing_idx_cck_base); /*Print Swing base & current*/
for (p = RF_PATH_A; p < c.rf_path_count; p++) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"TxPowerTracking: [OFDM] Swing Current index: %d, Swing base index[%d]: %d\n",
cali_info->OFDM_index[p], p, cali_info->bb_swing_idx_ofdm_base[p]);
}
#endif
#if (RTL8721D_SUPPORT == 1)
if (thermal_value != cali_info->thermal_value) {
if (thermal_value > rf->eeprom_thermal)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n",
thermal_value, rf->eeprom_thermal);
else if (thermal_value < rf->eeprom_thermal)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n",
thermal_value, rf->eeprom_thermal);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p,
indexforchannel);
/*Record last time Power Tracking result as base.*/
cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck;
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->bb_swing_idx_ofdm_base[p] =
cali_info->bb_swing_idx_ofdm[p];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->thermal_value = %d thermal_value= %d\n",
cali_info->thermal_value, thermal_value);
/*Record last Power Tracking Thermal value*/
cali_info->thermal_value = thermal_value;
}
#else
if (thermal_value > rf->eeprom_thermal) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
if (dm->support_ic_type == ODM_RTL8188E ||
dm->support_ic_type == ODM_RTL8192E ||
dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 ||
dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B ||
dm->support_ic_type == ODM_RTL8188F ||
dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D ||
dm->support_ic_type == ODM_RTL8821C ||
dm->support_ic_type == ODM_RTL8710B ||
dm->support_ic_type == ODM_RTL8192F ||
dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8710C){
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, 0);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
if (dm->support_ic_type == ODM_RTL8188E ||
dm->support_ic_type == ODM_RTL8192E ||
dm->support_ic_type == ODM_RTL8821 ||
dm->support_ic_type == ODM_RTL8812 ||
dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8814A ||
dm->support_ic_type == ODM_RTL8703B ||
dm->support_ic_type == ODM_RTL8188F ||
dm->support_ic_type == ODM_RTL8822B ||
dm->support_ic_type == ODM_RTL8723D ||
dm->support_ic_type == ODM_RTL8821C ||
dm->support_ic_type == ODM_RTL8710B ||
dm->support_ic_type == ODM_RTL8192F ||
dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8710C) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking MIX_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, MIX_MODE, p, indexforchannel);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter POWER Tracking BBSWING_MODE**********\n");
for (p = RF_PATH_A; p < c.rf_path_count; p++)
(*c.odm_tx_pwr_track_set_pwr)(dm, BBSWING, p, indexforchannel);
}
cali_info->bb_swing_idx_cck_base = cali_info->bb_swing_idx_cck; /*Record last time Power Tracking result as base.*/
for (p = RF_PATH_A; p < c.rf_path_count; p++)
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->bb_swing_idx_ofdm[p];
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->thermal_value = %d thermal_value= %d\n", cali_info->thermal_value, thermal_value);
cali_info->thermal_value = thermal_value; /*Record last Power Tracking Thermal value*/
}
#endif
/* JJ ADD 20161014 */
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"cali_info->xtal_offset_last=%d cali_info->xtal_offset=%d\n",
cali_info->xtal_offset_last, cali_info->xtal_offset);
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"xtal_offset_eanble=%d cali_info->txpowertrack_control=%d rf->eeprom_thermal=%d xtal_track_efuse=%d\n",
xtal_offset_eanble, cali_info->txpowertrack_control, rf->eeprom_thermal, xtal_track_efuse);
if (dm->support_ic_type == ODM_RTL8195B ||
dm->support_ic_type == ODM_RTL8721D ||
(dm->support_ic_type == ODM_RTL8710C && xtal_track_efuse == 0x2)) {
if (xtal_offset_eanble != 0 && cali_info->txpowertrack_control && (rf->eeprom_thermal != 0xff)) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********Enter Xtal Tracking**********\n");
if (thermal_value > rf->eeprom_thermal) {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) higher than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
(*c.odm_txxtaltrack_set_xtal)(dm);
} else {
RF_DBG(dm, DBG_RF_TX_PWR_TRACK,
"Temperature(%d) lower than PG value(%d)\n", thermal_value, rf->eeprom_thermal);
(*c.odm_txxtaltrack_set_xtal)(dm);
}
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "**********End Xtal Tracking**********\n");
}
}
#if (!RTL8721D_SUPPORT)
/* Wait sacn to do IQK by RF Jenyu*/
if ((!*dm->is_scan_in_process) && (!iqk_info->rfk_forbidden) && (dm->is_linked || *dm->mp_mode)) {
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
if (delta_IQK >= c.threshold_iqk) {
cali_info->thermal_value_iqk = thermal_value;
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "delta_IQK(%d) >= threshold_iqk(%d)\n", delta_IQK, c.threshold_iqk);
if (!cali_info->is_iqk_in_progress)
(*c.do_iqk)(dm, delta_IQK, thermal_value, 8);
}
}
#endif
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "<===odm_txpowertracking_callback_thermal_meter\n");
cali_info->tx_powercount = 0;
}
/* 3============================================================
* 3 IQ Calibration
* 3============================================================
*/
void
odm_reset_iqk_result(
void *dm_void
)
{
return;
}
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
u8 odm_get_right_chnl_place_for_iqk(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140,
149, 151, 153, 155, 157, 159, 161, 163, 165};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place - 13;
}
}
return 0;
}
#endif
void
odm_rf_calibrate(struct dm_struct *dm)
{
#if (RTL8721D_SUPPORT == 1)
struct dm_iqk_info *iqk_info = &dm->IQK_info;
if (dm->is_linked && !iqk_info->rfk_forbidden) {
if ((*dm->channel != dm->pre_channel) &&
(!*dm->is_scan_in_process)) {
dm->pre_channel = *dm->channel;
dm->linked_interval = 0;
}
if (dm->linked_interval < 3)
dm->linked_interval++;
if (dm->linked_interval == 2)
halrf_rf_k_connect_trigger(dm, 0, SEGMENT_FREE);
} else {
dm->linked_interval = 0;
}
#endif
}
void phydm_rf_init(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
odm_txpowertracking_init(dm);
odm_clear_txpowertracking_state(dm);
}
void phydm_rf_watchdog(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
odm_txpowertracking_check(dm);
#if (RTL8721D_SUPPORT == 1)
odm_rf_calibrate(dm);
#endif
}

137
hal/phydm/halrf/halphyrf_iot.h Normal file
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@ -0,0 +1,137 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALPHYRF_H__
#define __HALPHYRF_H__
#include "halrf/halrf_kfree.h"
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#if (RTL8195B_SUPPORT == 1)
// #include "halrf/rtl8195b/halrf.h"
#include "halrf/rtl8195b/halrf_iqk_8195b.h"
#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
#include "halrf/rtl8195b/halrf_dpk_8195b.h"
#endif
#if (RTL8710C_SUPPORT == 1)
// #include "halrf/rtl8710c/halrf.h"
#include "halrf/rtl8710c/halrf_iqk_8710c.h"
// #include "halrf/rtl8710c/halrf_txgapk_8710c.h"
// #include "halrf/rtl8710c/halrf_dpk_8710c.h"
#endif
#include "halrf/halrf_powertracking_iot.h"
enum spur_cal_method {
PLL_RESET,
AFE_PHASE_SEL
};
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void (*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void (*func_lck)(void *);
#if (RTL8721D_SUPPORT == 1)
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **,
u8 **, u8 **, u8 **, u8 **);
#else
typedef void (*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
#endif
typedef void (*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing_xtal)(void *, s8 **, s8 **);
typedef void(*func_set_xtal)(void *);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
func_set_xtal odm_txxtaltrack_set_xtal;
};
void
configure_txpower_track(
void *dm_void,
struct txpwrtrack_cfg *config
);
void
odm_clear_txpowertracking_state(
void *dm_void
);
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
void *dm_void
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
void *dm
#else
void *adapter
#endif
);
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
void *dm_void
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void phydm_rf_init(void *dm_void);
void phydm_rf_watchdog(void *dm_void);
#endif /*#ifndef __HALPHYRF_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALPHYRF_H__
#define __HALPHYRF_H__
#if (RTL8814A_SUPPORT == 1)
#include "halrf/rtl8814a/halrf_iqk_8814a.h"
#endif
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_iqk_8822b.h"
#include "../mac/Halmac_type.h"
#endif
#include "halrf/halrf_powertracking_win.h"
#include "halrf/halrf_kfree.h"
#include "halrf/halrf_txgapcal.h"
#if (RTL8821C_SUPPORT == 1)
#include "halrf/rtl8821c/halrf_iqk_8821c.h"
#endif
#if (RTL8195B_SUPPORT == 1)
// #include "halrf/rtl8195b/halrf.h"
#include "halrf/rtl8195b/halrf_iqk_8195b.h"
#include "halrf/rtl8195b/halrf_txgapk_8195b.h"
#include "halrf/rtl8195b/halrf_dpk_8195b.h"
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
#endif
enum spur_cal_method {
PLL_RESET,
AFE_PHASE_SEL
};
enum pwrtrack_method {
BBSWING,
TXAGC,
MIX_MODE,
TSSI_MODE,
MIX_2G_TSSI_5G_MODE,
MIX_5G_TSSI_2G_MODE,
CLEAN_MODE
};
typedef void(*func_set_pwr)(void *, enum pwrtrack_method, u8, u8);
typedef void(*func_iqk)(void *, u8, u8, u8);
typedef void(*func_lck)(void *);
typedef void(*func_tssi_dck)(void *, u8);
typedef void(*func_swing)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void(*func_swing8814only)(void *, u8 **, u8 **, u8 **, u8 **);
typedef void (*func_swing_xtal)(void *, s8 **, s8 **);
typedef void (*func_set_xtal)(void *);
typedef void(*func_all_swing)(void *, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **, u8 **);
struct txpwrtrack_cfg {
u8 swing_table_size_cck;
u8 swing_table_size_ofdm;
u8 threshold_iqk;
u8 threshold_dpk;
u8 average_thermal_num;
u8 rf_path_count;
u32 thermal_reg_addr;
func_set_pwr odm_tx_pwr_track_set_pwr;
func_iqk do_iqk;
func_lck phy_lc_calibrate;
func_tssi_dck do_tssi_dck;
func_swing get_delta_swing_table;
func_swing8814only get_delta_swing_table8814only;
func_swing_xtal get_delta_swing_xtal_table;
func_set_xtal odm_txxtaltrack_set_xtal;
func_all_swing get_delta_all_swing_table;
};
void
configure_txpower_track(
struct dm_struct *dm,
struct txpwrtrack_cfg *config
);
void
odm_clear_txpowertracking_state(
struct dm_struct *dm
);
void
odm_txpowertracking_callback_thermal_meter(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm
#else
void *adapter
#endif
);
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
void
odm_txpowertracking_new_callback_thermal_meter(void *dm_void);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
odm_reset_iqk_result(
struct dm_struct *dm
);
u8
odm_get_right_chnl_place_for_iqk(
u8 chnl
);
void odm_iq_calibrate(struct dm_struct *dm);
void phydm_rf_init(struct dm_struct *dm);
void phydm_rf_watchdog(struct dm_struct *dm);
#endif /*#ifndef __HALPHYRF_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_H__
#define __HALRF_H__
/*@============================================================*/
/*@include files*/
/*@============================================================*/
#include "halrf/halrf_psd.h"
#if (RTL8822B_SUPPORT == 1)
#include "halrf/rtl8822b/halrf_rfk_init_8822b.h"
#endif
#if (RTL8822C_SUPPORT == 1)
#include "halrf/rtl8822c/halrf_rfk_init_8822c.h"
#include "halrf/rtl8822c/halrf_iqk_8822c.h"
#include "halrf/rtl8822c/halrf_tssi_8822c.h"
#include "halrf/rtl8822c/halrf_dpk_8822c.h"
#include "halrf/rtl8822c/halrf_txgapk_8822c.h"
#endif
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#if (RTL8197G_SUPPORT == 1)
#include "halrf/rtl8197g/halrf_rfk_init_8197g.h"
#endif
#if (RTL8198F_SUPPORT == 1)
#include "halrf/rtl8198f/halrf_rfk_init_8198f.h"
#endif
#if (RTL8812F_SUPPORT == 1)
#include "halrf/rtl8812f/halrf_rfk_init_8812f.h"
#endif
#endif
#if (RTL8814B_SUPPORT == 1)
#include "halrf/rtl8814b/halrf_rfk_init_8814b.h"
#include "halrf/rtl8814b/halrf_iqk_8814b.h"
#include "halrf/rtl8814b/halrf_dpk_8814b.h"
#include "halrf/rtl8814b/halrf_txgapk_8814b.h"
#endif
/*@============================================================*/
/*@Definition */
/*@============================================================*/
/*IQK version*/
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
#define IQK_VER_8188E "0x14"
#define IQK_VER_8192E "0x01"
#define IQK_VER_8192F "0x01"
#define IQK_VER_8723B "0x1e"
#define IQK_VER_8812A "0x02"
#define IQK_VER_8821A "0x02"
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
#define IQK_VER_8188E "0x01"
#define IQK_VER_8192E "0x01"
#define IQK_VER_8192F "0x01"
#define IQK_VER_8723B "0x1f"
#define IQK_VER_8812A "0x01"
#define IQK_VER_8821A "0x01"
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#define IQK_VER_8188E "0x01"
#define IQK_VER_8192E "0x01"
#define IQK_VER_8192F "0x01"
#define IQK_VER_8723B "0x1e"
#define IQK_VER_8812A "0x01"
#define IQK_VER_8821A "0x01"
#elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
#define IQK_VER_8188E "0x01"
#define IQK_VER_8192E "0x01"
#define IQK_VER_8192F "0x01"
#define IQK_VER_8723B "0x1e"
#define IQK_VER_8812A "0x01"
#define IQK_VER_8821A "0x01"
#endif
#define IQK_VER_8814A "0x0f"
#define IQK_VER_8188F "0x01"
#define IQK_VER_8197F "0x1d"
#define IQK_VER_8703B "0x05"
#define IQK_VER_8710B "0x01"
#define IQK_VER_8723D "0x02"
#define IQK_VER_8822B "0x32"
#define IQK_VER_8822C "0x14"
#define IQK_VER_8821C "0x23"
#define IQK_VER_8198F "0x0b"
#define IQK_VER_8814B "0x15"
#define IQK_VER_8812F "0x0c"
#define IQK_VER_8710C "0x0a"
#define IQK_VER_8197G "0x03"
#define IQK_VER_8723F "0x00"
/*LCK version*/
#define LCK_VER_8188E "0x02"
#define LCK_VER_8192E "0x02"
#define LCK_VER_8192F "0x01"
#define LCK_VER_8723B "0x02"
#define LCK_VER_8812A "0x01"
#define LCK_VER_8821A "0x01"
#define LCK_VER_8814A "0x01"
#define LCK_VER_8188F "0x01"
#define LCK_VER_8197F "0x01"
#define LCK_VER_8703B "0x01"
#define LCK_VER_8710B "0x01"
#define LCK_VER_8723D "0x01"
#define LCK_VER_8822B "0x02"
#define LCK_VER_8822C "0x00"
#define LCK_VER_8821C "0x03"
#define LCK_VER_8814B "0x02"
#define LCK_VER_8195B "0x02"
#define LCK_VER_8710C "0x02"
#define LCK_VER_8197G "0x01"
#define LCK_VER_8198F "0x01"
/*power tracking version*/
#define PWRTRK_VER_8188E "0x01"
#define PWRTRK_VER_8192E "0x01"
#define PWRTRK_VER_8192F "0x01"
#define PWRTRK_VER_8723B "0x01"
#define PWRTRK_VER_8812A "0x01"
#define PWRTRK_VER_8821A "0x01"
#define PWRTRK_VER_8814A "0x01"
#define PWRTRK_VER_8188F "0x01"
#define PWRTRK_VER_8197F "0x01"
#define PWRTRK_VER_8703B "0x01"
#define PWRTRK_VER_8710B "0x01"
#define PWRTRK_VER_8723D "0x01"
#define PWRTRK_VER_8822B "0x01"
#define PWRTRK_VER_8822C "0x00"
#define PWRTRK_VER_8821C "0x01"
#define PWRTRK_VER_8814B "0x00"
#define PWRTRK_VER_8197G "0x00"
/*DPK version*/
#define DPK_VER_8188E "NONE"
#define DPK_VER_8192E "NONE"
#define DPK_VER_8723B "NONE"
#define DPK_VER_8812A "NONE"
#define DPK_VER_8821A "NONE"
#define DPK_VER_8814A "NONE"
#define DPK_VER_8188F "NONE"
#define DPK_VER_8197F "0x08"
#define DPK_VER_8703B "NONE"
#define DPK_VER_8710B "NONE"
#define DPK_VER_8723D "NONE"
#define DPK_VER_8822B "NONE"
#define DPK_VER_8822C "0x20"
#define DPK_VER_8821C "NONE"
#define DPK_VER_8192F "0x11"
#define DPK_VER_8198F "0x0e"
#define DPK_VER_8814B "0x0f"
#define DPK_VER_8195B "0x0c"
#define DPK_VER_8812F "0x0a"
#define DPK_VER_8197G "0x09"
/*RFK_INIT version*/
#define RFK_INIT_VER_8822B "0x8"
#define RFK_INIT_VER_8822C "0x8"
#define RFK_INIT_VER_8195B "0x1"
#define RFK_INIT_VER_8198F "0x8"
#define RFK_INIT_VER_8814B "0xa"
#define RFK_INIT_VER_8812F "0x4"
#define RFK_INIT_VER_8197G "0x4"
/*DACK version*/
#define DACK_VER_8822C "0xa"
#define DACK_VER_8814B "0x4"
/*TXGAPK version*/
#define TXGAPK_VER_8814B "0x1"
#define TXGAPK_VER_8195B "0x2"
/*Kfree tracking version*/
#define KFREE_VER_8188E \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8192E \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8192F \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8723B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8812A \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8821A \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8814A \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8188F \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8197F \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8703B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8710B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8723D \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8822B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8822C \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8821C \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8814B \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define KFREE_VER_8197G \
(dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
#define TSSI_VER_8812F "0x1"
#define TSSI_VER_8822C "0x1"
#define TSSI_VER_8821C "0x1"
#define TSSI_VER_8814B "0x1"
#define TSSI_VER_8197G "0x1"
#define TSSI_VER_8723F "0x1"
/*PA Bias Calibration version*/
#define PABIASK_VER_8188E \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8192E \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8192F \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8723B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8812A \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8821A \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8814A \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8188F \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8197F \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8703B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8710B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8723D \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8822B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8822C \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8821C \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8814B \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define PABIASK_VER_8197G \
(dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
#define HALRF_IQK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \
(dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? IQK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? IQK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8710C) ? IQK_VER_8710C : \
(dm->support_ic_type == ODM_RTL8723F) ? IQK_VER_8723F : \
(dm->support_ic_type == ODM_RTL8197G) ? IQK_VER_8197G : "unknown"
#define HALRF_LCK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \
(dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? LCK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? LCK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : \
(dm->support_ic_type == ODM_RTL8710C) ? LCK_VER_8710C : "unknown"
#define HALRF_POWRTRACKING_VER \
(dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \
(dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? PWRTRK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8197G) ? PWRTRK_VER_8197G : "unknown"
#define HALRF_DPK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \
(dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \
(dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? DPK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8812F) ? DPK_VER_8812F : \
(dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? DPK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? DPK_VER_8197G : "unknown"
#define HALRF_KFREE_VER \
(dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \
(dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? KFREE_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? KFREE_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? KFREE_VER_8197G : "unknown"
#define HALRF_TSSI_VER \
(dm->support_ic_type == ODM_RTL8812F) ? TSSI_VER_8812F : \
(dm->support_ic_type == ODM_RTL8822C) ? TSSI_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? TSSI_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? TSSI_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? TSSI_VER_8197G : \
(dm->support_ic_type == ODM_RTL8723F) ? TSSI_VER_8723F : "unknown"
#define HALRF_PABIASK_VER \
(dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \
(dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \
(dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \
(dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \
(dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \
(dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \
(dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \
(dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \
(dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \
(dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \
(dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \
(dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \
(dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? PABIASK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : \
(dm->support_ic_type == ODM_RTL8814B) ? PABIASK_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? PABIASK_VER_8197G : "unknown"
#define HALRF_RFK_INIT_VER \
(dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : \
(dm->support_ic_type == ODM_RTL8822C) ? RFK_INIT_VER_8822C : \
(dm->support_ic_type == ODM_RTL8812F) ? RFK_INIT_VER_8812F : \
(dm->support_ic_type == ODM_RTL8198F) ? RFK_INIT_VER_8198F : \
(dm->support_ic_type == ODM_RTL8814B) ? RFK_INIT_VER_8814B : \
(dm->support_ic_type == ODM_RTL8197G) ? RFK_INIT_VER_8197G : "unknown"
#define HALRF_DACK_VER \
(dm->support_ic_type == ODM_RTL8822C) ? DACK_VER_8822C : \
(dm->support_ic_type == ODM_RTL8814B) ? DACK_VER_8814B : "unknown"
#define IQK_THRESHOLD 8
#define DPK_THRESHOLD 4
#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a))
#define SN 100
#define CCK_TSSI_NUM 6
#define OFDM_2G_TSSI_NUM 5
#define OFDM_5G_TSSI_NUM 14
/*@===========================================================*/
/*AGC RX High Power mode*/
/*@===========================================================*/
#define lna_low_gain_1 0x64
#define lna_low_gain_2 0x5A
#define lna_low_gain_3 0x58
/*@============================================================*/
/*@ enumeration */
/*@============================================================*/
enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/
RF00_PWR_TRK = 0, /*Pow_trk, TSSI_trk*/
RF01_IQK = 1, /*LOK, IQK*/
RF02_LCK = 2,
RF03_DPK = 3,
RF04_TXGAPK = 4,
RF05_DACK = 5,
RF06_DPK_TRK = 6,
RF07_2GBAND_SHIFT = 7,
RF08_RXDCK = 8,
RF09_RFK = 9
};
enum halrf_ability {
HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
HAL_RF_IQK = BIT(RF01_IQK),
HAL_RF_LCK = BIT(RF02_LCK),
HAL_RF_DPK = BIT(RF03_DPK),
HAL_RF_TXGAPK = BIT(RF04_TXGAPK),
HAL_RF_DACK = BIT(RF05_DACK),
HAL_RF_DPK_TRACK = BIT(RF06_DPK_TRK),
HAL_2GBAND_SHIFT = BIT(RF07_2GBAND_SHIFT),
HAL_RF_RXDCK = BIT(RF08_RXDCK)
};
enum halrf_shift_band {
HAL_RF_2P4 = 0,
HAL_RF_2P3 = 1,
HAL_RF_2P5 = 2
};
enum halrf_dbg_comp {
DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
DBG_RF_IQK = BIT(RF01_IQK),
DBG_RF_LCK = BIT(RF02_LCK),
DBG_RF_DPK = BIT(RF03_DPK),
DBG_RF_TXGAPK = BIT(RF04_TXGAPK),
DBG_RF_DACK = BIT(RF05_DACK),
DBG_RF_DPK_TRACK = BIT(RF06_DPK_TRK),
DBG_RF_RFK = BIT(RF09_RFK),
DBG_RF_MP = BIT(29),
DBG_RF_TMP = BIT(30),
DBG_RF_INIT = BIT(31)
};
enum halrf_cmninfo_init {
HALRF_CMNINFO_ABILITY = 0,
HALRF_CMNINFO_DPK_EN = 1,
HALRF_CMNINFO_EEPROM_THERMAL_VALUE,
HALRF_CMNINFO_RFK_FORBIDDEN,
HALRF_CMNINFO_IQK_SEGMENT,
HALRF_CMNINFO_RATE_INDEX,
HALRF_CMNINFO_PWT_TYPE,
HALRF_CMNINFO_MP_PSD_POINT,
HALRF_CMNINFO_MP_PSD_START_POINT,
HALRF_CMNINFO_MP_PSD_STOP_POINT,
HALRF_CMNINFO_MP_PSD_AVERAGE,
HALRF_CMNINFO_IQK_TIMES,
HALRF_CMNINFO_MP_POWER_TRACKING_TYPE,
HALRF_CMNINFO_POWER_TRACK_CONTROL
};
enum halrf_cmninfo_hook {
HALRF_CMNINFO_CON_TX,
HALRF_CMNINFO_SINGLE_TONE,
HALRF_CMNINFO_CARRIER_SUPPRESSION,
HALRF_CMNINFO_MP_RATE_INDEX,
HALRF_CMNINFO_MANUAL_RF_SUPPORTABILITY
};
enum halrf_lna_set {
HALRF_LNA_DISABLE = 0,
HALRF_LNA_ENABLE = 1,
};
enum halrf_k_segment_time {
SEGMENT_FREE = 0,
SEGMENT_10MS = 10, /*10ms*/
SEGMENT_30MS = 30, /*30ms*/
SEGMENT_50MS = 50, /*50ms*/
};
#define POWER_INDEX_DIFF 4
#define TSSI_TXAGC_DIFF 2
#define TSSI_CODE_NUM 84
#define TSSI_SLOPE_2G 8
#define TSSI_SLOPE_5G 5
#define TSSI_EFUSE_NUM 25
#define TSSI_EFUSE_KFREE_NUM 4
#define TSSI_DE_DIFF_EFUSE_NUM 10
struct _halrf_tssi_data {
s32 cck_offset_patha;
s32 cck_offset_pathb;
s32 tssi_trk_txagc_offset[PHYDM_MAX_RF_PATH];
s32 delta_tssi_txagc_offset[PHYDM_MAX_RF_PATH];
s16 txagc_codeword[TSSI_CODE_NUM];
u16 tssi_codeword[TSSI_CODE_NUM];
s8 tssi_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_NUM];
s8 tssi_de_diff_efuse[PHYDM_MAX_RF_PATH][TSSI_DE_DIFF_EFUSE_NUM];
s8 tssi_kfree_efuse[PHYDM_MAX_RF_PATH][TSSI_EFUSE_KFREE_NUM];
u8 thermal[PHYDM_MAX_RF_PATH];
u32 index[PHYDM_MAX_RF_PATH][14];
u8 do_tssi;
u8 get_thermal;
u8 tssi_finish_bit[PHYDM_MAX_RF_PATH];
u8 thermal_trigger;
s8 tssi_de;
};
struct _halrf_txgapk_info {
u32 txgapk_rf3f_bp[5][12][PHYDM_MAX_RF_PATH]; /* band(2Gcck/2GOFDM/5GL/5GM/5GH)/idx/path */
boolean txgapk_bp_done;
s8 offset[12][PHYDM_MAX_RF_PATH];
s8 fianl_offset[12][PHYDM_MAX_RF_PATH];
u8 read_txgain;
};
/*@============================================================*/
/*@ structure */
/*@============================================================*/
struct _hal_rf_ {
/*hook*/
u8 *test1;
/*update*/
u32 rf_supportability;
u8 rf_shift_band;
/*u32 halrf_tssi_data;*/
u8 eeprom_thermal;
u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/
boolean dpk_done;
u64 dpk_progressing_time;
u64 iqk_progressing_time;
u32 fw_ver;
boolean *is_con_tx;
boolean *is_single_tone;
boolean *is_carrier_suppresion;
boolean is_dpk_in_progress;
boolean is_tssi_in_progress;
boolean is_bt_iqk_timeout;
boolean is_rfk_h2c_timeout;
boolean aac_checked;
boolean is_txgapk_in_progress;
u8 *mp_rate_index;
u32 *manual_rf_supportability;
u32 p_rate_index;
u8 pwt_type;
u32 rf_dbg_comp;
u8 rfk_type;
u32 gnt_control;
u8 ext_lna; /*@with 2G external LNA NO/Yes = 0/1*/
u8 ext_lna_5g; /*@with 5G external LNA NO/Yes = 0/1*/
u8 ext_pa; /*@with 2G external PNA NO/Yes = 0/1*/
u8 ext_pa_5g; /*@with 5G external PNA NO/Yes = 0/1*/
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
struct _halrf_psd_data halrf_psd_data;
struct _halrf_tssi_data halrf_tssi_data;
#endif
struct _halrf_txgapk_info halrf_txgapk_info;
u8 power_track_type;
u8 mp_pwt_type;
u8 pre_band_type;
};
/*@============================================================*/
/*@ function prototype */
/*@============================================================*/
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\
RTL8197G_SUPPORT == 1)
void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output,
u32 *_out_len);
void halrf_iqk_hwtx_check(void *dm_void, boolean is_check);
#endif
u8 halrf_match_iqk_version(void *dm_void);
void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
#ifdef CONFIG_2G_BAND_SHIFT
void halrf_support_band_shift_debug(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
#endif
void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info,
u32 value);
void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info,
void *value);
void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value);
u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info);
void halrf_watchdog(void *dm_void);
void halrf_supportability_init(void *dm_void);
void halrf_init(void *dm_void);
void halrf_iqk_trigger(void *dm_void, boolean is_recovery);
void halrf_rfk_handshake(void *dm_void, boolean is_before_k);
void halrf_rf_k_connect_trigger(void *dm_void, boolean is_recovery,
enum halrf_k_segment_time seg_time);
void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
boolean segment_iqk);
void halrf_lck_trigger(void *dm_void);
void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used,
char *output, u32 *_out_len);
void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug);
void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type);
void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type);
void halrf_do_imr_test(void *dm_void, u8 data);
u32 halrf_psd_log2base(u32 val);
void halrf_dpk_trigger(void *dm_void);
void halrf_txgapk_trigger(void *dm_void);
u8 halrf_dpk_result_check(void *dm_void);
void halrf_dpk_sram_read(void *dm_void);
void halrf_dpk_enable_disable(void *dm_void);
void halrf_dpk_track(void *dm_void);
void halrf_dpk_reload(void *dm_void);
void halrf_dpk_switch(void *dm_void, u8 enable);
void halrf_dpk_debug_cmd(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
void halrf_dpk_c2h_report_transfer(void *dm_void, boolean is_ok, u8 *buf, u8 buf_size);
void halrf_dpk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);
/*Global function*/
void halrf_reload_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num);
void halrf_reload_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num,
u8 ss);
void halrf_bp(void *dm_void, u32 *bp_reg, u32 *bp, u32 num);
void halrf_bprf(void *dm_void, u32 *bp_reg, u32 bp[][4], u32 num, u8 ss);
void halrf_mode(void *dm_void, u32 *i_value, u32 *q_value);
boolean halrf_compare(void *dm_void, u32 value);
u32 halrf_delta(void *dm_void, u32 v1, u32 v2);
void halrf_minmax_compare(void *dm_void, u32 value, u32 *min, u32 *max);
void halrf_b_sort(void *dm_void, u32 *iv, u32 *qv);
void halrf_bubble(void *dm_void, u32 *v1, u32 *v2);
void halrf_swap(void *dm_void, u32 *v1, u32 *v2);
enum hal_status
halrf_config_rfk_with_header_file(void *dm_void, u32 config_type);
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8710C_SUPPORT == 1 ||\
RTL8197G_SUPPORT == 1)
void halrf_iqk_dbg(void *dm_void);
#endif
void halrf_tssi_get_efuse(void *dm_void);
void halrf_do_tssi(void *dm_void);
void halrf_set_tssi_enable(void *dm_void, boolean enable);
void halrf_do_thermal(void *dm_void);
u32 halrf_set_tssi_value(void *dm_void, u32 tssi_value);
void halrf_set_tssi_power(void *dm_void, s8 power);
void halrf_tssi_set_de_for_tx_verify(void *dm_void, u32 tssi_de, u8 path);
u32 halrf_query_tssi_value(void *dm_void);
void halrf_tssi_cck(void *dm_void);
void halrf_thermal_cck(void *dm_void);
void halrf_tssi_set_de(void *dm_void);
void halrf_tssi_dck(void *dm_void, u8 direct_do);
void halrf_calculate_tssi_codeword(void *dm_void);
void halrf_set_tssi_codeword(void *dm_void);
u8 halrf_get_tssi_codeword_for_txindex(void *dm_void);
void halrf_tssi_clean_de(void *dm_void);
u32 halrf_tssi_trigger_de(void *dm_void, u8 path);
u32 halrf_tssi_get_de(void *dm_void, u8 path);
u32 halrf_get_online_tssi_de(void *dm_void, u8 path, s32 pout);
void halrf_tssi_trigger(void *dm_void);
void halrf_txgapk_write_gain_table(void *dm_void);
void halrf_txgapk_reload_tx_gain(void *dm_void);
void halrf_txgap_enable_disable(void *dm_void, u8 enable);
void halrf_set_dpk_track(void *dm_void, u8 enable);
void halrf_set_dpkbychannel(void *dm_void, boolean dpk_by_ch);
void halrf_set_dpkenable(void *dm_void, boolean is_dpk_enable);
boolean halrf_get_dpkbychannel(void *dm_void);
boolean halrf_get_dpkenable(void *dm_void);
void _iqk_check_if_reload(void *dm_void);
void halrf_do_rxbb_dck(void *dm_void);
void config_halrf_path_adda_setting_trigger(void *dm_void);
void halrf_reload_iqk(void *dm_void, boolean reset);
void halrf_dack_dbg(void *dm_void);
void halrf_dack_trigger(void *dm_void, boolean force);
void halrf_dack_restore(void *dm_void);
void halrf_iqk_info_rsvd_page(void *dm_void, u8 *buf, u32 *buf_size);
void halrf_set_rfsupportability(void *dm_void);
void halrf_rxdck(void *dm_void);
void halrf_delay_10us(u16 v1);
void halrf_dump_rfk_reg(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len);
void halrf_xtal_thermal_track(void *dm_void);
void halrf_rfk_power_save(void *dm_void, boolean is_power_save);
#endif /*__HALRF_H__*/

395
hal/phydm/halrf/halrf_debug.c Normal file
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@ -0,0 +1,395 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*@************************************************************
* include files
* ************************************************************
*/
#include "mp_precomp.h"
#include "phydm_precomp.h"
void halrf_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len)
{
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
struct dm_struct *dm = (struct dm_struct *)dm_void;
u32 used = *_used;
u32 out_len = *_out_len;
u32 rf_release_ver = 0;
switch (dm->support_ic_type) {
#if (RTL8814A_SUPPORT)
case ODM_RTL8814A:
rf_release_ver = RF_RELEASE_VERSION_8814A;
break;
#endif
#if (RTL8821C_SUPPORT)
case ODM_RTL8821C:
rf_release_ver = RF_RELEASE_VERSION_8821C;
break;
#endif
#if (RTL8822B_SUPPORT)
case ODM_RTL8822B:
rf_release_ver = RF_RELEASE_VERSION_8822B;
break;
#endif
#if (RTL8822C_SUPPORT)
case ODM_RTL8822C:
rf_release_ver = RF_RELEASE_VERSION_8822C;
break;
#endif
#if (RTL8814B_SUPPORT)
case ODM_RTL8814B:
rf_release_ver = RF_RELEASE_VERSION_8814B;
break;
#endif
#if (RTL8812F_SUPPORT)
case ODM_RTL8812F:
rf_release_ver = RF_RELEASE_VERSION_8812F;
break;
#endif
#if (RTL8198F_SUPPORT)
case ODM_RTL8198F:
rf_release_ver = RF_RELEASE_VERSION_8198F;
break;
#endif
#if (RTL8197F_SUPPORT)
case ODM_RTL8197F:
rf_release_ver = RF_RELEASE_VERSION_8197F;
break;
#endif
#if (RTL8192F_SUPPORT)
case ODM_RTL8192F:
rf_release_ver = RF_RELEASE_VERSION_8192F;
break;
#endif
#if (RTL8710B_SUPPORT)
case ODM_RTL8710B:
rf_release_ver = RF_RELEASE_VERSION_8710B;
break;
#endif
#if (RTL8195B_SUPPORT)
case ODM_RTL8195B:
rf_release_ver = RF_RELEASE_VERSION_8195B;
break;
#endif
}
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %d\n",
"RF Para Release Ver", rf_release_ver);
/* HAL RF version List */
PDM_SNPF(out_len, used, output + used, out_len - used, "%-35s\n",
"% HAL RF version %");
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"Power Tracking", HALRF_POWRTRACKING_VER);
PDM_SNPF(out_len, used, output + used, out_len - used,
" %-35s: %s %s\n", "IQK",
(dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) ? "FW" :
HALRF_IQK_VER,
(halrf_match_iqk_version(dm_void)) ? "(match)" : "(mismatch)");
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"LCK", HALRF_LCK_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"DPK", HALRF_DPK_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"TSSI", HALRF_TSSI_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"KFREE", HALRF_KFREE_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"TX 2G Current Calibration", HALRF_PABIASK_VER);
PDM_SNPF(out_len, used, output + used, out_len - used, " %-35s: %s\n",
"RFK Init. Parameter", HALRF_RFK_INIT_VER);
*_used = used;
*_out_len = out_len;
#endif
}
void halrf_debug_trace(void *dm_void, char input[][16], u32 *_used,
char *output, u32 *_out_len)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
u32 one = 1;
u32 used = *_used;
u32 out_len = *_out_len;
u32 rf_var[10] = {0};
u8 i;
for (i = 0; i < 5; i++)
if (input[i + 1])
PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &rf_var[i]);
if (rf_var[0] == 100) {
PDM_SNPF(out_len, used, output + used, out_len - used,
"\n[DBG MSG] RF Selection\n");
PDM_SNPF(out_len, used, output + used, out_len - used,
"00. (( %s ))TX_PWR_TRACK\n",
((rf->rf_dbg_comp & DBG_RF_TX_PWR_TRACK) ? ("V") :
(".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"01. (( %s ))IQK\n",
((rf->rf_dbg_comp & DBG_RF_IQK) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"02. (( %s ))LCK\n",
((rf->rf_dbg_comp & DBG_RF_LCK) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"03. (( %s ))DPK\n",
((rf->rf_dbg_comp & DBG_RF_DPK) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"04. (( %s ))TXGAPK\n",
((rf->rf_dbg_comp & DBG_RF_TXGAPK) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"06. (( %s ))DPK_TRACK\n",
((rf->rf_dbg_comp & DBG_RF_DPK_TRACK) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"29. (( %s ))MP\n",
((rf->rf_dbg_comp & DBG_RF_MP) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"30. (( %s ))TMP\n",
((rf->rf_dbg_comp & DBG_RF_TMP) ? ("V") : (".")));
PDM_SNPF(out_len, used, output + used, out_len - used,
"31. (( %s ))INIT\n",
((rf->rf_dbg_comp & DBG_RF_INIT) ? ("V") : (".")));
} else if (rf_var[0] == 101) {
rf->rf_dbg_comp = 0;
PDM_SNPF(out_len, used, output + used, out_len - used,
"Disable all DBG COMP\n");
} else {
if (rf_var[1] == 1) /*enable*/
rf->rf_dbg_comp |= (one << rf_var[0]);
else if (rf_var[1] == 2) /*disable*/
rf->rf_dbg_comp &= ~(one << rf_var[0]);
}
PDM_SNPF(out_len, used, output + used, out_len - used,
"\nCurr-RF_Dbg_Comp = 0x%x\n", rf->rf_dbg_comp);
*_used = used;
*_out_len = out_len;
}
void halrf_dack_debug_cmd(void *dm_void, char input[][16])
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
u32 dm_value[10] = {0};
u8 i;
for (i = 0; i < 7; i++)
if (input[i + 1])
PHYDM_SSCANF(input[i + 2], DCMD_DECIMAL, &dm_value[i]);
if (dm_value[0] == 1)
halrf_dack_trigger(dm, true);
else
halrf_dack_trigger(dm, false);
}
struct halrf_command {
char name[16];
u8 id;
};
enum halrf_CMD_ID {
HALRF_HELP,
HALRF_SUPPORTABILITY,
HALRF_DBG_COMP,
HALRF_PROFILE,
HALRF_IQK_INFO,
HALRF_IQK,
HALRF_IQK_DEBUG,
HALRF_DPK,
HALRF_DACK,
HALRF_DACK_DEBUG,
HALRF_DUMP_RFK_REG,
#ifdef CONFIG_2G_BAND_SHIFT
HAL_BAND_SHIFT,
#endif
};
struct halrf_command halrf_cmd_ary[] = {
{"-h", HALRF_HELP},
{"ability", HALRF_SUPPORTABILITY},
{"dbg", HALRF_DBG_COMP},
{"profile", HALRF_PROFILE},
{"iqk_info", HALRF_IQK_INFO},
{"iqk", HALRF_IQK},
{"iqk_dbg", HALRF_IQK_DEBUG},
{"dpk", HALRF_DPK},
{"dack", HALRF_DACK},
{"dack_dbg", HALRF_DACK_DEBUG},
{"dump_rfk_reg", HALRF_DUMP_RFK_REG},
#ifdef CONFIG_2G_BAND_SHIFT
{"band_shift", HAL_BAND_SHIFT},
#endif
};
void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
u32 *_out_len, u32 input_num)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#ifdef CONFIG_PHYDM_DEBUG_FUNCTION
u8 id = 0;
u32 rf_var[10] = {0};
u32 i, input_idx = 0;
u32 halrf_ary_size =
sizeof(halrf_cmd_ary) / sizeof(struct halrf_command);
u32 used = *_used;
u32 out_len = *_out_len;
/* Parsing Cmd ID */
for (i = 0; i < halrf_ary_size; i++) {
if (strcmp(halrf_cmd_ary[i].name, input[1]) == 0) {
id = halrf_cmd_ary[i].id;
break;
}
}
if (i == halrf_ary_size) {
PDM_SNPF(out_len, used, output + used, out_len - used,
"RF Cmd not found\n");
return;
}
switch (id) {
case HALRF_HELP:
PDM_SNPF(out_len, used, output + used, out_len - used,
"RF cmd ==>\n");
for (i = 0; i < halrf_ary_size - 1; i++) {
PDM_SNPF(out_len, used, output + used, out_len - used,
" %-5d: %s\n", i, halrf_cmd_ary[i + 1].name);
}
break;
case HALRF_SUPPORTABILITY:
halrf_support_ability_debug(dm, &input[0], &used, output,
&out_len);
break;
#ifdef CONFIG_2G_BAND_SHIFT
case HAL_BAND_SHIFT:
halrf_support_band_shift_debug(dm, &input[0], &used, output,
&out_len);
break;
#endif
case HALRF_DBG_COMP:
halrf_debug_trace(dm, &input[0], &used, output, &out_len);
break;
case HALRF_PROFILE:
halrf_basic_profile(dm, &used, output, &out_len);
break;
case HALRF_IQK_INFO:
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
halrf_iqk_info_dump(dm, &used, output, &out_len);
#endif
break;
case HALRF_IQK:
PDM_SNPF(out_len, used, output + used, out_len - used,
"TRX IQK Trigger\n");
halrf_iqk_trigger(dm, false);
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
halrf_iqk_info_dump(dm, &used, output, &out_len);
#endif
break;
case HALRF_IQK_DEBUG:
PDM_SNPF(out_len, used, output + used, out_len - used,
"IQK DEBUG!!!!!\n");
for (i = 0; i < 5; i++) {
if (input[i + 1]) {
PHYDM_SSCANF(input[i + 2], DCMD_HEX,
&rf_var[i]);
input_idx++;
}
}
if (input_idx >= 1) {
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 || RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8822C | ODM_RTL8814B))
halrf_iqk_debug(dm, (u32 *)rf_var, &used,
output, &out_len);
#endif
}
break;
case HALRF_DPK:
halrf_dpk_debug_cmd(dm, input, &used, output, &out_len);
break;
case HALRF_DACK:
PDM_SNPF(out_len, used, output + used, out_len - used,
"DACK Trigger\n");
halrf_dack_debug_cmd(dm, &input[0]);
break;
case HALRF_DACK_DEBUG:
PDM_SNPF(out_len, used, output + used, out_len - used,
"DACK DEBUG\n");
halrf_dack_dbg(dm);
break;
case HALRF_DUMP_RFK_REG:
halrf_dump_rfk_reg(dm, input, &used, output, &out_len);
break;
default:
break;
}
*_used = used;
*_out_len = out_len;
#endif
}
void halrf_init_debug_setting(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
rf->rf_dbg_comp =
DBG_RF_RFK |
#if DBG
#if 1
/*DBG_RF_TX_PWR_TRACK | */
/*DBG_RF_IQK | */
/*DBG_RF_LCK | */
/*DBG_RF_DPK | */
/*DBG_RF_TXGAPK | */
/*DBG_RF_DACK | */
/*DBG_RF_DPK_TRACK | */
/*DBG_RF_MP | */
/*DBG_RF_TMP | */
/*DBG_RF_INIT | */
#endif
#endif
0;
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_DEBUG_H__
#define __HALRF_DEBUG_H__
/*@============================================================*/
/*@include files*/
/*@============================================================*/
/*@============================================================*/
/*@Definition */
/*@============================================================*/
#if DBG
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#define RF_DBG(dm, comp, fmt, args...) \
do { \
if ((comp) & dm->rf_table.rf_dbg_comp) { \
pr_debug("[RF] "); \
RT_PRINTK(fmt, ##args); \
} \
} while (0)
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
static __inline void RF_DBG(PDM_ODM_T dm, int comp, char *fmt, ...)
{
RT_STATUS rt_status;
va_list args;
char buf[PRINT_MAX_SIZE] = {0};
if ((comp & dm->rf_table.rf_dbg_comp) == 0)
return;
if (fmt == NULL)
return;
va_start(args, fmt);
rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, PRINT_MAX_SIZE, fmt, args);
va_end(args);
if (rt_status != RT_STATUS_SUCCESS) {
DbgPrint("Failed (%d) to print message to buffer\n", rt_status);
return;
}
DbgPrint("[RF] %s", buf);
}
#elif (DM_ODM_SUPPORT_TYPE == ODM_IOT)
#define RF_DBG(dm, comp, fmt, args...) \
do { \
if ((comp) & dm->rf_table.rf_dbg_comp) { \
RT_DEBUG(COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \
} \
} while (0)
#else
#define RF_DBG(dm, comp, fmt, args...) \
do { \
struct dm_struct *__dm = dm; \
if ((comp) & __dm->rf_table.rf_dbg_comp) { \
RT_TRACE(((struct rtl_priv *)__dm->adapter), \
COMP_PHYDM, DBG_DMESG, "[RF] " fmt, ##args); \
} \
} while (0)
#endif
#else /*#if DBG*/
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
static __inline void RF_DBG(struct dm_struct *dm, int comp, char *fmt, ...)
{
#if 0
RT_STATUS rt_status;
va_list args;
char buf[128] = {0};/*PRINT_MAX_SIZE*/
if ((comp & dm->rf_table.rf_dbg_comp) == 0)
return;
if (NULL != fmt) {
va_start(args, fmt);
rt_status = (RT_STATUS)RtlStringCbVPrintfA(buf, sizeof(buf), fmt, args);
va_end(args);
if (rt_status == RT_STATUS_SUCCESS) {
halrf_rt_trace(buf);
}
}
#endif
}
#else
#define RF_DBG(dm, comp, fmt, args...)
#endif
#endif /*#if DBG*/
/*@============================================================*/
/*@ enumeration */
/*@============================================================*/
/*@============================================================*/
/*@ structure */
/*@============================================================*/
/*@============================================================*/
/*@ function prototype */
/*@============================================================*/
void halrf_cmd_parser(void *dm_void, char input[][16], u32 *_used, char *output,
u32 *_out_len, u32 input_num);
void halrf_init_debug_setting(void *dm_void);
#endif /*__HALRF_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_DPK_H__
#define __HALRF_DPK_H__
/*@--------------------------Define Parameters-------------------------------*/
#define GAIN_LOSS 1
#define DO_DPK 2
#define DPK_ON 3
#define GAIN_LOSS_PULSE 4
#define DPK_PAS 5
#define DPK_LMS 6
#define DPK_LOK 4
#define DPK_TXK 5
#define DAGC 4
#define LOSS_CHK 0
#define GAIN_CHK 1
#define PAS_READ 2
#define AVG_THERMAL_NUM 8
#define AVG_THERMAL_NUM_DPK 8
#define THERMAL_DPK_AVG_NUM 4
/*define RF path numer*/
#if (RTL8198F_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
#define KPATH 4
#elif (RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||RTL8197G_SUPPORT == 1 ||\
RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
#define KPATH 2
#else
#define KPATH 1
#endif
#if (RTL8814B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
#define GROUP_5G 6
#elif (RTL8195B_SUPPORT == 1)
#define GROUP_5G 13
#endif
/*@---------------------------End Define Parameters---------------------------*/
struct dm_dpk_info {
boolean is_dpk_enable;
boolean is_dpk_pwr_on;
boolean is_dpk_by_channel;
boolean is_tssi_mode;
u8 dpk_status; /*bit[0]:reload;bit[1]:cal;bit[2]:cal_ok*/
u16 dpk_path_ok;
/*@BIT(15)~BIT(12) : 5G reserved, BIT(11)~BIT(8) 5G_S3~5G_S0*/
/*@BIT(7)~BIT(4) : 2G reserved, BIT(3)~BIT(0) 2G_S3~2G_S0*/
u8 thermal_dpk[KPATH]; /*path*/
u8 thermal_dpk_avg[KPATH][AVG_THERMAL_NUM_DPK]; /*path*/
u8 pre_pwsf[KPATH];
u8 thermal_dpk_avg_index;
u32 gnt_control;
u32 gnt_value;
u8 dpk_ch;
u8 dpk_band;
u8 dpk_bw;
u32 dpk_rf18[2];
u32 dpk_cal_cnt;
u32 dpk_ok_cnt;
u32 dpk_reload_cnt;
#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
u16 dc_i[2]; /*MDPD DC I path*/
u16 dc_q[2]; /*MDPD DC Q path*/
u8 corr_val[2]; /*Corr value path*/
u8 corr_idx[2]; /*Corr index path*/
#endif
#if (RTL8822C_SUPPORT == 1 || RTL8812F_SUPPORT == 1)
u8 result[2]; /*path*/
u8 dpk_txagc[2]; /*path*/
u32 coef[2][20]; /*path/MDPD coefficient*/
u16 dpk_gs[2]; /*MDPD coef gs*/
u8 thermal_dpk_delta[2]; /*path*/
#endif
#if (RTL8198F_SUPPORT == 1 || RTL8192F_SUPPORT == 1 || RTL8197F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8197G_SUPPORT == 1)
/*2G DPK data*/
u8 dpk_result[KPATH][3]; /*path/group*/
u8 pwsf_2g[KPATH][3]; /*path/group*/
u32 lut_2g_even[KPATH][3][64]; /*path/group/LUT data*/
u32 lut_2g_odd[KPATH][3][64]; /*path/group/LUT data*/
s16 tmp_pas_i[32]; /*PAScan I data*/
s16 tmp_pas_q[32]; /*PAScan Q data*/
#endif
#if (RTL8814B_SUPPORT == 1)
/*5G DPK data*/
u8 dpk_5g_result[KPATH][GROUP_5G]; /*path/group*/
u8 pwsf_5g[KPATH][GROUP_5G]; /*path/group*/
u32 lut_5g[KPATH][GROUP_5G][64]; /*path/group/LUT data*/
u32 lut_2g[KPATH][3][64]; /*path/group/LUT data*/
u8 rxbb[4]; /*path/group*/
u8 txbb[4]; /*path/group*/
u8 tx_gain;
#endif
#if (RTL8195B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
u8 dpk_txagc;
/*2G DPK data*/
u8 dpk_2g_result[KPATH][3]; /*path/group*/
u8 pwsf_2g[KPATH][3]; /*path/group*/
u32 lut_2g_even[KPATH][3][16]; /*path/group/LUT data*/
u32 lut_2g_odd[KPATH][3][16]; /*path/group/LUT data*/
/*5G DPK data*/
u8 dpk_5g_result[KPATH][GROUP_5G]; /*path/group*/
u8 pwsf_5g[KPATH][GROUP_5G]; /*path/group*/
u32 lut_5g_even[KPATH][GROUP_5G][16]; /*path/group/LUT data*/
u32 lut_5g_odd[KPATH][GROUP_5G][16]; /*path/group/LUT data*/
#endif
#if(RTL8723F_SUPPORT == 1)
u8 one_shot_cnt;
u8 dpk_current_path;
u8 thermal_init[KPATH];
u8 dpk_delta_thermal[KPATH]; /*path*/
s8 last_offset[KPATH]; /*path*/
u8 txagc[KPATH]; /*path*/
u8 tssi_txagc[KPATH][2]; /*path/0:txagc_rf,1:tssi_offset*/
u16 digital_bbgain[KPATH]; /*path*/
u16 pwsf[KPATH]; /*path*/
#endif
};
#if (RTL8822C_SUPPORT == 1)
struct dm_dpk_c2h_report {
u8 result[2]; /*ch0_result/ch1_result*/
u8 therm[2][2]; /*therm0_s0/therm0_s1/therm1_s0/therm1_s1*/
u8 therm_delta[2][2]; /*therm_delta0_s0/therm_delta0_s1/therm_delta1_s0/therm_delta1_s1*/
u32 dpk_rf18[2]; /*dpk_ch0/dpk_ch1*/
u8 dpk_status; /*dpk_status*/
};
#endif
#endif /*__HALRF_DPK_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_FEATURES_H__
#define __HALRF_FEATURES_H__
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#define CONFIG_HALRF_POWERTRACKING 1
#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
#define CONFIG_HALRF_POWERTRACKING 1
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define CONFIG_HALRF_POWERTRACKING 1
#endif
#endif /*#ifndef __HALRF_FEATURES_H__*/

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hal/phydm/halrf/halrf_iqk.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_IQK_H__
#define __HALRF_IQK_H__
/*@--------------------------Define Parameters-------------------------------*/
#define LOK_delay 1
#define WBIQK_delay 10
#define TX_IQK 0
#define RX_IQK 1
#define TXIQK 0
#define RXIQK1 1
#define RXIQK2 2
#define kcount_limit_80m 2
#define kcount_limit_others 4
#define rxiqk_gs_limit 6
#define TXWBIQK_EN 1
#define RXWBIQK_EN 1
#if (RTL8814A_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT)
#define NUM 4
#elif (RTL8822B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\
RTL8723F_SUPPORT == 1)
#define NUM 2
#else
#define NUM 1
#endif
/*@-----------------------End Define Parameters-----------------------*/
struct dm_dack_info {
boolean dack_en;
u16 msbk_d[2][2][15];
u8 dck_d[2][2][2];
u16 biask_d[2][2];
};
struct dm_iqk_info {
boolean lok_fail[NUM];
boolean iqk_fail[2][NUM];
u32 iqc_matrix[2][NUM];
u8 iqk_times;
u32 rf_reg18;
u32 rf_reg08;
u32 lna_idx;
u8 iqk_step;
u8 rxiqk_step;
u8 tmp1bcc;
u8 txgain;
u32 txgain56;
u8 kcount;
u8 rfk_ing; /*bit0:IQKing, bit1:LCKing, bit2:DPKing*/
boolean rfk_forbidden;
u8 rxbb;
u32 rf_reg58;
boolean segment_iqk;
boolean is_tssi_mode;
u8 iqk_band;
u8 iqk_ch;
u8 iqk_bw;
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1 ||\
RTL8812F_SUPPORT == 1 || RTL8197G_SUPPORT == 1 ||\
RTL8710C_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
u32 iqk_channel[2];
boolean iqk_fail_report[2][NUM][2]; /*channel/path/TRX(TX:0, RX:1) */
/*channel / path / TRX(TX:0, RX:1) / CFIR_real*/
/*channel index = 2 is just for debug*/
#if (RTL8814B_SUPPORT == 1)
u16 iqk_cfir_real[3][NUM][2][19];
u16 iqk_cfir_imag[3][NUM][2][19];
#elif (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
u16 iqk_cfir_real[3][2][2][17];
/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
/*channel index = 2 is just for debug*/
u16 iqk_cfir_imag[3][2][2][17];
/*times/path*/
#elif (RTL8195B_SUPPORT == 1)
u32 iqk_cfir_real[3][NUM][2][9];
u32 iqk_cfir_imag[3][NUM][2][9];
/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
/*channel index = 2 is just for debug*/
#else
u32 iqk_cfir_real[3][NUM][2][8];
/*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/
/*channel index = 2 is just for debug*/
u32 iqk_cfir_imag[3][NUM][2][8];
#endif
#if (RTL8812F_SUPPORT == 1 || RTL8822C_SUPPORT == 1 )
u32 rx_cfir_real[2][2][17];
u32 rx_cfir_imag[2][2][17];
u32 rx_cfir[2][2];
#endif
u8 retry_count[2][NUM][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */
u8 gs_retry_count[2][NUM][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */
/* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */
u8 rxiqk_fail_code[2][NUM];
u32 lok_idac[2][NUM]; /*channel / path*/
u16 rxiqk_agc[2][NUM]; /*channel / path*/
u32 bypass_iqk[2][NUM]; /*channel / 0xc94/0xe94*/
u32 txgap_result[8]; /*txagpK result */
u32 tmp_gntwl;
boolean is_btg;
boolean isbnd;
boolean is_reload;
boolean is_hwtx;
boolean xym_read;
boolean trximr_enable;
#if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1 || RTL8822C_SUPPORT == 1)
u32 rx_xym[2][10];
u32 tx_xym[2][10];
u32 gs1_xym[2][6];
u32 gs2_xym[2][6];
u32 rxk1_xym[2][6];
u32 nbtxk_1b38[2];
u32 nbrxk_1b3c[2];
#endif
#if (RTL8710C_SUPPORT == 1 || RTL8197G_SUPPORT == 1 )
u32 txxy[2][2];
u32 rxxy[2][2];
#endif
#if (RTL8723F_SUPPORT == 1)
u32 txxy[2][2];
u32 rxxy[2][2][2];
#endif
#endif
};
#endif /*__HALRF_IQK_H__*/

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hal/phydm/halrf/halrf_kfree.c Normal file
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hal/phydm/halrf/halrf_kfree.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_KFREE_H__
#define __HALRF_KFREE_H__
#define KFREE_VERSION "1.0"
#define KFREE_BAND_NUM 9
#define KFREE_CH_NUM 3
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
#define BB_GAIN_NUM 6
#endif
#define KFREE_FLAG_ON BIT(0)
#define KFREE_FLAG_THERMAL_K_ON BIT(1)
#define KFREE_FLAG_ON_2G BIT(2)
#define KFREE_FLAG_ON_5G BIT(3)
#define PA_BIAS_FLAG_ON BIT(4)
#define TSSI_TRIM_FLAG_ON BIT(5)
#define LNA_FLAG_ON BIT(6)
#define PPG_THERMAL_OFFSET_98F 0x50
#define PPG_2GM_TXAB_98F 0x51
#define PPG_2GM_TXCD_98F 0x52
#define PPG_2GL_TXAB_98F 0x53
#define PPG_2GL_TXCD_98F 0x54
#define PPG_2GH_TXAB_98F 0x55
#define PPG_2GH_TXCD_98F 0x56
#define PPG_PABIAS_2GAB_98F 0x57
#define PPG_PABIAS_2GCD_98F 0x58
#define PPG_LNA_2GA_98F 0x59
#define PPG_LNA_2GB_98F 0x5a
#define PPG_LNA_2GC_98F 0x5b
#define PPG_LNA_2GD_98F 0x5c
#define PPG_THERMAL_OFFSET_21C 0x1EF
#define PPG_2G_TXAB_21C 0x1EE
#define PPG_5GL1_TXA_21C 0x1EC
#define PPG_5GL2_TXA_21C 0x1E8
#define PPG_5GM1_TXA_21C 0x1E4
#define PPG_5GM2_TXA_21C 0x1E0
#define PPG_5GH1_TXA_21C 0x1DC
#define PPG_THERMAL_OFFSET_22B 0x3EF
#define PPG_2G_TXAB_22B 0x3EE
#define PPG_2G_TXCD_22B 0x3ED
#define PPG_5GL1_TXA_22B 0x3EC
#define PPG_5GL1_TXB_22B 0x3EB
#define PPG_5GL1_TXC_22B 0x3EA
#define PPG_5GL1_TXD_22B 0x3E9
#define PPG_5GL2_TXA_22B 0x3E8
#define PPG_5GL2_TXB_22B 0x3E7
#define PPG_5GL2_TXC_22B 0x3E6
#define PPG_5GL2_TXD_22B 0x3E5
#define PPG_5GM1_TXA_22B 0x3E4
#define PPG_5GM1_TXB_22B 0x3E3
#define PPG_5GM1_TXC_22B 0x3E2
#define PPG_5GM1_TXD_22B 0x3E1
#define PPG_5GM2_TXA_22B 0x3E0
#define PPG_5GM2_TXB_22B 0x3DF
#define PPG_5GM2_TXC_22B 0x3DE
#define PPG_5GM2_TXD_22B 0x3DD
#define PPG_5GH1_TXA_22B 0x3DC
#define PPG_5GH1_TXB_22B 0x3DB
#define PPG_5GH1_TXC_22B 0x3DA
#define PPG_5GH1_TXD_22B 0x3D9
#define PPG_PABIAS_2GA_22B 0x3D5
#define PPG_PABIAS_2GB_22B 0x3D6
#define PPG_THERMAL_A_OFFSET_22C 0x1ef
#define PPG_THERMAL_B_OFFSET_22C 0x1b0
#define PPG_2GL_TXAB_22C 0x1d4
#define PPG_2GM_TXAB_22C 0x1ee
#define PPG_2GH_TXAB_22C 0x1d2
#define PPG_5GL1_TXA_22C 0x1ec
#define PPG_5GL1_TXB_22C 0x1eb
#define PPG_5GL2_TXA_22C 0x1e8
#define PPG_5GL2_TXB_22C 0x1e7
#define PPG_5GM1_TXA_22C 0x1e4
#define PPG_5GM1_TXB_22C 0x1e3
#define PPG_5GM2_TXA_22C 0x1e0
#define PPG_5GM2_TXB_22C 0x1df
#define PPG_5GH1_TXA_22C 0x1dc
#define PPG_5GH1_TXB_22C 0x1db
#define PPG_PABIAS_2GA_22C 0x1d6
#define PPG_PABIAS_2GB_22C 0x1d5
#define PPG_PABIAS_5GA_22C 0x1d8
#define PPG_PABIAS_5GB_22C 0x1d7
#define TSSI_2GM_TXA_22C 0x1c0
#define TSSI_2GM_TXB_22C 0x1bf
#define TSSI_2GH_TXA_22C 0x1be
#define TSSI_2GH_TXB_22C 0x1bd
#define TSSI_5GL1_TXA_22C 0x1bc
#define TSSI_5GL1_TXB_22C 0x1bb
#define TSSI_5GL2_TXA_22C 0x1ba
#define TSSI_5GL2_TXB_22C 0x1b9
#define TSSI_5GM1_TXA_22C 0x1b8
#define TSSI_5GM1_TXB_22C 0x1b7
#define TSSI_5GM2_TXA_22C 0x1b6
#define TSSI_5GM2_TXB_22C 0x1b5
#define TSSI_5GH1_TXA_22C 0x1b4
#define TSSI_5GH1_TXB_22C 0x1b3
#define TSSI_5GH2_TXA_22C 0x1b2
#define TSSI_5GH2_TXB_22C 0x1b1
/*8195B*/
#define PPG_THERMAL_OFFSET_95B 0x1ef
#define PPG_2GL_TXA_95B 0x1d4
#define PPG_2GM_TXA_95B 0x1ee
#define PPG_2GH_TXA_95B 0x1d2
#define PPG_5GL1_TXA_95B 0x1ec
#define PPG_5GL2_TXA_95B 0x1e8
#define PPG_5GM1_TXA_95B 0x1e4
#define PPG_5GM2_TXA_95B 0x1e0
#define PPG_5GH1_TXA_95B 0x1dc
#define PPG_PABIAS_2GA_95B 0x1d6
#define PPG_PABIAS_5GA_95B 0x1d8
/*8721D*/
/*#define KFREE_BAND_NUM_8721D 6*/
#define PPG_THERMAL_OFFSET_8721D 0x1EF
#define PPG_2G_TXA_8721D 0x1EE
#define PPG_5GL1_TXA_8721D 0x1ED
#define PPG_5GL2_TXA_8721D 0x1EC
#define PPG_5GM1_TXA_8721D 0x1EB
#define PPG_5GM2_TXA_8721D 0x1EA
#define PPG_5GH1_TXA_8721D 0x1E9
/*8197G*/
#define PPG_THERMAL_A_OFFSET_97G 0x50
#define PPG_THERMAL_B_OFFSET_97G 0x27
#define PPG_2GM_TXAB_97G 0x51
#define PPG_2GL_TXAB_97G 0x53
#define PPG_2GH_TXAB_97G 0x55
#define TSSI_2GL_TXA_97G 0x1c
#define TSSI_2GL_TXB_97G 0x1d
#define TSSI_2GH_TXA_97G 0x1e
#define TSSI_2GH_TXB_97G 0x1f
#define PPG_PABIAS_2GAB_97G 0x57
#define PPG_LNA_2GA_97G 0x21
#define PPG_LNA_2GB_97G 0x22
/*8710C Ameba Z2*/
#define PPG_THERMAL_OFFSET_10C 0x1EF
#define PPG_2GL_TX_10C 0x1D4
#define PPG_2GM_TX_10C 0x1EE
#define PPG_2GH_TX_10C 0x1D2
#define PPG_PABIAS_10C 0x1D6
#define PPG_LNA_10C 0x1D0
/*8814B*/
#define PPG_2GL_TXAB_14B 0x3ee
#define PPG_2GL_TXCD_14B 0x3ed
#define PPG_5GL1_TXA_14B 0x3ec
#define PPG_5GL1_TXB_14B 0x3eb
#define PPG_5GL1_TXC_14B 0x3ea
#define PPG_5GL1_TXD_14B 0x3e9
#define PPG_5GL2_TXA_14B 0x3e8
#define PPG_5GL2_TXB_14B 0x3e7
#define PPG_5GL2_TXC_14B 0x3e6
#define PPG_5GL2_TXD_14B 0x3e5
#define PPG_5GM1_TXA_14B 0x3e4
#define PPG_5GM1_TXB_14B 0x3e3
#define PPG_5GM1_TXC_14B 0x3e2
#define PPG_5GM1_TXD_14B 0x3e1
#define PPG_5GM2_TXA_14B 0x3e0
#define PPG_5GM2_TXB_14B 0x3df
#define PPG_5GM2_TXC_14B 0x3de
#define PPG_5GM2_TXD_14B 0x3dd
#define PPG_5GH1_TXA_14B 0x3dc
#define PPG_5GH1_TXB_14B 0x3db
#define PPG_5GH1_TXC_14B 0x3da
#define PPG_5GH1_TXD_14B 0x3d9
#define PPG_PABIAS_5GAC_14B 0x3d8
#define PPG_PABIAS_5GBD_14B 0x3d7
#define PPG_PABIAS_2GAC_14B 0x3d6
#define PPG_PABIAS_2GBD_14B 0x3d5
#define PPG_THERMAL_A_OFFSET_14B 0x3D4
#define PPG_THERMAL_B_OFFSET_14B 0x3D3
#define PPG_THERMAL_C_OFFSET_14B 0x3D2
#define PPG_THERMAL_D_OFFSET_14B 0x3D1
#define TSSI_2GM_TXA_14B 0x3c0
#define TSSI_2GM_TXB_14B 0x3bf
#define TSSI_2GM_TXC_14B 0x3be
#define TSSI_2GM_TXD_14B 0x3bd
#define TSSI_2GH_TXA_14B 0x3bc
#define TSSI_2GH_TXB_14B 0x3bb
#define TSSI_2GH_TXC_14B 0x3ba
#define TSSI_2GH_TXD_14B 0x3b9
#define TSSI_5GL1_TXA_14B 0x3b8
#define TSSI_5GL1_TXB_14B 0x3b7
#define TSSI_5GL1_TXC_14B 0x3b6
#define TSSI_5GL1_TXD_14B 0x3b5
#define TSSI_5GL2_TXA_14B 0x3b4
#define TSSI_5GL2_TXB_14B 0x3b3
#define TSSI_5GL2_TXC_14B 0x3b2
#define TSSI_5GL2_TXD_14B 0x3b1
#define TSSI_5GM1_TXA_14B 0x3b0
#define TSSI_5GM1_TXB_14B 0x3af
#define TSSI_5GM1_TXC_14B 0x3ae
#define TSSI_5GM1_TXD_14B 0x3ad
#define TSSI_5GM2_TXA_14B 0x3ac
#define TSSI_5GM2_TXB_14B 0x3ab
#define TSSI_5GM2_TXC_14B 0x3aa
#define TSSI_5GM2_TXD_14B 0x3a9
#define TSSI_5GH1_TXA_14B 0x3a8
#define TSSI_5GH1_TXB_14B 0x3a7
#define TSSI_5GH1_TXC_14B 0x3a6
#define TSSI_5GH1_TXD_14B 0x3a5
#define TSSI_5GH2_TXA_14B 0x3a4
#define TSSI_5GH2_TXB_14B 0x3a3
#define TSSI_5GH2_TXC_14B 0x3a2
#define TSSI_5GH2_TXD_14B 0x3a1
struct odm_power_trim_data {
u8 flag;
u8 pa_bias_flag;
u8 lna_flag;
s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
s8 tssi_trim[KFREE_BAND_NUM][MAX_RF_PATH];
s8 pa_bias_trim[KFREE_BAND_NUM][MAX_RF_PATH];
s8 lna_trim[MAX_RF_PATH];
s8 thermal;
s8 multi_thermal[MAX_RF_PATH];
};
enum phydm_kfree_channeltosw {
PHYDM_2G = 0,
PHYDM_5GLB1 = 1,
PHYDM_5GLB2 = 2,
PHYDM_5GMB1 = 3,
PHYDM_5GMB2 = 4,
PHYDM_5GHB = 5,
};
void phydm_get_thermal_trim_offset(void *dm_void);
void phydm_get_power_trim_offset(void *dm_void);
void phydm_get_pa_bias_offset(void *dm_void);
s8 phydm_get_thermal_offset(void *dm_void);
s8 phydm_get_multi_thermal_offset(void *dm_void, u8 path);
void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
void phydm_config_new_kfree(void *dm_void);
s8 phydm_get_tssi_trim_de(void *dm_void, u8 path);
void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
void phydm_set_lna_trim_offset (void *dm_void, u8 path, u8 cg_cs, u8 enable);
#endif /*__HALRF_KFREE_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*@************************************************************
* include files
* ************************************************************
*/
#include "mp_precomp.h"
#include "phydm_precomp.h"
boolean
odm_check_power_status(void *dm_void)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct dm_struct *dm = (struct dm_struct *)dm_void;
PADAPTER *adapter = dm->adapter;
RT_RF_POWER_STATE rt_state;
MGNT_INFO *mgnt_info = &((PADAPTER)adapter)->MgntInfo;
/* 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. */
if (mgnt_info->init_adpt_in_progress == true) {
RF_DBG(dm, DBG_RF_INIT,
"check_pow_status Return true, due to initadapter\n");
return true;
}
/*
* 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
*/
((PADAPTER)adapter)->HalFunc.GetHwRegHandler((PADAPTER)adapter, HW_VAR_RF_STATE, (u8 *)(&rt_state));
if (((PADAPTER)adapter)->bDriverStopped || ((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep || rt_state == eRfOff) {
RF_DBG(dm, DBG_RF_INIT,
"check_pow_status Return false, due to %d/%d/%d\n",
((PADAPTER)adapter)->bDriverStopped,
((PADAPTER)adapter)->bDriverIsGoingToPnpSetPowerSleep,
rt_state);
return false;
}
#endif
return true;
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
void halrf_update_pwr_track(void *dm_void, u8 rate)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
u8 path_idx = 0;
#endif
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n", rate);
dm->tx_rate = rate;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
#if USE_WORKITEM
odm_schedule_work_item(&dm->ra_rpt_workitem);
#else
if (dm->support_ic_type == ODM_RTL8821) {
#if (RTL8821A_SUPPORT == 1)
odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8812) {
for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8812A; path_idx++) {
#if (RTL8812A_SUPPORT == 1)
odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, path_idx, 0);
#endif
}
} else if (dm->support_ic_type == ODM_RTL8723B) {
#if (RTL8723B_SUPPORT == 1)
odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8192E) {
for (path_idx = RF_PATH_A; path_idx < MAX_PATH_NUM_8192E; path_idx++) {
#if (RTL8192E_SUPPORT == 1)
odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, path_idx, 0);
#endif
}
} else if (dm->support_ic_type == ODM_RTL8188E) {
#if (RTL8188E_SUPPORT == 1)
odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
#endif
}
#endif
#else
odm_schedule_work_item(&dm->ra_rpt_workitem);
#endif
#endif
}
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void halrf_update_init_rate_work_item_callback(
void *context)
{
void *adapter = (void *)context;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
u8 p = 0;
if (dm->support_ic_type == ODM_RTL8821) {
#if (RTL8821A_SUPPORT == 1)
odm_tx_pwr_track_set_pwr8821a(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8812) {
#if (RTL8812A_SUPPORT == 1)
/*Don't know how to include &c*/
for (p = RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)
odm_tx_pwr_track_set_pwr8812a(dm, MIX_MODE, p, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8723B) {
#if (RTL8723B_SUPPORT == 1)
odm_tx_pwr_track_set_pwr_8723b(dm, MIX_MODE, RF_PATH_A, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8192E) {
#if (RTL8192E_SUPPORT == 1)
/*Don't know how to include &c*/
for (p = RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)
odm_tx_pwr_track_set_pwr92_e(dm, MIX_MODE, p, 0);
#endif
} else if (dm->support_ic_type == ODM_RTL8188E) {
#if (RTL8188E_SUPPORT == 1)
odm_tx_pwr_track_set_pwr88_e(dm, MIX_MODE, RF_PATH_A, 0);
#endif
}
}
#endif
void halrf_set_pwr_track(void *dm_void, u8 enable)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &(dm->rf_table);
struct txpwrtrack_cfg c;
u8 i;
configure_txpower_track(dm, &c);
if (enable) {
rf->rf_supportability = rf->rf_supportability | HAL_RF_TX_PWR_TRACK;
#if !(RTL8723F_SUPPORT == 1)
if (cali_info->txpowertrack_control == 1 || cali_info->txpowertrack_control == 3)
halrf_do_tssi(dm);
#else
halrf_tssi_get_efuse(dm);
halrf_do_tssi(dm);
#endif
} else {
rf->rf_supportability = rf->rf_supportability & ~HAL_RF_TX_PWR_TRACK;
odm_clear_txpowertracking_state(dm);
halrf_do_tssi(dm);
halrf_calculate_tssi_codeword(dm);
halrf_set_tssi_codeword(dm);
//#if !(RTL8723F_SUPPORT == 1)
for (i = 0; i < c.rf_path_count; i++)
(*c.odm_tx_pwr_track_set_pwr)(dm, CLEAN_MODE, i, 0);
//#endif
}
#if (RTL8723F_SUPPORT == 1)
if (dm->mp_mode) {
if (*dm->mp_mode)
/*Re-do dpk when tssi mode is changed*/
halrf_dpk_trigger(dm);
}
#endif
if (cali_info->txpowertrack_control == 2 ||
cali_info->txpowertrack_control == 3 ||
cali_info->txpowertrack_control == 4 ||
cali_info->txpowertrack_control == 5)
halrf_txgapk_reload_tx_gain(dm);
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_POWER_TRACKING_H__
#define __HALRF_POWER_TRACKING_H__
boolean
odm_check_power_status(void *dm_void);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
void halrf_update_pwr_track(void *dm_void, u8 rate);
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void halrf_update_init_rate_work_item_callback(
void *context);
#endif
void halrf_set_pwr_track(void *dm_void, u8 enable);
#endif /*#ifndef __HALRF_POWERTRACKING_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_POWERTRACKING_H__
#define __HALRF_POWERTRACKING_H__
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#ifdef RTK_AC_SUPPORT
#define ODM_IC_11AC_SERIES_SUPPORT 1
#else
#define ODM_IC_11AC_SERIES_SUPPORT 0
#endif
#else
#define ODM_IC_11AC_SERIES_SUPPORT 1
#endif
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 3
#define MAX_RF_PATH 4
#define TXSCALE_TABLE_SIZE 37
#define CCK_TABLE_SIZE_8723D 41
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define AVG_THERMAL_NUM 8
#define AVG_THERMAL_NUM_DPK 8
#define THERMAL_DPK_AVG_NUM 4
#define iqk_matrix_reg_num 8
/* #define IQK_MATRIX_SETTINGS_NUM 1+24+21 */
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#if !defined(_OUTSRC_COEXIST)
#define OFDM_TABLE_SIZE_92D 43
#define OFDM_TABLE_SIZE 37
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_88F 21
#define CCK_TABLE_SIZE_8192F 41
/* #define OFDM_TABLE_SIZE_92E 54 */
/* #define CCK_TABLE_SIZE_92E 54 */
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
#endif
#define ODM_OFDM_TABLE_SIZE 37
#define ODM_CCK_TABLE_SIZE 33
#define TXPWR_TRACK_TABLE_SIZE 30
/* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
/* extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
* extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
* extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */
#ifdef CONFIG_WLAN_HAL_8192EE
#define OFDM_TABLE_SIZE_92E 54
#define CCK_TABLE_SIZE_92E 54
extern u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
extern u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
extern u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8];
#endif
#define OFDM_TABLE_SIZE_8812 43
#define AVG_THERMAL_NUM_8812 4
#if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1 ||\
RTL8821C_SUPPORT == 1 || RTL8198F_SUPPORT == 1 ||\
RTL8814B_SUPPORT == 1)
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
#elif(ODM_IC_11AC_SERIES_SUPPORT)
extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
#endif
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
#define dm_check_txpowertracking odm_txpowertracking_check
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[1][iqk_matrix_reg_num];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
/* u8 is_txpowertracking; */
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
s8 power_index_offset_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
u8 thermal_value_dpk_track;
boolean txpowertracking_in_progress;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset;
s8 delta_power_index;
s8 delta_power_index_path[MAX_RF_PATH];
s8 delta_power_index_last;
s8 delta_power_index_last_path[MAX_RF_PATH];
boolean is_tx_power_changed;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
u8 bb_swing_idx_ofdm_base_path[MAX_RF_PATH];
#endif
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
s8 default_txagc_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
boolean modify_tx_agc_flag_path_b_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u64 iqk_start_time;
u64 iqk_total_progressing_time;
u64 iqk_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
u8 is_dp_done;
#if 0 /*move below members to halrf_dpk.h*/
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u8 is_dp_path_cok;
u8 is_dp_path_dok;
u8 dp_path_a_result[3];
u8 dp_path_b_result[3];
u8 dp_path_c_result[3];
u8 dp_path_d_result[3];
boolean is_dpk_enable;
u32 txrate[11];
u8 pwsf_2g_a[3];
u8 pwsf_2g_b[3];
u8 pwsf_2g_c[3];
u8 pwsf_2g_d[3];
u32 lut_2g_even_a[3][64];
u32 lut_2g_odd_a[3][64];
u32 lut_2g_even_b[3][64];
u32 lut_2g_odd_b[3][64];
u32 lut_2g_even_c[3][64];
u32 lut_2g_odd_c[3][64];
u32 lut_2g_even_d[3][64];
u32 lut_2g_odd_d[3][64];
u1Byte is_5g_pdk_a_ok;
u1Byte is_5g_pdk_b_ok;
u1Byte is_5g_pdk_c_ok;
u1Byte is_5g_pdk_d_ok;
u1Byte pwsf_5g_a[9];
u1Byte pwsf_5g_b[9];
u1Byte pwsf_5g_c[9];
u1Byte pwsf_5g_d[9];
u4Byte lut_5g_even_a[9][16];
u4Byte lut_5g_odd_a[9][16];
u4Byte lut_5g_even_b[9][16];
u4Byte lut_5g_odd_b[9][16];
u4Byte lut_5g_even_c[9][16];
u4Byte lut_5g_odd_c[9][16];
u4Byte lut_5g_even_d[9][16];
u4Byte lut_5g_odd_d[9][16];
u8 thermal_value_dpk;
u8 thermal_value_dpk_avg[AVG_THERMAL_NUM_DPK];
u8 thermal_value_dpk_avg_index;
#endif
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
u32 tx_lok[2];
};
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_ce(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_callback_thermal_meter92c(
void *adapter
);
void
odm_txpowertracking_callback_rx_gain_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_callback_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_direct_call92c(
void *adapter
);
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
/*@===========================================================
* include files
*============================================================
*/
#include "mp_precomp.h"
#include "phydm_precomp.h"
/*@************************************************************
* Global var
* ************************************************************
*/
u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
0x7f8001fe, /* 0, +6.0dB */
0x788001e2, /* 1, +5.5dB */
0x71c001c7, /* 2, +5.0dB*/
0x6b8001ae, /* 3, +4.5dB*/
0x65400195, /* 4, +4.0dB*/
0x5fc0017f, /* 5, +3.5dB*/
0x5a400169, /* 6, +3.0dB*/
0x55400155, /* 7, +2.5dB*/
0x50800142, /* 8, +2.0dB*/
0x4c000130, /* 9, +1.5dB*/
0x47c0011f, /* 10, +1.0dB*/
0x43c0010f, /* 11, +0.5dB*/
0x40000100, /* 12, +0dB*/
0x3c8000f2, /* 13, -0.5dB*/
0x390000e4, /* 14, -1.0dB*/
0x35c000d7, /* 15, -1.5dB*/
0x32c000cb, /* 16, -2.0dB*/
0x300000c0, /* 17, -2.5dB*/
0x2d4000b5, /* 18, -3.0dB*/
0x2ac000ab, /* 19, -3.5dB*/
0x288000a2, /* 20, -4.0dB*/
0x26000098, /* 21, -4.5dB*/
0x24000090, /* 22, -5.0dB*/
0x22000088, /* 23, -5.5dB*/
0x20000080, /* 24, -6.0dB*/
0x1e400079, /* 25, -6.5dB*/
0x1c800072, /* 26, -7.0dB*/
0x1b00006c, /* 27. -7.5dB*/
0x19800066, /* 28, -8.0dB*/
0x18000060, /* 29, -8.5dB*/
0x16c0005b, /* 30, -9.0dB*/
0x15800056, /* 31, -9.5dB*/
0x14400051, /* 32, -10.0dB*/
0x1300004c, /* 33, -10.5dB*/
0x12000048, /* 34, -11.0dB*/
0x11000044, /* 35, -11.5dB*/
0x10000040, /* 36, -12.0dB*/
};
u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0 default*/
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
};
u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0 default*/
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
};
u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
0x0b40002d, /* 0, -15.0dB */
0x0c000030, /* 1, -14.5dB */
0x0cc00033, /* 2, -14.0dB */
0x0d800036, /* 3, -13.5dB */
0x0e400039, /* 4, -13.0dB */
0x0f00003c, /* 5, -12.5dB */
0x10000040, /* 6, -12.0dB */
0x11000044, /* 7, -11.5dB */
0x12000048, /* 8, -11.0dB */
0x1300004c, /* 9, -10.5dB */
0x14400051, /* 10, -10.0dB */
0x15800056, /* 11, -9.5dB */
0x16c0005b, /* 12, -9.0dB */
0x18000060, /* 13, -8.5dB */
0x19800066, /* 14, -8.0dB */
0x1b00006c, /* 15, -7.5dB */
0x1c800072, /* 16, -7.0dB */
0x1e400079, /* 17, -6.5dB */
0x20000080, /* 18, -6.0dB */
0x22000088, /* 19, -5.5dB */
0x24000090, /* 20, -5.0dB */
0x26000098, /* 21, -4.5dB */
0x288000a2, /* 22, -4.0dB */
0x2ac000ab, /* 23, -3.5dB */
0x2d4000b5, /* 24, -3.0dB */
0x300000c0, /* 25, -2.5dB */
0x32c000cb, /* 26, -2.0dB */
0x35c000d7, /* 27, -1.5dB */
0x390000e4, /* 28, -1.0dB */
0x3c8000f2, /* 29, -0.5dB */
0x40000100, /* 30, +0dB */
0x43c0010f, /* 31, +0.5dB */
0x47c0011f, /* 32, +1.0dB */
0x4c000130, /* 33, +1.5dB */
0x50800142, /* 34, +2.0dB */
0x55400155, /* 35, +2.5dB */
0x5a400169, /* 36, +3.0dB */
0x5fc0017f, /* 37, +3.5dB */
0x65400195, /* 38, +4.0dB */
0x6b8001ae, /* 39, +4.5dB */
0x71c001c7, /* 40, +5.0dB */
0x788001e2, /* 41, +5.5dB */
0x7f8001fe /* 42, +6.0dB */
};
u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB*/
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB*/
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB*/
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB*/
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB*/
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB*/
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB*/
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB*/
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB*/
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB*/
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB*/
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB*/
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB*/
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB*/
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB*/
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB*/
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB*/
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB*/
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB*/
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB*/
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB*/
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB*/
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB*/
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB*/
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB*/
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB*/
};
u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB*/
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB*/
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB*/
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB*/
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB*/
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /*5, -13.5dB*/
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB*/
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB*/
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB*/
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB*/
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB*/
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /*11, -10.5dB*/
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB*/
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB*/
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /*14, -9.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB*/
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB*/
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB*/
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /*23, -4.5dB*/
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /*27, -2.5dB*/
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /*29, -1.5dB*/
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */
};
u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
/*@JJ ADD 20161014 */
u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
/*@Winnita ADD 20171116 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263, /*19*/
0x287, /*20*/
0x2AE, /*21*/
0x2D6, /*22*/
0x301, /*23*/
0x32F, /*24*/
0x35F, /*25*/
0x392, /*26*/
0x3C9, /*27*/
0x402, /*28*/
0x43F, /*29*/
0x47F, /*30*/
0x4C3, /*31*/
0x50C, /*32*/
0x558, /*33*/
0x5A9, /*34*/
0x5FF, /*35*/
0x65A, /*36*/
0x6BA,
0x720,
0x78C,
0x7FF,
};
u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
0x081, /* 0, -12.0dB*/
0x088, /* 1, -11.5dB*/
0x090, /* 2, -11.0dB*/
0x099, /* 3, -10.5dB*/
0x0A2, /* 4, -10.0dB*/
0x0AC, /* 5, -9.5dB*/
0x0B6, /* 6, -9.0dB*/
0x0C0, /*7, -8.5dB*/
0x0CC, /* 8, -8.0dB*/
0x0D8, /* 9, -7.5dB*/
0x0E5, /* 10, -7.0dB*/
0x0F2, /* 11, -6.5dB*/
0x101, /* 12, -6.0dB*/
0x110, /* 13, -5.5dB*/
0x120, /* 14, -5.0dB*/
0x131, /* 15, -4.5dB*/
0x143, /* 16, -4.0dB*/
0x156, /* 17, -3.5dB*/
0x16A, /* 18, -3.0dB*/
0x180, /* 19, -2.5dB*/
0x197, /* 20, -2.0dB*/
0x1AF, /* 21, -1.5dB*/
0x1C8, /* 22, -1.0dB*/
0x1E3, /* 23, -0.5dB*/
0x200, /* 24, +0 dB*/
0x21E, /* 25, +0.5dB*/
0x23E, /* 26, +1.0dB*/
0x261, /* 27, +1.5dB*/
0x285, /* 28, +2.0dB*/
0x2AB, /* 29, +2.5dB*/
0x2D3, /*30, +3.0dB*/
0x2FE, /* 31, +3.5dB*/
0x32B, /* 32, +4.0dB*/
0x35C, /* 33, +4.5dB*/
0x38E, /* 34, +5.0dB*/
0x3C4, /* 35, +5.5dB*/
0x3FE /* 36, +6.0dB */
};
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3,
4, 4, 4, 4, 4, 4, 4, 4, 5, 5,
7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4,
4, 5, 5, 6, 6, 7, 7, 7, 7, 8,
8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
#endif
void odm_txpowertracking_init(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
odm_txpowertracking_thermal_meter_init(dm);
}
u8 get_swing_index(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
#endif
u8 i = 0;
u32 bb_swing, table_value;
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
ODM_RTL8188F | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8710B)) {
bb_swing = odm_get_bb_reg(dm, R_0xc80, 0xFFC00000);
for (i = 0; i < OFDM_TABLE_SIZE; i++) {
table_value = ofdm_swing_table_new[i];
if (table_value >= 0x100000)
table_value >>= 22;
if (bb_swing == table_value)
break;
}
} else {
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
bb_swing =
phy_get_tx_bb_swing_8812a(adapter,
hal_data->current_band_type,
RF_PATH_A);
#else
bb_swing = odm_get_bb_reg(dm, R_0xc1c, 0xFFE00000);
#endif
for (i = 0; i < TXSCALE_TABLE_SIZE; i++) {
table_value = tx_scaling_table_jaguar[i];
if (bb_swing == table_value)
break;
}
}
return i;
}
u8 get_cck_swing_index(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_cck_swing;
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E)) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
break;
}
} else if (dm->support_ic_type & ODM_RTL8703B) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
break;
}
}
return i;
}
s8
get_txagc_default_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
s8 tmp;
if (dm->support_ic_type == ODM_RTL8814B) {
tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
if (tmp & BIT(6))
tmp = tmp | 0x80;
return tmp;
} else
return 0;
}
void odm_txpowertracking_thermal_meter_init(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct dm_rf_calibration_struct *cali_info = &dm->rf_calibrate_info;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
u8 swing_idx = get_swing_index(dm);
u8 cckswing_idx = get_cck_swing_index(dm);
u8 p = 0;
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
if (!(*dm->mp_mode))
cali_info->txpowertrack_control = true;
else
cali_info->txpowertrack_control = false;
if (!(*dm->mp_mode))
cali_info->txpowertrack_control = true;
RF_DBG(dm, DBG_RF_IQK, "dm txpowertrack_control = %d\n",
cali_info->txpowertrack_control);
#if 0
/* dm->rf_calibrate_info.txpowertrack_control = true; */
#endif
cali_info->thermal_value = rf->eeprom_thermal;
cali_info->thermal_value_iqk = rf->eeprom_thermal;
cali_info->thermal_value_lck = rf->eeprom_thermal;
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
if (dm->support_ic_type == ODM_RTL8822C ||
dm->support_ic_type == ODM_RTL8723F) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
if (dm->support_ic_type == ODM_RTL8814B) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C];
cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
#endif
if (!cali_info->default_bb_swing_index_flag) {
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8723B | ODM_RTL8192E |
ODM_RTL8703B | ODM_RTL8821)) {
if (swing_idx >= OFDM_TABLE_SIZE)
cali_info->default_ofdm_index = 30;
else
cali_info->default_ofdm_index = swing_idx;
if (cckswing_idx >= CCK_TABLE_SIZE)
cali_info->default_cck_index = 20;
else
cali_info->default_cck_index = cckswing_idx;
/*@add by Mingzhi.Guo 2015-03-23*/
} else if (dm->support_ic_type == ODM_RTL8188F) {
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 20; /*CCK:-6dB*/
/*@add by zhaohe 2015-10-27*/
} else if (dm->support_ic_type == ODM_RTL8723D) {
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
/*@JJ ADD 20161014 */
} else if (dm->support_ic_type == ODM_RTL8710B) {
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else if (dm->support_ic_type == ODM_RTL8192F) {
cali_info->default_ofdm_index = 30;/*OFDM: 0dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else {
if (swing_idx >= TXSCALE_TABLE_SIZE)
cali_info->default_ofdm_index = 24;
else
cali_info->default_ofdm_index = swing_idx;
cali_info->default_txagc_index = get_txagc_default_index(dm);
cali_info->default_cck_index = 24;
}
cali_info->default_bb_swing_index_flag = true;
}
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->CCK_index = cali_info->default_cck_index;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] =
cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->power_index_offset[p] = 0;
}
cali_info->modify_tx_agc_value_ofdm = 0;
cali_info->modify_tx_agc_value_cck = 0;
cali_info->tm_trigger = 0;
}
void odm_txpowertracking_check(void *dm_void)
{
/*@2011/09/29 MH In HW integration first stage
* we provide 4 different handle to operate at the same time.
* In the stage2/3, we need to prive universal interface and merge all
* HW dynamic mechanism.
*/
struct dm_struct *dm = (struct dm_struct *)dm_void;
switch (dm->support_platform) {
case ODM_WIN:
odm_txpowertracking_check_mp(dm);
break;
case ODM_CE:
odm_txpowertracking_check_ce(dm);
break;
case ODM_AP:
odm_txpowertracking_check_ap(dm);
break;
default:
break;
}
}
void odm_txpowertracking_check_ce(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
#if (RTL8723F_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8723F) {
/*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF][TSSI] Pwrtrack return!\n");*/
return;
}
#endif
if ((rf->power_track_type & 0xf0) >> 4 != 0) {
if (dm->support_ic_type & ODM_RTL8822C) {
/*halrf_tssi_cck(dm);*/
/*halrf_thermal_cck(dm);*/
return;
}
}
if (!dm->rf_calibrate_info.tm_trigger) {
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
ODM_RTL8192F))
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW,
(BIT(17) | BIT(16)), 0x03);
else if (dm->support_ic_type & ODM_RTL8822C) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else if (dm->support_ic_type & ODM_RTL8814B) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
} else
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD,
RFREGOFFSETMASK, 0x60);
#if (RTL8814B_SUPPORT == 1)
if (dm->support_ic_type & ODM_RTL8814B) {
ODM_delay_us(300);
odm_txpowertracking_new_callback_thermal_meter(dm);
tssi->thermal_trigger = 1;
}
#endif
dm->rf_calibrate_info.tm_trigger = 1;
return;
}
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
if (dm->support_ic_type & ODM_RTL8814B)
tssi->thermal_trigger = 0;
#endif
} else
odm_txpowertracking_callback_thermal_meter(dm);
dm->rf_calibrate_info.tm_trigger = 0;
#endif
}
void
odm_txpowertracking_direct_ce(void *dm_void)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &dm->rf_table;
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if (dm->support_ic_type & ODM_RTL8723F) {
#if (RTL8723F_SUPPORT == 1)
/*RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF]===>%s 8723F TSSI, return!\n", __func__);*/
return;
#endif
}
if (dm->support_ic_type & ODM_RTL8822C) {
/*halrf_tssi_cck(dm);*/
/*halrf_thermal_cck(dm);*/
return;
}
if (dm->support_ic_type &
(ODM_RTL8188E | ODM_RTL8188F | ODM_RTL8192E |
ODM_RTL8723B | ODM_RTL8812 | ODM_RTL8821 |
ODM_RTL8814A | ODM_RTL8703B | ODM_RTL8723D |
ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8710B |
ODM_RTL8192F | ODM_RTL8814B))
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_NEW, (BIT(17) | BIT(16)), 0x03);
else if (dm->support_ic_type & ODM_RTL8822C) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER_OLD, RFREGOFFSETMASK, 0x60);
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
#endif
} else
odm_txpowertracking_callback_thermal_meter(dm);
#endif
}
void odm_txpowertracking_check_mp(void *dm_void)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
struct dm_struct *dm = (struct dm_struct *)dm_void;
void *adapter = dm->adapter;
if (odm_check_power_status(adapter) == false) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
("check_pow_status, return false\n"));
return;
}
odm_txpowertracking_thermal_meter_check(adapter);
#endif
}
void odm_txpowertracking_check_ap(void *dm_void)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct rtl8192cd_priv *priv = dm->priv;
return;
#endif
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_POWERTRACKING_H__
#define __HALRF_POWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_88F 21
#define TXSCALE_TABLE_SIZE 37
#define CCK_TABLE_SIZE_8723D 41
/*@JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define CCK_TABLE_SIZE_8192F 41
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 4
#define AVG_THERMAL_NUM 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define iqk_matrix_reg_num 8
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
/* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#define IQK_MATRIX_SETTINGS_NUM (14 + 24 + 21)
#endif
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/*@JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
/*@<20121018, Kordan> In case fail to read TxPowerTrack.txt */
/* we use the table of 88E as the default table. */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
extern u8 delta_swing_table_idx_2ga_p_8188e[];
extern u8 delta_swing_table_idx_2ga_n_8188e[];
#endif
#define dm_check_txpowertracking odm_txpowertracking_check
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[3][iqk_matrix_reg_num];
boolean is_bw_iqk_result_saved[3];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
/* for mp mode, turn off txpwrtracking as default */
u8 txpowertrack_control;
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
/* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_meter[2];
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
u8 thermal_value_dpk_track;
boolean txpowertracking_in_progress;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
/*@---------------------- Tx power Tracking ---------------------- */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset[MAX_RF_PATH];
s8 delta_power_index[MAX_RF_PATH];
s8 delta_power_index_last[MAX_RF_PATH];
boolean is_tx_power_changed;
s8 xtal_offset;
s8 xtal_offset_last;
u8 xtal_offset_eanble;
struct iqk_matrix_regs_setting
iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean default_bb_swing_index_flag;
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
s8 default_txagc_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
boolean modify_tx_agc_flag_path_b_cck;
s8 kfree_offset[MAX_RF_PATH];
/*@----------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 tx_iqc_8723b[2][3][2];
/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 rx_iqc_8723b[2][2][2];
/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 tx_iqc_8703b[3][2];
/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 rx_iqc_8703b[2][2];
/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 tx_iqc_8723d[2][3][2];
/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 rx_iqc_8723d[2][2][2];
/* JJ ADD 20161014 */
/* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 tx_iqc_8710b[2][3][2];
/* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 rx_iqc_8710b[2][2][2];
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/*@<James> IQK time measurement */
u64 iqk_start_time;
u64 iqk_progressing_time;
u64 iqk_total_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
/* DPK */
boolean is_dpk_fail;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u32 tx_lok[2];
u32 dpk_tx_agc;
s32 dpk_gain;
u32 dpk_thermal[4];
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*@Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
};
void odm_txpowertracking_check(void *dm_void);
void odm_txpowertracking_init(void *dm_void);
void odm_txpowertracking_check_ap(void *dm_void);
void odm_txpowertracking_thermal_meter_init(void *dm_void);
void odm_txpowertracking_init(void *dm_void);
void odm_txpowertracking_check_mp(void *dm_void);
void odm_txpowertracking_check_ce(void *dm_void);
void odm_txpowertracking_direct_ce(void *dm_void);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void odm_txpowertracking_callback_thermal_meter92c(
void *adapter);
void odm_txpowertracking_callback_rx_gain_thermal_meter92d(
void *adapter);
void odm_txpowertracking_callback_thermal_meter92d(
void *adapter);
void odm_txpowertracking_direct_call92c(
void *adapter);
void odm_txpowertracking_thermal_meter_check(
void *adapter);
#endif
#endif /*__HALRF_POWER_TRACKING_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_POWERTRACKING_H__
#define __HALRF_POWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_88F 21
#define TXSCALE_TABLE_SIZE 37
#define CCK_TABLE_SIZE_8723D 41
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define CCK_TABLE_SIZE_8192F 41
#define CCK_TABLE_SIZE_8721D 41
#define CCK_TABLE_SIZE_8710C 41
#define CCK_03DB_TABLE_SIZE_8710C 81
#define OFDM_03DB_TABLE_SIZE_8710C 81
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 4
#define AVG_THERMAL_NUM 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM_MAX 10
#define IQK_BB_REG_NUM 9
#define iqk_matrix_reg_num 8
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#endif
extern const u32 ofdm_swing_table[OFDM_TABLE_SIZE];
extern const u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern const u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern const u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
extern const u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern const u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern const u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern const u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern const u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern const u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern const u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern const u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
extern const u32 cck_swing_table_ch1_ch14_8721d[CCK_TABLE_SIZE_8721D];
extern const u32 cck_swing_table_ch1_ch14_8710c[CCK_TABLE_SIZE_8710C];
extern const u32 cck_swing_table_03db_ch1_ch14_8710c[CCK_03DB_TABLE_SIZE_8710C];
extern const u32 ofdm_swing_table_03DB_8710c[OFDM_03DB_TABLE_SIZE_8710C];
extern const u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211)
#else
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
#endif
void
odm_txpowertracking_init(
void *dm_void
);
#define dm_check_txpowertracking odm_txpowertracking_check
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[3][iqk_matrix_reg_num];
boolean is_bw_iqk_result_saved[3];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_lck;
u8 thermal_value_iqk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_dpk;
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_rx_gain;
u8 thermal_value_crystal;
u8 thermal_value_dpk_store;
u8 thermal_value_dpk_track;
boolean txpowertracking_in_progress;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
/* ------------------------- Tx power Tracking ------------------------- */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset[MAX_RF_PATH];
s8 delta_power_index[MAX_RF_PATH];
s8 delta_power_index_last[MAX_RF_PATH];
boolean is_tx_power_changed;
s8 xtal_offset;
s8 xtal_offset_last;
#if (RTL8710B_SUPPORT == 1 || RTL8721D_SUPPORT == 1)
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
#endif
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
#endif
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
#endif
#if (RTL8195B_SUPPORT == 1)
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
#endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
#endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
#endif
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE | ODM_IOT))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean default_bb_swing_index_flag;
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
s8 default_txagc_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
boolean modify_tx_agc_flag_path_b_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
#if !(DM_ODM_SUPPORT_TYPE & ODM_IOT)
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
#endif
/* JJ ADD 20161014 */
u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* <James> IQK time measurement */
u32 iqk_start_time;
u32 iqk_progressing_time;
u32 iqk_total_progressing_time;
u32 lck_progressing_time;
u32 lok_result;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
/* DPK */
boolean is_dpk_fail;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u32 tx_lok[2];
u32 dpk_tx_agc;
s32 dpk_gain;
u32 dpk_thermal[4];
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
};
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_iot(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_callback_thermal_meter92c(
void *adapter
);
void
odm_txpowertracking_callback_rx_gain_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_callback_thermal_meter92d(
void *adapter
);
void
odm_txpowertracking_direct_call92c(
void *adapter
);
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/

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hal/phydm/halrf/halrf_powertracking_win.c Normal file
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@ -0,0 +1,936 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*============================================================ */
/* include files */
/*============================================================ */
#include "mp_precomp.h"
#include "phydm_precomp.h"
/* ************************************************************
* Global var
* ************************************************************ */
u32 ofdm_swing_table[OFDM_TABLE_SIZE] = {
0x7f8001fe, /* 0, +6.0dB */
0x788001e2, /* 1, +5.5dB */
0x71c001c7, /* 2, +5.0dB */
0x6b8001ae, /* 3, +4.5dB */
0x65400195, /* 4, +4.0dB */
0x5fc0017f, /* 5, +3.5dB */
0x5a400169, /* 6, +3.0dB */
0x55400155, /* 7, +2.5dB */
0x50800142, /* 8, +2.0dB */
0x4c000130, /* 9, +1.5dB */
0x47c0011f, /* 10, +1.0dB */
0x43c0010f, /* 11, +0.5dB */
0x40000100, /* 12, +0dB */
0x3c8000f2, /* 13, -0.5dB */
0x390000e4, /* 14, -1.0dB */
0x35c000d7, /* 15, -1.5dB */
0x32c000cb, /* 16, -2.0dB */
0x300000c0, /* 17, -2.5dB */
0x2d4000b5, /* 18, -3.0dB */
0x2ac000ab, /* 19, -3.5dB */
0x288000a2, /* 20, -4.0dB */
0x26000098, /* 21, -4.5dB */
0x24000090, /* 22, -5.0dB */
0x22000088, /* 23, -5.5dB */
0x20000080, /* 24, -6.0dB */
0x1e400079, /* 25, -6.5dB */
0x1c800072, /* 26, -7.0dB */
0x1b00006c, /* 27. -7.5dB */
0x19800066, /* 28, -8.0dB */
0x18000060, /* 29, -8.5dB */
0x16c0005b, /* 30, -9.0dB */
0x15800056, /* 31, -9.5dB */
0x14400051, /* 32, -10.0dB */
0x1300004c, /* 33, -10.5dB */
0x12000048, /* 34, -11.0dB */
0x11000044, /* 35, -11.5dB */
0x10000040, /* 36, -12.0dB */
};
u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB <== default */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
};
u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8] = {
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB <== default */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
};
u32 ofdm_swing_table_new[OFDM_TABLE_SIZE] = {
0x0b40002d, /* 0, -15.0dB */
0x0c000030, /* 1, -14.5dB */
0x0cc00033, /* 2, -14.0dB */
0x0d800036, /* 3, -13.5dB */
0x0e400039, /* 4, -13.0dB */
0x0f00003c, /* 5, -12.5dB */
0x10000040, /* 6, -12.0dB */
0x11000044, /* 7, -11.5dB */
0x12000048, /* 8, -11.0dB */
0x1300004c, /* 9, -10.5dB */
0x14400051, /* 10, -10.0dB */
0x15800056, /* 11, -9.5dB */
0x16c0005b, /* 12, -9.0dB */
0x18000060, /* 13, -8.5dB */
0x19800066, /* 14, -8.0dB */
0x1b00006c, /* 15, -7.5dB */
0x1c800072, /* 16, -7.0dB */
0x1e400079, /* 17, -6.5dB */
0x20000080, /* 18, -6.0dB */
0x22000088, /* 19, -5.5dB */
0x24000090, /* 20, -5.0dB */
0x26000098, /* 21, -4.5dB */
0x288000a2, /* 22, -4.0dB */
0x2ac000ab, /* 23, -3.5dB */
0x2d4000b5, /* 24, -3.0dB */
0x300000c0, /* 25, -2.5dB */
0x32c000cb, /* 26, -2.0dB */
0x35c000d7, /* 27, -1.5dB */
0x390000e4, /* 28, -1.0dB */
0x3c8000f2, /* 29, -0.5dB */
0x40000100, /* 30, +0dB */
0x43c0010f, /* 31, +0.5dB */
0x47c0011f, /* 32, +1.0dB */
0x4c000130, /* 33, +1.5dB */
0x50800142, /* 34, +2.0dB */
0x55400155, /* 35, +2.5dB */
0x5a400169, /* 36, +3.0dB */
0x5fc0017f, /* 37, +3.5dB */
0x65400195, /* 38, +4.0dB */
0x6b8001ae, /* 39, +4.5dB */
0x71c001c7, /* 40, +5.0dB */
0x788001e2, /* 41, +5.5dB */
0x7f8001fe /* 42, +6.0dB */
};
u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x33, 0x28, 0x1C, 0x13, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x36, 0x2A, 0x1E, 0x14, 0x0B, 0x05, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x39, 0x2C, 0x20, 0x15, 0x0C, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x3C, 0x2F, 0x22, 0x16, 0x0D, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x40, 0x32, 0x24, 0x17, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x43, 0x35, 0x26, 0x19, 0x0E, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x47, 0x38, 0x28, 0x1A, 0x0F, 0x07, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x4C, 0x3B, 0x2B, 0x1C, 0x10, 0x08, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x50, 0x3F, 0x2D, 0x1E, 0x11, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x55, 0x42, 0x30, 0x1F, 0x12, 0x08, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x5A, 0x46, 0x33, 0x21, 0x13, 0x09, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x5F, 0x4A, 0x36, 0x23, 0x14, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x65, 0x4F, 0x39, 0x25, 0x15, 0x0A, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x6B, 0x54, 0x3C, 0x27, 0x17, 0x0B, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x71, 0x58, 0x40, 0x2A, 0x18, 0x0B, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x78, 0x5E, 0x43, 0x2C, 0x19, 0x0C, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x7F, 0x63, 0x47, 0x2F, 0x1B, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x87, 0x69, 0x4C, 0x32, 0x1D, 0x0D, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x8F, 0x6F, 0x50, 0x35, 0x1E, 0x0E, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x97, 0x76, 0x55, 0x38, 0x20, 0x0F, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0xA0, 0x7D, 0x5A, 0x3B, 0x22, 0x10, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16] = {
{0x44, 0x42, 0x3C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-16dB*/
{0x48, 0x46, 0x3F, 0x2A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15.5dB*/
{0x4D, 0x4A, 0x43, 0x2C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-15dB*/
{0x51, 0x4F, 0x47, 0x2F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14.5dB*/
{0x56, 0x53, 0x4B, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-14dB*/
{0x5B, 0x58, 0x50, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13.5dB*/
{0x60, 0x5D, 0x54, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-13dB*/
{0x66, 0x63, 0x59, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12.5dB*/
{0x6C, 0x69, 0x5F, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-12dB*/
{0x73, 0x6F, 0x64, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11.5dB*/
{0x79, 0x76, 0x6A, 0x46, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-11dB*/
{0x81, 0x7C, 0x71, 0x4A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10.5dB*/
{0x88, 0x84, 0x77, 0x4F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-10dB*/
{0x90, 0x8C, 0x7E, 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9.5dB*/
{0x99, 0x94, 0x86, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-9dB*/
{0xA2, 0x9D, 0x8E, 0x5E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8.5dB*/
{0xAC, 0xA6, 0x96, 0x63, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-8dB*/
{0xB6, 0xB0, 0x9F, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7.5dB*/
{0xC1, 0xBA, 0xA8, 0x6F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-7dB*/
{0xCC, 0xC5, 0xB2, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*-6.5dB*/
{0xD8, 0xD1, 0xBD, 0x7D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} /*-6dB*/
};
u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}, /* 0, -16.0dB */
{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 1, -15.5dB */
{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 2, -15.0dB */
{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 3, -14.5dB */
{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 4, -14.0dB */
{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 5, -13.5dB */
{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 6, -13.0dB */
{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 7, -12.5dB */
{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 8, -12.0dB */
{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 9, -11.5dB */
{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 10, -11.0dB */
{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 11, -10.5dB */
{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 12, -10.0dB */
{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 13, -9.5dB */
{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 15, -8.5dB */
{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 17, -7.5dB */
{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 21, -5.5dB */
{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 23, -4.5dB */
{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 26, -3.0dB */
{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 27, -2.5dB */
{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 29, -1.5dB */
{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04} /* 32, +0dB */
};
u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8] = {
{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}, /* 0, -16.0dB */
{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 1, -15.5dB */
{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 2, -15.0dB */
{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 3, -14.5dB */
{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 4, -14.0dB */
{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 5, -13.5dB */
{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 6, -13.0dB */
{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 7, -12.5dB */
{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 8, -12.0dB */
{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 9, -11.5dB */
{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 10, -11.0dB */
{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 11, -10.5dB */
{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 12, -10.0dB */
{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 13, -9.5dB */
{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 14, -9.0dB */
{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 15, -8.5dB */
{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 17, -7.5dB */
{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 18, -7.0dB */
{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 19, -6.5dB */
{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 20, -6.0dB */
{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 21, -5.5dB */
{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 22, -5.0dB */
{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 23, -4.5dB */
{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 24, -4.0dB */
{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 25, -3.5dB */
{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 26, -3.0dB */
{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 27, -2.5dB */
{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 28, -2.0dB */
{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 29, -1.5dB */
{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 30, -1.0dB */
{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 31, -0.5dB */
{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00} /* 32, +0dB */
};
u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D] = {
0x0CD,
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263,
0x287,
0x2AE,
0x2D6,
0x301,
0x32F,
0x35F,
0x392,
0x3C9,
0x402,
0x43F,
0x47F,
0x4C3,
0x50C,
0x558,
0x5A9,
0x5FF,
0x65A,
0x6BA,
0x720,
0x78C,
0x7FF,
};
/* JJ ADD 20161014 */
u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263, /*19*/
0x287, /*20*/
0x2AE, /*21*/
0x2D6, /*22*/
0x301, /*23*/
0x32F, /*24*/
0x35F, /*25*/
0x392, /*26*/
0x3C9, /*27*/
0x402, /*28*/
0x43F, /*29*/
0x47F, /*30*/
0x4C3, /*31*/
0x50C, /*32*/
0x558, /*33*/
0x5A9, /*34*/
0x5FF, /*35*/
0x65A, /*36*/
0x6BA,
0x720,
0x78C,
0x7FF,
};
/* Winnita ADD 20170828 PathA 0xAB4[10:0],PathB 0xAB4[21:11]*/
u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F] = {
0x0CD, /*0 , -20dB*/
0x0D9,
0x0E6,
0x0F3,
0x102,
0x111,
0x121,
0x132,
0x144,
0x158,
0x16C,
0x182,
0x198,
0x1B1,
0x1CA,
0x1E5,
0x202,
0x221,
0x241,
0x263, /*19*/
0x287, /*20*/
0x2AE, /*21*/
0x2D6, /*22*/
0x301, /*23*/
0x32F, /*24*/
0x35F, /*25*/
0x392, /*26*/
0x3C9, /*27*/
0x402, /*28*/
0x43F, /*29*/
0x47F, /*30*/
0x4C3, /*31*/
0x50C, /*32*/
0x558, /*33*/
0x5A9, /*34*/
0x5FF, /*35*/
0x65A, /*36*/
0x6BA,
0x720,
0x78C,
0x7FF,
};
u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE] = {
0x081, /* 0, -12.0dB */
0x088, /* 1, -11.5dB */
0x090, /* 2, -11.0dB */
0x099, /* 3, -10.5dB */
0x0A2, /* 4, -10.0dB */
0x0AC, /* 5, -9.5dB */
0x0B6, /* 6, -9.0dB */
0x0C0, /* 7, -8.5dB */
0x0CC, /* 8, -8.0dB */
0x0D8, /* 9, -7.5dB */
0x0E5, /* 10, -7.0dB */
0x0F2, /* 11, -6.5dB */
0x101, /* 12, -6.0dB */
0x110, /* 13, -5.5dB */
0x120, /* 14, -5.0dB */
0x131, /* 15, -4.5dB */
0x143, /* 16, -4.0dB */
0x156, /* 17, -3.5dB */
0x16A, /* 18, -3.0dB */
0x180, /* 19, -2.5dB */
0x197, /* 20, -2.0dB */
0x1AF, /* 21, -1.5dB */
0x1C8, /* 22, -1.0dB */
0x1E3, /* 23, -0.5dB */
0x200, /* 24, +0 dB */
0x21E, /* 25, +0.5dB */
0x23E, /* 26, +1.0dB */
0x261, /* 27, +1.5dB */
0x285, /* 28, +2.0dB */
0x2AB, /* 29, +2.5dB */
0x2D3, /* 30, +3.0dB */
0x2FE, /* 31, +3.5dB */
0x32B, /* 32, +4.0dB */
0x35C, /* 33, +4.5dB */
0x38E, /* 34, +5.0dB */
0x3C4, /* 35, +5.5dB */
0x3FE /* 36, +6.0dB */
};
void
odm_txpowertracking_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (!(dm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
return;
#endif
odm_txpowertracking_thermal_meter_init(dm);
}
u8
get_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
u8 i = 0;
u32 bb_swing, table_value;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F ||
dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D ||
dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B) {
bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000);
for (i = 0; i < OFDM_TABLE_SIZE; i++) {
table_value = ofdm_swing_table_new[i];
if (table_value >= 0x100000)
table_value >>= 22;
if (bb_swing == table_value)
break;
}
} else {
bb_swing = PHY_GetTxBBSwing_8812A(adapter, hal_data->CurrentBandType, RF_PATH_A);
for (i = 0; i < TXSCALE_TABLE_SIZE; i++) {
table_value = tx_scaling_table_jaguar[i];
if (bb_swing == table_value)
break;
}
}
return i;
}
u8
get_cck_swing_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 i = 0;
u32 bb_cck_swing;
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch13_new[i][0])
break;
}
} else if (dm->support_ic_type == ODM_RTL8703B) {
bb_cck_swing = odm_read_1byte(dm, 0xa22);
for (i = 0; i < CCK_TABLE_SIZE_88F; i++) {
if (bb_cck_swing == cck_swing_table_ch1_ch14_88f[i][0])
break;
}
}
return i;
}
s8
get_txagc_default_index(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
s8 tmp;
if (dm->support_ic_type == ODM_RTL8814B) {
tmp = (s8)(odm_get_bb_reg(dm, R_0x18a0, 0x7f) & 0xff);
if (tmp & BIT(6))
tmp = tmp | 0x80;
return tmp;
} else
return 0;
}
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 default_swing_index = get_swing_index(dm);
u8 default_cck_swing_index = get_cck_swing_index(dm);
struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info);
struct _hal_rf_ *rf = &dm->rf_table;
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
u8 p = 0;
if (*(dm->mp_mode) == false)
cali_info->txpowertrack_control = true;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#ifdef CONFIG_RTL8188E
{
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
if (*(dm->mp_mode) == false)
cali_info->txpowertrack_control = true;
MSG_8192C("dm txpowertrack_control = %d\n", cali_info->txpowertrack_control);
}
#else
{
void *adapter = dm->adapter;
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_priv *pdmpriv = &hal_data->dmpriv;
pdmpriv->is_txpowertracking = true;
pdmpriv->tx_powercount = 0;
pdmpriv->is_txpowertracking_init = false;
if (*(dm->mp_mode) == false)
pdmpriv->txpowertrack_control = true;
MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
}
#endif
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#ifdef RTL8188E_SUPPORT
{
cali_info->is_txpowertracking = true;
cali_info->tx_powercount = 0;
cali_info->is_txpowertracking_init = false;
cali_info->txpowertrack_control = true;
}
#endif
#endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
#if (MP_DRIVER == 1)
cali_info->txpowertrack_control = false;
#else
cali_info->txpowertrack_control = true;
#endif
#else
cali_info->txpowertrack_control = true;
#endif
cali_info->thermal_value = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_iqk = hal_data->eeprom_thermal_meter;
cali_info->thermal_value_lck = hal_data->eeprom_thermal_meter;
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1 || RTL8723F_SUPPORT == 1)
if (dm->support_ic_type == ODM_RTL8822C ||
dm->support_ic_type == ODM_RTL8723F) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
if (dm->support_ic_type == ODM_RTL8814B) {
cali_info->thermal_value_path[RF_PATH_A] = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_path[RF_PATH_B] = tssi->thermal[RF_PATH_B];
cali_info->thermal_value_path[RF_PATH_C] = tssi->thermal[RF_PATH_C];
cali_info->thermal_value_path[RF_PATH_D] = tssi->thermal[RF_PATH_D];
cali_info->thermal_value_iqk = tssi->thermal[RF_PATH_A];
cali_info->thermal_value_lck = tssi->thermal[RF_PATH_A];
}
#endif
if (cali_info->default_bb_swing_index_flag != true) {
/*The index of "0 dB" in SwingTable.*/
if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B ||
dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8703B) {
cali_info->default_ofdm_index = (default_swing_index >= OFDM_TABLE_SIZE) ? 30 : default_swing_index;
cali_info->default_cck_index = (default_cck_swing_index >= CCK_TABLE_SIZE) ? 20 : default_cck_swing_index;
} else if (dm->support_ic_type == ODM_RTL8188F) { /*add by Mingzhi.Guo 2015-03-23*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 20; /*CCK:-6dB*/
} else if (dm->support_ic_type == ODM_RTL8723D) { /*add by zhaohe 2015-10-27*/
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
/* JJ ADD 20161014 */
} else if (dm->support_ic_type == ODM_RTL8710B) {
cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
/*Winnita add 20170828*/
} else if (dm->support_ic_type == ODM_RTL8192F) {
cali_info->default_ofdm_index = 30; /*OFDM: 0dB*/
cali_info->default_cck_index = 28; /*CCK: -6dB*/
} else {
cali_info->default_ofdm_index = (default_swing_index >= TXSCALE_TABLE_SIZE) ? 24 : default_swing_index;
cali_info->default_cck_index = 24;
cali_info->default_txagc_index = get_txagc_default_index(dm);
}
cali_info->default_bb_swing_index_flag = true;
}
cali_info->bb_swing_idx_cck_base = cali_info->default_cck_index;
cali_info->CCK_index = cali_info->default_cck_index;
for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
cali_info->bb_swing_idx_ofdm_base[p] = cali_info->default_ofdm_index;
cali_info->OFDM_index[p] = cali_info->default_ofdm_index;
cali_info->delta_power_index[p] = 0;
cali_info->delta_power_index_last[p] = 0;
cali_info->power_index_offset[p] = 0;
cali_info->kfree_offset[p] = 0;
}
cali_info->modify_tx_agc_value_ofdm = 0;
cali_info->modify_tx_agc_value_cck = 0;
cali_info->tm_trigger = 0;
}
void
odm_txpowertracking_check(
void *dm_void
)
{
#if 0
/* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
/* at the same time. In the stage2/3, we need to prive universal interface and merge all */
/* HW dynamic mechanism. */
#endif
struct dm_struct *dm = (struct dm_struct *)dm_void;
switch (dm->support_platform) {
case ODM_WIN:
odm_txpowertracking_check_mp(dm);
break;
case ODM_CE:
odm_txpowertracking_check_ce(dm);
break;
case ODM_AP:
odm_txpowertracking_check_ap(dm);
break;
default:
break;
}
}
void
odm_txpowertracking_check_ce(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
void *adapter = dm->adapter;
#if ((RTL8188F_SUPPORT == 1))
rtl8192c_odm_check_txpowertracking(adapter);
#endif
#if (RTL8188E_SUPPORT == 1)
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK))
return;
if (!cali_info->tm_trigger) {
odm_set_rf_reg(dm, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
/*DBG_8192C("Trigger 92C Thermal Meter!!\n");*/
cali_info->tm_trigger = 1;
return;
} else {
/*DBG_8192C("Schedule TxPowerTracking direct call!!\n");*/
odm_txpowertracking_callback_thermal_meter_8188e(adapter);
cali_info->tm_trigger = 0;
}
#endif
#endif
}
void
odm_txpowertracking_check_mp(
void *dm_void
)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void *adapter = dm->adapter;
if (*dm->is_fcs_mode_enable)
return;
if (odm_check_power_status(dm) == false) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("check_pow_status return false\n"));
return;
}
if (IS_HARDWARE_TYPE_8821B(adapter)) /* TODO: Don't Do PowerTracking*/
return;
odm_txpowertracking_thermal_meter_check(adapter);
#endif
}
void
odm_txpowertracking_check_ap(
void *dm_void
)
{
return;
}
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
void
odm_txpowertracking_direct_call(
void *adapter
)
{
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &hal_data->DM_OutSrc;
if (dm->support_ic_type & ODM_RTL8723F) {
#if (RTL8723F_SUPPORT == 1)
RF_DBG(dm, DBG_RF_TX_PWR_TRACK, "[RF]===>%s 8723F TSSI, return!\n", __func__);
return;
#endif
}
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) {
#if (RTL8822C_SUPPORT == 1 || RTL8814B_SUPPORT == 1)
odm_txpowertracking_new_callback_thermal_meter(dm);
#endif
} else
odm_txpowertracking_callback_thermal_meter(adapter);
}
void
odm_txpowertracking_thermal_meter_check(
void *adapter
)
{
static u8 tm_trigger = 0;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(((PADAPTER)adapter));
struct dm_struct *dm = &(pHalData->DM_OutSrc);
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_tssi_data *tssi = &rf->halrf_tssi_data;
if (!(rf->rf_supportability & HAL_RF_TX_PWR_TRACK)) {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
("===>odm_txpowertracking_thermal_meter_check(),mgnt_info->is_txpowertracking is false, return!!\n"));
return;
}
if (!tm_trigger) {
if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) || IS_HARDWARE_TYPE_8192F(adapter)
||IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter) || IS_HARDWARE_TYPE_8703B(adapter)
|| IS_HARDWARE_TYPE_8822B(adapter) || IS_HARDWARE_TYPE_8723D(adapter) || IS_HARDWARE_TYPE_8821C(adapter) || IS_HARDWARE_TYPE_8710B(adapter)
)/* JJ ADD 20161014 */
PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
else if (IS_HARDWARE_TYPE_8822C(adapter)) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x00);
odm_set_rf_reg(dm, RF_PATH_B, R_0x42, BIT(19), 0x01);
} else if (IS_HARDWARE_TYPE_8814B(adapter)) {
odm_set_rf_reg(dm, RF_PATH_A, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_B, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_C, 0x42, BIT(17), 0x1);
odm_set_rf_reg(dm, RF_PATH_D, 0x42, BIT(17), 0x1);
} else if (IS_HARDWARE_TYPE_8723F(adapter)) {
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x01);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x00);
odm_set_rf_reg(dm, RF_PATH_A, R_0x42, BIT(16), 0x01);
}
else
PHY_SetRFReg(adapter, RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
if (dm->support_ic_type & ODM_RTL8814B) {
ODM_delay_us(300);
odm_txpowertracking_direct_call(adapter);
tssi->thermal_trigger = 1;
}
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
tm_trigger = 1;
return;
} else {
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
odm_txpowertracking_direct_call(adapter);
if (dm->support_ic_type & ODM_RTL8814B)
tssi->thermal_trigger = 0;
tm_trigger = 0;
}
}
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_POWERTRACKING_H__
#define __HALRF_POWERTRACKING_H__
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
#define TXSCALE_TABLE_SIZE 37
#define OFDM_TABLE_SIZE 43
#define CCK_TABLE_SIZE 33
#define CCK_TABLE_SIZE_8723D 41
#define TXPWR_TRACK_TABLE_SIZE 30
#define DELTA_SWINGIDX_SIZE 30
#define DELTA_SWINTSSI_SIZE 61
#define BAND_NUM 3
#define MAX_RF_PATH 4
#define CCK_TABLE_SIZE_88F 21
/* JJ ADD 20161014 */
#define CCK_TABLE_SIZE_8710B 41
#define CCK_TABLE_SIZE_8192F 41
#define dm_check_txpowertracking odm_txpowertracking_check
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
#define AVG_THERMAL_NUM 8
#define iqk_matrix_reg_num 8
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
/* JJ ADD 20161014 */
extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
extern u32 cck_swing_table_ch1_ch14_8192f[CCK_TABLE_SIZE_8192F];
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
void
odm_txpowertracking_check(
void *dm_void
);
void
odm_txpowertracking_check_ap(
void *dm_void
);
void
odm_txpowertracking_thermal_meter_init(
void *dm_void
);
void
odm_txpowertracking_init(
void *dm_void
);
void
odm_txpowertracking_check_mp(
void *dm_void
);
void
odm_txpowertracking_check_ce(
void *dm_void
);
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
void
odm_txpowertracking_thermal_meter_check(
void *adapter
);
#endif
struct iqk_matrix_regs_setting {
boolean is_iqk_done;
s32 value[3][iqk_matrix_reg_num];
boolean is_bw_iqk_result_saved[3];
};
struct dm_rf_calibration_struct {
/* for tx power tracking */
u32 rega24; /* for TempCCK */
s32 rege94;
s32 rege9c;
s32 regeb4;
s32 regebc;
/* u8 is_txpowertracking; */
u8 tx_powercount;
boolean is_txpowertracking_init;
boolean is_txpowertracking;
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
u8 tm_trigger;
u8 internal_pa_5g[2]; /* pathA / pathB */
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
u8 thermal_value;
u8 thermal_value_path[MAX_RF_PATH];
u8 thermal_value_lck;
u8 thermal_value_iqk;
u8 thermal_value_dpk;
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
u8 thermal_value_avg[AVG_THERMAL_NUM];
u8 thermal_value_avg_path[MAX_RF_PATH][AVG_THERMAL_NUM];
u8 thermal_value_avg_index;
u8 thermal_value_avg_index_path[MAX_RF_PATH];
u8 thermal_value_rx_gain;
boolean is_reloadtxpowerindex;
u8 is_rf_pi_enable;
u32 txpowertracking_callback_cnt; /* cosa add for debug */
/* ------------------------- Tx power Tracking ------------------------- */
u8 is_cck_in_ch14;
u8 CCK_index;
u8 OFDM_index[MAX_RF_PATH];
s8 power_index_offset[MAX_RF_PATH];
s8 delta_power_index[MAX_RF_PATH];
s8 delta_power_index_last[MAX_RF_PATH];
boolean is_tx_power_changed;
s8 xtal_offset;
s8 xtal_offset_last;
struct iqk_matrix_regs_setting iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
u8 delta_lck;
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
u8 bb_swing_idx_ofdm_current;
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
#else
u8 bb_swing_idx_ofdm_base;
#endif
boolean default_bb_swing_index_flag;
boolean bb_swing_flag_ofdm;
u8 bb_swing_idx_cck;
u8 bb_swing_idx_cck_current;
u8 bb_swing_idx_cck_base;
u8 default_ofdm_index;
u8 default_cck_index;
s8 default_txagc_index;
boolean bb_swing_flag_cck;
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
s8 absolute_cck_swing_idx[MAX_RF_PATH];
s8 remnant_cck_swing_idx;
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
boolean modify_tx_agc_flag_path_a;
boolean modify_tx_agc_flag_path_b;
boolean modify_tx_agc_flag_path_c;
boolean modify_tx_agc_flag_path_d;
boolean modify_tx_agc_flag_path_a_cck;
boolean modify_tx_agc_flag_path_b_cck;
s8 kfree_offset[MAX_RF_PATH];
/* -------------------------------------------------------------------- */
/* for IQK */
u32 regc04;
u32 reg874;
u32 regc08;
u32 regb68;
u32 regb6c;
u32 reg870;
u32 reg860;
u32 reg864;
boolean is_iqk_initialized;
boolean is_lck_in_progress;
boolean is_antenna_detected;
boolean is_need_iqk;
boolean is_iqk_in_progress;
boolean is_iqk_pa_off;
u8 delta_iqk;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup_recover[9];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
/* JJ ADD 20161014 */
u32 tx_iqc_8710b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
u32 rx_iqc_8710b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
u64 iqk_start_time;
u64 iqk_total_progressing_time;
u64 iqk_progressing_time;
u64 lck_progressing_time;
u32 lok_result;
u8 iqk_step;
u8 kcount;
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
boolean is_mp_mode;
/* for APK */
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
u8 is_ap_kdone;
u8 is_apk_thermal_meter_ignore;
/* DPK */
boolean is_dpk_fail;
u8 is_dp_done;
u8 is_dp_path_aok;
u8 is_dp_path_bok;
u32 tx_lok[2];
u32 dpk_tx_agc;
s32 dpk_gain;
u32 dpk_thermal[4];
s8 modify_tx_agc_value_ofdm;
s8 modify_tx_agc_value_cck;
/*Add by Yuchen for Kfree Phydm*/
u8 reg_rf_kfree_enable; /*for registry*/
u8 rf_kfree_enable; /*for efuse enable check*/
};
#endif /*#ifndef __HALRF_POWER_TRACKING_H__*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
/*@===========================================================
* include files
*============================================================
*/
#include "mp_precomp.h"
#include "phydm_precomp.h"
u64 _sqrt(u64 x)
{
u64 i = 0;
u64 j = (x >> 1) + 1;
while (i <= j) {
u64 mid = (i + j) >> 1;
u64 sq = mid * mid;
if (sq == x)
return mid;
else if (sq < x)
i = mid + 1;
else
j = mid - 1;
}
return j;
}
u32 halrf_get_psd_data(
struct dm_struct *dm,
u32 point)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 psd_val = 0, psd_reg, psd_report, psd_point, psd_start, i, delay_time = 0;
#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
if (psd->average == 0)
delay_time = 100;
else
delay_time = 0;
}
#endif
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if (dm->support_interface == ODM_ITRF_PCIE) {
if (psd->average == 0)
delay_time = 1000;
else
delay_time = 100;
}
#endif
if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C)) {
psd_reg = R_0x910;
psd_report = R_0xf44;
} else {
psd_reg = R_0x808;
psd_report = R_0x8b4;
}
if (dm->support_ic_type & ODM_RTL8710B) {
psd_point = 0xeffffc00;
psd_start = 0x10000000;
} else {
psd_point = 0xffbffc00;
psd_start = 0x00400000;
}
psd_val = odm_get_bb_reg(dm, psd_reg, MASKDWORD);
psd_val &= psd_point;
psd_val |= point;
odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
psd_val |= psd_start;
odm_set_bb_reg(dm, psd_reg, MASKDWORD, psd_val);
for (i = 0; i < delay_time; i++)
ODM_delay_us(1);
psd_val = odm_get_bb_reg(dm, psd_report, MASKDWORD);
if (dm->support_ic_type & (ODM_RTL8821C | ODM_RTL8710B)) {
psd_val &= MASKL3BYTES;
psd_val = psd_val / 32;
} else {
psd_val &= MASKLWORD;
}
return psd_val;
}
void halrf_psd(
struct dm_struct *dm,
u32 point,
u32 start_point,
u32 stop_point,
u32 average)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 i = 0, j = 0, k = 0;
u32 psd_reg, avg_org, point_temp, average_tmp, mode;
u64 data_tatal = 0, data_temp[64] = {0};
psd->buf_size = 256;
mode = average >> 16;
if (mode == 2)
average_tmp = 1;
else
average_tmp = average & 0xffff;
if (dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A | ODM_RTL8822B | ODM_RTL8821C))
psd_reg = R_0x910;
else
psd_reg = R_0x808;
#if 0
dbg_print("[PSD]point=%d, start_point=%d, stop_point=%d, average=%d, average_tmp=%d, buf_size=%d\n",
point, start_point, stop_point, average, average_tmp, psd->buf_size);
#endif
for (i = 0; i < psd->buf_size; i++)
psd->psd_data[i] = 0;
if (dm->support_ic_type & ODM_RTL8710B)
avg_org = odm_get_bb_reg(dm, psd_reg, 0x30000);
else
avg_org = odm_get_bb_reg(dm, psd_reg, 0x3000);
if (mode == 1) {
if (dm->support_ic_type & ODM_RTL8710B)
odm_set_bb_reg(dm, psd_reg, 0x30000, 0x1);
else
odm_set_bb_reg(dm, psd_reg, 0x3000, 0x1);
}
#if 0
if (avg_temp == 0)
avg = 1;
else if (avg_temp == 1)
avg = 8;
else if (avg_temp == 2)
avg = 16;
else if (avg_temp == 3)
avg = 32;
#endif
i = start_point;
while (i < stop_point) {
data_tatal = 0;
if (i >= point)
point_temp = i - point;
else
point_temp = i;
for (k = 0; k < average_tmp; k++) {
data_temp[k] = halrf_get_psd_data(dm, point_temp);
data_tatal = data_tatal + (data_temp[k] * data_temp[k]);
#if 0
if ((k % 20) == 0)
dbg_print("\n ");
dbg_print("0x%x ", data_temp[k]);
#endif
}
#if 0
/*dbg_print("\n");*/
#endif
data_tatal = phydm_division64((data_tatal * 100), average_tmp);
psd->psd_data[j] = (u32)_sqrt(data_tatal);
i++;
j++;
}
#if 0
for (i = 0; i < psd->buf_size; i++) {
if ((i % 20) == 0)
dbg_print("\n ");
dbg_print("0x%x ", psd->psd_data[i]);
}
dbg_print("\n\n");
#endif
if (dm->support_ic_type & ODM_RTL8710B)
odm_set_bb_reg(dm, psd_reg, 0x30000, avg_org);
else
odm_set_bb_reg(dm, psd_reg, 0x3000, avg_org);
}
void backup_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
{
u32 i ;
for (i = 0; i < counter; i++)
bb_backup[i] = odm_get_bb_reg(dm, backup_bb_reg[i], MASKDWORD);
}
void restore_bb_register(struct dm_struct *dm, u32 *bb_backup, u32 *backup_bb_reg, u32 counter)
{
u32 i ;
for (i = 0; i < counter; i++)
odm_set_bb_reg(dm, backup_bb_reg[i], MASKDWORD, bb_backup[i]);
}
void _halrf_psd_iqk_init(struct dm_struct *dm)
{
odm_set_bb_reg(dm, 0x1b04, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1b08, MASKDWORD, 0x80);
odm_set_bb_reg(dm, 0x1b0c, 0xc00, 0x3);
odm_set_bb_reg(dm, 0x1b14, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1b18, BIT(0), 0x1);
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00040008);
if (dm->support_ic_type & ODM_RTL8198F)
odm_set_bb_reg(dm, 0x1b20, MASKDWORD, 0x00000000);
if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
odm_set_bb_reg(dm, 0x1b24, MASKDWORD, 0x00030000);
odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x00000000);
odm_set_bb_reg(dm, 0x1b2c, MASKDWORD, 0x00180018);
odm_set_bb_reg(dm, 0x1b30, MASKDWORD, 0x20000000);
/*odm_set_bb_reg(dm, 0x1b38, MASKDWORD, 0x20000000);*/
/*odm_set_bb_reg(dm, 0x1b3c, MASKDWORD, 0x20000000);*/
}
odm_set_bb_reg(dm, 0x1b1c, 0xfff, 0xd21);
odm_set_bb_reg(dm, 0x1b1c, 0xfff00000, 0x821);
odm_set_bb_reg(dm, 0x1b28, MASKDWORD, 0x0);
odm_set_bb_reg(dm, 0x1bcc, 0x3f, 0x3f);
}
void _halrf_iqk_psd_init_8723f(void *dm_void, boolean onoff)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
u8 s;
s = (u8)odm_get_bb_reg(dm, 0x1884, BIT(20));
if (onoff) {
/*01_8723F_AFE_ON_BB_settings.txt*/
odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x0);
odm_set_bb_reg(dm, R_0x1860, 0xF0000000, 0xf);
odm_set_bb_reg(dm, R_0x1860, 0x0FFFF000, 0x0041);
odm_set_bb_reg(dm, 0x09f0, 0x0000FFFF, 0xbbbb);
odm_set_bb_reg(dm, 0x1d40, BIT(3), 0x1);
odm_set_bb_reg(dm, 0x1d40, 0x00000007, 0x3);
odm_set_bb_reg(dm, 0x09b4, 0x00000700, 0x3);
odm_set_bb_reg(dm, 0x09b4, 0x00003800, 0x3);
odm_set_bb_reg(dm, 0x09b4, 0x0001C000, 0x3);
odm_set_bb_reg(dm, 0x09b4, 0x000E0000, 0x3);
odm_set_bb_reg(dm, R_0x1c20, BIT(5), 0x1);
odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x0);
odm_set_bb_reg(dm, R_0x1e28, 0x0000000F, 0x1);
odm_set_bb_reg(dm, R_0x824, 0x000F0000, 0x1);
odm_set_bb_reg(dm, R_0x1cd0, 0xF0000000, 0x7);
odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x1);
odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x1);
odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x1);
odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x1);
odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x1);
odm_set_bb_reg(dm, R_0x1e24, BIT(17), 0x1);
odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffffffff);
/*02_IQK_Preset.txt*/
//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x0);
//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x0);
odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000080);
//odm_set_bb_reg(dm, R_0x1bd8, MASKDWORD, 0x00000002);
//switch path 10 od 0x1b38 0x1/0x3 [1:0]
if (s == 0)
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x00000008);
else
odm_set_bb_reg(dm, R_0x1b00, MASKDWORD, 0x0000000a);
odm_set_bb_reg(dm, R_0x1b18, MASKDWORD, 0x40010101);
odm_set_bb_reg(dm, R_0x1b14, MASKDWORD, 0x40010100);
//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
odm_set_bb_reg(dm, R_0x1b0c, 0x00000C00, 0x2);
odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x3f);
//DbgPrint("[PSD][8723F]iqkpsd init!\n");
} else {
/*10_IQK_Reg_PSD_Restore.txt*/
//odm_set_bb_reg(dm, R_0x1b1c, MASKDWORD, 0xA2103C00);
odm_set_bb_reg(dm, R_0x1b08, MASKDWORD, 0x00000000);
odm_set_bb_reg(dm, R_0x1b38, BIT(0), 0x0);
odm_set_bb_reg(dm, R_0x1bcc, 0x0000003F, 0x0);
//odm_set_rf_reg(dm, RF_PATH_A, 0x05, BIT(0), 0x1);
//odm_set_rf_reg(dm, RF_PATH_B, 0x05, BIT(0), 0x1);
/*11_8723F_restore_AFE_BB_settings.txt*/
odm_set_bb_reg(dm, 0x1c38, MASKDWORD, 0x0);
odm_set_bb_reg(dm, R_0x1830, BIT(30), 0x1);
odm_set_bb_reg(dm, R_0x1e24, BIT(31), 0x1);
odm_set_bb_reg(dm, R_0x2a24, BIT(13), 0x0);
odm_set_bb_reg(dm, R_0x1c68, BIT(24), 0x0);
odm_set_bb_reg(dm, R_0x1864, BIT(31), 0x0);
odm_set_bb_reg(dm, R_0x180c, BIT(27), 0x0);
odm_set_bb_reg(dm, R_0x180c, BIT(30), 0x0);
odm_set_bb_reg(dm, R_0x1880, BIT(21), 0x0);
odm_set_bb_reg(dm, R_0x1c38, MASKDWORD, 0xffa1005e);
//DbgPrint("[PSD][8723F]iqkpsd resotre!\n");
}
}
u64 halrf_get_iqk_psd_data(void *dm_void, u32 point)
{
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u64 psd_val, psd_val1, psd_val2;
u32 psd_point, i, delay_time = 0;
#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
if (dm->support_interface == ODM_ITRF_USB || dm->support_interface == ODM_ITRF_SDIO) {
if (dm->support_ic_type & ODM_RTL8822C)
delay_time = 1000;
else if (dm->support_ic_type & ODM_RTL8723F)
delay_time = 1000;
else
delay_time = 0;
}
#endif
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if (dm->support_interface == ODM_ITRF_PCIE) {
if (dm->support_ic_type & ODM_RTL8822C)
delay_time = 1000;
else
delay_time = 150;
}
#endif
psd_point = odm_get_bb_reg(dm, R_0x1b2c, MASKDWORD);
psd_point &= 0xF000FFFF;
point &= 0xFFF;
psd_point = psd_point | (point << 16);
odm_set_bb_reg(dm, R_0x1b2c, MASKDWORD, psd_point);
odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x1);
odm_set_bb_reg(dm, R_0x1b34, BIT(0), 0x0);
for (i = 0; i < delay_time; i++)
ODM_delay_us(1);
if (dm->support_ic_type & (ODM_RTL8197G | ODM_RTL8198F)) {
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001a0001);
else
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = (psd_val1 & 0x001f0000) >> 16;
if (dm->support_ic_type & ODM_RTL8197G)
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x001b0001);
else
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
} else if (dm->support_ic_type & ODM_RTL8723F) {
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00210001);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = (psd_val1 & 0x00FF0000) >> 16;
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00220001);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
//psd_val = (psd_val1 << 27) + (psd_val2 >> 5);
psd_val = (psd_val1 << 32) + psd_val2;
} else {
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x00250001);
psd_val1 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val1 = (psd_val1 & 0x07FF0000) >> 16;
odm_set_bb_reg(dm, R_0x1bd4, MASKDWORD, 0x002e0001);
psd_val2 = odm_get_bb_reg(dm, R_0x1bfc, MASKDWORD);
psd_val = (psd_val1 << 21) + (psd_val2 >> 11);
}
return psd_val;
}
void halrf_iqk_psd(
struct dm_struct *dm,
u32 point,
u32 start_point,
u32 stop_point,
u32 average)
{
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
u32 i = 0, j = 0, k = 0;
u32 psd_reg, avg_org, point_temp, average_tmp = 32, mode, reg_tmp = 5;
u64 data_tatal = 0, data_temp[64] = {0};
s32 s_point_tmp;
psd->buf_size = 256;
mode = average >> 16;
if (mode == 2) {
if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8723F))
average_tmp = 1; //HW average
else {
reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
if (reg_tmp == 0)
average_tmp = 1;
else if (reg_tmp == 3)
average_tmp = 8;
else if (reg_tmp == 4)
average_tmp = 16;
else if (reg_tmp == 5)
average_tmp = 32;
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
}
} else {
reg_tmp = odm_get_bb_reg(dm, R_0x1b1c, 0x000e0000);
if (reg_tmp == 0)
average_tmp = 1;
else if (reg_tmp == 3)
average_tmp = 8;
else if (reg_tmp == 4)
average_tmp = 16;
else if (reg_tmp == 5)
average_tmp = 32;
#ifndef RTL8723F_SUPPORT
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, 0x0);
#endif
}
#if 0
DbgPrint("[PSD]point=%d, start_point=%d, stop_point=%d, average=0x%x, average_tmp=%d, buf_size=%d, mode=%d\n",
point, start_point, stop_point, average, average_tmp, psd->buf_size, mode);
#endif
for (i = 0; i < psd->buf_size; i++)
psd->psd_data[i] = 0;
i = start_point;
#ifndef RTL8723F_SUPPORT
while (i < stop_point) {
data_tatal = 0;
if (i >= point)
point_temp = i - point;
else
{
if (dm->support_ic_type & ODM_RTL8814B)
{
s_point_tmp = i - point - 1;
point_temp = s_point_tmp & 0xfff;
}
else
point_temp = i;
}
for (k = 0; k < average_tmp; k++) {
data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
/*data_tatal = data_tatal + (data_temp[k] * data_temp[k]);*/
data_tatal = data_tatal + data_temp[k];
#if 0
if ((k % 20) == 0)
DbgPrint("\n ");
DbgPrint("0x%x ", data_temp[k]);
#endif
}
data_tatal = phydm_division64((data_tatal * 10), average_tmp);
psd->psd_data[j] = (u32)data_tatal;
i++;
j++;
}
if (dm->support_ic_type & (ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G))
odm_set_bb_reg(dm, R_0x1b1c, 0x000e0000, reg_tmp);
#else
while (i < stop_point) {
data_tatal = 0;
if (i >= point)
point_temp = i - point;
else
point_temp = i + 0xB00;
//-640:0xD80,640:0x280,0x280+0xB00 =0xD80
//point_temp = i + 0xC00;
//-512:0xE00,512:0x200,0x200+0xC00 = 0xE00
data_temp[k] = halrf_get_iqk_psd_data(dm, point_temp);
data_tatal = data_temp[k];
psd->psd_data[j] = (u32)data_tatal;
i++;
j++;
}
#endif
#if 0
DbgPrint("\n [iqk psd]psd result:\n");
for (i = 0; i < psd->buf_size; i++) {
if ((i % 20) == 0)
DbgPrint("\n ");
DbgPrint("0x%x ", psd->psd_data[i]);
}
DbgPrint("\n\n");
#endif
}
u32
halrf_psd_init(
void *dm_void)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
#ifndef RTL8723F_SUPPORT
#if 0
u32 bb_backup[12];
u32 backup_bb_reg[12] = {0x1b04, 0x1b08, 0x1b0c, 0x1b14, 0x1b18,
0x1b1c, 0x1b28, 0x1bcc, 0x1b2c, 0x1b34,
0x1bd4, 0x1bfc};
#endif
#else
u32 bb_backup[11];
u32 backup_bb_reg[11] = {0x09f0, 0x09b4, 0x1c38, 0x1860, 0x1cd0,
0x824, 0x2a24, 0x1d40, 0x1c20, 0x1880, 0x180c};
#endif
if (psd->psd_progress) {
ret_status = RT_STATUS_PENDING;
} else {
psd->psd_progress = 1;
if (dm->support_ic_type & ODM_RTL8723F) {
backup_bb_register(dm, bb_backup, backup_bb_reg, 11);
_halrf_iqk_psd_init_8723f(dm, true);
halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
_halrf_iqk_psd_init_8723f(dm, false);
restore_bb_register(dm, bb_backup, backup_bb_reg, 11);
} else if (dm->support_ic_type &
(ODM_RTL8822C | ODM_RTL8814B | ODM_RTL8198F | ODM_RTL8197G)) {
/*backup_bb_register(dm, bb_backup, backup_bb_reg, 12);*/
_halrf_psd_iqk_init(dm);
halrf_iqk_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
/*restore_bb_register(dm, bb_backup, backup_bb_reg, 12);*/
} else
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
psd->psd_progress = 0;
}
return ret_status;
}
u32
halrf_psd_query(
void *dm_void,
u32 *outbuf,
u32 buf_size)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
if (psd->psd_progress)
ret_status = RT_STATUS_PENDING;
else
odm_move_memory(dm, outbuf, psd->psd_data,
sizeof(u32) * psd->buf_size);
return ret_status;
}
u32
halrf_psd_init_query(
void *dm_void,
u32 *outbuf,
u32 point,
u32 start_point,
u32 stop_point,
u32 average,
u32 buf_size)
{
enum rt_status ret_status = RT_STATUS_SUCCESS;
struct dm_struct *dm = (struct dm_struct *)dm_void;
struct _hal_rf_ *rf = &(dm->rf_table);
struct _halrf_psd_data *psd = &(rf->halrf_psd_data);
psd->point = point;
psd->start_point = start_point;
psd->stop_point = stop_point;
psd->average = average;
if (psd->psd_progress) {
ret_status = RT_STATUS_PENDING;
} else {
psd->psd_progress = 1;
halrf_psd(dm, psd->point, psd->start_point, psd->stop_point, psd->average);
odm_move_memory(dm, outbuf, psd->psd_data, 0x400);
psd->psd_progress = 0;
}
return ret_status;
}

60
hal/phydm/halrf/halrf_psd.h Normal file
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@ -0,0 +1,60 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_PSD_H__
#define __HALRF_PSD_H__
struct _halrf_psd_data {
u32 point;
u32 start_point;
u32 stop_point;
u32 average;
u32 buf_size;
u32 psd_data[256];
u32 psd_progress;
};
u32
halrf_psd_init(
void *dm_void);
void
_halrf_iqk_psd_init_8723f(
void *dm_void,
boolean onoff);
u64
halrf_get_iqk_psd_data(
void *dm_void,
u32 point);
u32
halrf_psd_query(
void *dm_void,
u32 *outbuf,
u32 buf_size);
u32
halrf_psd_init_query(
void *dm_void,
u32 *outbuf,
u32 point,
u32 start_point,
u32 stop_point,
u32 average,
u32 buf_size);
#endif /*#__HALRF_PSD_H__*/

300
hal/phydm/halrf/halrf_txgapcal.c Normal file
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@ -0,0 +1,300 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "mp_precomp.h"
#include "phydm_precomp.h"
void odm_bub_sort(u32 *data, u32 n)
{
int i, j, temp, sp;
for (i = n - 1; i >= 0; i--) {
sp = 1;
for (j = 0; j < i; j++) {
if (data[j] < data[j + 1]) {
temp = data[j];
data[j] = data[j + 1];
data[j + 1] = temp;
sp = 0;
}
}
if (sp == 1)
break;
}
}
#if (RTL8197F_SUPPORT == 1)
u4Byte
odm_tx_gain_gap_psd_8197f(
void *dm_void,
u1Byte rf_path,
u4Byte rf56)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
u1Byte i, j;
u4Byte psd_vaule[5], psd_avg_time = 5, psd_vaule_temp;
u4Byte iqk_ctl_addr[2][6] = {{0xe30, 0xe34, 0xe50, 0xe54, 0xe38, 0xe3c},
{0xe50, 0xe54, 0xe30, 0xe34, 0xe58, 0xe5c}};
u4Byte psd_finish_bit[2] = {0x04000000, 0x20000000};
u4Byte psd_fail_bit[2] = {0x08000000, 0x40000000};
u4Byte psd_cntl_value[2][2] = {{0x38008c1c, 0x10008c1c},
{0x38008c2c, 0x10008c2c}};
u4Byte psd_report_addr[2] = {0xea0, 0xec0};
odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00e02);
ODM_delay_us(100);
odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x0);
odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56);
while (rf56 != (odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff)))
odm_set_rf_reg(dm, rf_path, RF_0x56, 0xfff, rf56);
odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44FFBB44);
odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x00400040);
odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005403);
odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000804e4);
odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04203400);
odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x80800000);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][0], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][1], 0xffffffff, psd_cntl_value[rf_path][1]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][2], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][3], 0xffffffff, psd_cntl_value[rf_path][0]);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][4], 0xffffffff, 0x8215001F);
odm_set_bb_reg(dm, iqk_ctl_addr[rf_path][5], 0xffffffff, 0x2805001F);
odm_set_bb_reg(dm, R_0xe40, 0xffffffff, 0x81007C00);
odm_set_bb_reg(dm, R_0xe44, 0xffffffff, 0x81004800);
odm_set_bb_reg(dm, R_0xe4c, 0xffffffff, 0x0046a8d0);
for (i = 0; i < psd_avg_time; i++) {
for (j = 0; j < 1000; j++) {
odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xfa005800);
odm_set_bb_reg(dm, R_0xe48, 0xffffffff, 0xf8005800);
while (!odm_get_bb_reg(dm, R_0xeac, psd_finish_bit[rf_path]))
; /*wait finish bit*/
if (!odm_get_bb_reg(dm, R_0xeac, psd_fail_bit[rf_path])) { /*check fail bit*/
psd_vaule[i] = odm_get_bb_reg(dm, psd_report_addr[rf_path], 0xffffffff);
if (psd_vaule[i] > 0xffff)
break;
}
}
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x time=%d psd_vaule=0x%x\n",
odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56,
odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), j,
psd_vaule[i]);
}
odm_bub_sort(psd_vaule, psd_avg_time);
psd_vaule_temp = psd_vaule[(UINT)(psd_avg_time / 2)];
odm_set_bb_reg(dm, R_0xd94, 0xffffffff, 0x44BBBB44);
odm_set_bb_reg(dm, R_0xe70, 0xffffffff, 0x80408040);
odm_set_bb_reg(dm, R_0xc04, 0xffffffff, 0x6f005433);
odm_set_bb_reg(dm, R_0xc08, 0xffffffff, 0x000004e4);
odm_set_bb_reg(dm, R_0x874, 0xffffffff, 0x04003400);
odm_set_bb_reg(dm, R_0xe28, 0xffffffff, 0x00000000);
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf0=0x%x rf56=0x%x rf56_reg=0x%x psd_vaule_temp=0x%x\n",
odm_get_rf_reg(dm, rf_path, RF_0x0, 0xff), rf56,
odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff), psd_vaule_temp);
odm_set_rf_reg(dm, rf_path, RF_0xdf, bRFRegOffsetMask, 0x00602);
return psd_vaule_temp;
}
void odm_tx_gain_gap_calibration_8197f(
void *dm_void)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
u1Byte rf_path, rf0_idx, rf0_idx_current, rf0_idx_next, i, delta_gain_retry = 3;
s1Byte delta_gain_gap_pre, delta_gain_gap[2][11];
u4Byte rf56_current, rf56_next, psd_value_current, psd_value_next;
u4Byte psd_gap, rf56_current_temp[2][11];
s4Byte rf33[2][11];
memset(rf33, 0x0, sizeof(rf33));
for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
if (rf_path == RF_PATH_A)
odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x3); /*disable 3-wire*/
else if (rf_path == RF_PATH_B)
odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x3); /*disable 3-wire*/
ODM_delay_us(100);
for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
rf0_idx_current = 3 * (rf0_idx - 1) + 1;
odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_current);
ODM_delay_us(100);
rf56_current_temp[rf_path][rf0_idx] = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff);
rf56_current = rf56_current_temp[rf_path][rf0_idx];
rf0_idx_next = 3 * rf0_idx + 1;
odm_set_rf_reg(dm, rf_path, RF_0x0, 0xff, rf0_idx_next);
ODM_delay_us(100);
rf56_next = odm_get_rf_reg(dm, rf_path, RF_0x56, 0xfff);
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf56_current[%d][%d]=0x%x rf56_next[%d][%d]=0x%x\n",
rf_path, rf0_idx, rf56_current, rf_path, rf0_idx,
rf56_next);
if ((rf56_current >> 5) == (rf56_next >> 5)) {
delta_gain_gap[rf_path][rf0_idx] = 0;
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf56_current[11:5] == rf56_next[%d][%d][11:5]=0x%x delta_gain_gap[%d][%d]=%d\n",
rf_path, rf0_idx, (rf56_next >> 5),
rf_path, rf0_idx,
delta_gain_gap[rf_path][rf0_idx]);
continue;
}
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf56_current[%d][%d][11:5]=0x%x != rf56_next[%d][%d][11:5]=0x%x\n",
rf_path, rf0_idx, (rf56_current >> 5), rf_path,
rf0_idx, (rf56_next >> 5));
for (i = 0; i < delta_gain_retry; i++) {
psd_value_current = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_current);
psd_value_next = odm_tx_gain_gap_psd_8197f(dm, rf_path, rf56_next - 2);
psd_gap = psd_value_next / (psd_value_current / 1000);
#if 0
if (psd_gap > 1413)
delta_gain_gap[rf_path][rf0_idx] = 1;
else if (psd_gap > 1122)
delta_gain_gap[rf_path][rf0_idx] = 0;
else
delta_gain_gap[rf_path][rf0_idx] = -1;
#endif
if (psd_gap > 1445)
delta_gain_gap[rf_path][rf0_idx] = 1;
else if (psd_gap > 1096)
delta_gain_gap[rf_path][rf0_idx] = 0;
else
delta_gain_gap[rf_path][rf0_idx] = -1;
if (i == 0)
delta_gain_gap_pre = delta_gain_gap[rf_path][rf0_idx];
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] psd_value_current=0x%x psd_value_next=0x%x psd_value_next/psd_value_current=%d delta_gain_gap[%d][%d]=%d\n",
psd_value_current, psd_value_next,
psd_gap, rf_path, rf0_idx,
delta_gain_gap[rf_path][rf0_idx]);
if (i == 0 && delta_gain_gap[rf_path][rf0_idx] == 0)
break;
if (delta_gain_gap_pre != delta_gain_gap[rf_path][rf0_idx]) {
delta_gain_gap[rf_path][rf0_idx] = 0;
RF_DBG(dm, DBG_RF_IQK, "[TGGC] delta_gain_gap_pre(%d) != delta_gain_gap[%d][%d](%d) time=%d\n",
delta_gain_gap_pre, rf_path, rf0_idx, delta_gain_gap[rf_path][rf0_idx], i);
break;
}
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] delta_gain_gap_pre(%d) == delta_gain_gap[%d][%d](%d) time=%d\n",
delta_gain_gap_pre, rf_path, rf0_idx,
delta_gain_gap[rf_path][rf0_idx], i);
}
}
if (rf_path == RF_PATH_A)
odm_set_bb_reg(dm, R_0x88c, (BIT(21) | BIT(20)), 0x0); /*enable 3-wire*/
else if (rf_path == RF_PATH_B)
odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22)), 0x0); /*enable 3-wire*/
ODM_delay_us(100);
}
#if 0
/*odm_set_bb_reg(dm, R_0x88c, (BIT(23) | BIT(22) | BIT(21) | BIT(20)), 0x0);*/ /*enable 3-wire*/
#endif
for (rf_path = RF_PATH_A; rf_path <= RF_PATH_B; rf_path++) {
odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00100);
for (rf0_idx = 1; rf0_idx <= 10; rf0_idx++) {
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + (rf56_current_temp[rf_path][rf0_idx] & 0x1f);
for (i = rf0_idx; i <= 10; i++)
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + delta_gain_gap[rf_path][i];
if (rf33[rf_path][rf0_idx] >= 0x1d)
rf33[rf_path][rf0_idx] = 0x1d;
else if (rf33[rf_path][rf0_idx] <= 0x2)
rf33[rf_path][rf0_idx] = 0x2;
rf33[rf_path][rf0_idx] = rf33[rf_path][rf0_idx] + ((rf0_idx - 1) * 0x4000) + (rf56_current_temp[rf_path][rf0_idx] & 0xfffe0);
RF_DBG(dm, DBG_RF_IQK,
"[TGGC] rf56[%d][%d]=0x%05x rf33[%d][%d]=0x%05x\n",
rf_path, rf0_idx,
rf56_current_temp[rf_path][rf0_idx], rf_path,
rf0_idx, rf33[rf_path][rf0_idx]);
odm_set_rf_reg(dm, rf_path, RF_0x33, bRFRegOffsetMask, rf33[rf_path][rf0_idx]);
}
odm_set_rf_reg(dm, rf_path, RF_0xef, bRFRegOffsetMask, 0x00000);
}
}
#endif
void odm_tx_gain_gap_calibration(void *dm_void)
{
PDM_ODM_T dm = (PDM_ODM_T)dm_void;
#if (RTL8197F_SUPPORT == 1)
if (dm->SupportICType & ODM_RTL8197F)
odm_tx_gain_gap_calibration_8197f(dm_void);
#endif
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#ifndef __HALRF_TXGAPCAL_H__
#define __HALRF_TXGAPCAL_H__
void odm_tx_gain_gap_calibration(void *dm_void);
#endif /*__HALRF_TXGAPCAL_H__*/

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hal/phydm/halrf/rtl8188e/halrf_8188e_ap.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_8188E_H__
#define __HALRF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#include "../halphyrf_ap.h"
void configure_txpower_track_8188e(
struct txpwrtrack_cfg *config
);
void do_iqk_8188e(
void *dm_void,
u8 delta_thermal_index,
u8 thermal_value,
u8 threshold
);
void
odm_tx_pwr_track_set_pwr88_e(
struct dm_struct *dm,
enum pwrtrack_method method,
u8 rf_path,
u8 channel_mapped_index
);
/* 1 7. IQK */
void
phy_iq_calibrate_8188e(
struct dm_struct *dm,
boolean is_recovery);
/*
* LC calibrate
* */
void
phy_lc_calibrate_8188e(
struct dm_struct *dm
);
/*
* AP calibrate
* */
void
phy_ap_calibrate_8188e(
struct dm_struct *dm,
s8 delta);
void
_phy_save_adda_registers(
struct dm_struct *dm,
u32 *adda_reg,
u32 *adda_backup,
u32 register_num
);
void
_phy_path_adda_on(
struct dm_struct *dm,
u32 *adda_reg,
boolean is_path_a_on,
boolean is2T
);
void
_phy_mac_setting_calibration(
struct dm_struct *dm,
u32 *mac_reg,
u32 *mac_backup
);
void
_phy_path_a_stand_by(
struct dm_struct *dm
);
void
halrf_rf_lna_setting_8188e(
struct dm_struct *dm,
enum halrf_lna_set type
);
#endif /*#ifndef __HALRF_8188E_H__*/

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hal/phydm/halrf/rtl8188e/halrf_8188e_ce.c Normal file
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59
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_8188E_H__
#define __HALRF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#include "../halphyrf_ce.h"
void configure_txpower_track_8188e(struct txpwrtrack_cfg *config);
void get_delta_swing_table_8188e(void *dm_void, u8 **temperature_up_a,
u8 **temperature_down_a, u8 **temperature_up_b,
u8 **temperature_down_b);
void do_iqk_8188e(void *dm_void, u8 delta_thermal_index, u8 thermal_value,
u8 threshold);
void odm_tx_pwr_track_set_pwr88_e(void *dm_void, enum pwrtrack_method method,
u8 rf_path, u8 channel_mapped_index);
/* 1 7. IQK */
void phy_iq_calibrate_8188e(void *dm_void, boolean is_recovery);
/*
* LC calibrate
* */
void phy_lc_calibrate_8188e(void *dm_void);
void _phy_save_adda_registers(struct dm_struct *dm, u32 *adda_reg,
u32 *adda_backup, u32 register_num);
void _phy_path_adda_on(struct dm_struct *dm, u32 *adda_reg,
boolean is_path_a_on, boolean is2T);
void _phy_mac_setting_calibration(struct dm_struct *dm, u32 *mac_reg,
u32 *mac_backup);
void _phy_path_a_stand_by(struct dm_struct *dm);
void halrf_rf_lna_setting_8188e(struct dm_struct *dm, enum halrf_lna_set type);
#endif /*#ifndef __HALRF_8188E_H__*/

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hal/phydm/halrf/rtl8188e/halrf_8188e_win.c Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __HALRF_8188E_H__
#define __HALRF_8188E_H__
/*--------------------------Define Parameters-------------------------------*/
#define IQK_DELAY_TIME_88E 15 /* ms */
#define IQK_DELAY_TIME_8723B 10 /* ms */
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#include "halrf/halphyrf_win.h"
void configure_txpower_track_8188e(
struct txpwrtrack_cfg *config
);
void
get_delta_swing_table_8188e(
void *dm_void,
u8 **temperature_up_a,
u8 **temperature_down_a,
u8 **temperature_up_b,
u8 **temperature_down_b
);
void do_iqk_8188e(
void *dm_void,
u8 delta_thermal_index,
u8 thermal_value,
u8 threshold
);
void
odm_tx_pwr_track_set_pwr88_e(
void *dm_void,
enum pwrtrack_method method,
u8 rf_path,
u8 channel_mapped_index
);
/* 1 7. IQK */
void
phy_iq_calibrate_8188e(
void *dm_void,
boolean is_recovery);
/*
* LC calibrate
* */
void
phy_lc_calibrate_8188e(
void *dm_void
);
/*
* AP calibrate
* */
#if 0
void
phy_ap_calibrate_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm,
#else
void *adapter,
#endif
s8 delta);
void
phy_digital_predistortion_8188e(void *adapter);
#endif
#define phy_dp_calibrate_8821a phy_dp_calibrate_8812a
void
_phy_save_adda_registers(
struct dm_struct *dm,
u32 *adda_reg,
u32 *adda_backup,
u32 register_num
);
void
_phy_path_adda_on(
struct dm_struct *dm,
u32 *adda_reg,
boolean is_path_a_on,
boolean is2T
);
void
_phy_mac_setting_calibration(
struct dm_struct *dm,
u32 *mac_reg,
u32 *mac_backup
);
void
_phy_path_a_stand_by(
struct dm_struct *dm
);
void phy_set_rf_path_switch_8188e(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
struct dm_struct *dm,
#else
void *adapter,
#endif
boolean is_main
);
void
halrf_rf_lna_setting_8188e(
struct dm_struct *dm,
enum halrf_lna_set type
);
#endif /*#ifndef __HALRF_8188E_H__*/