415 lines
12 KiB
C
415 lines
12 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2017 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _RTL8188E_CMD_C_
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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#include "hal_com_h2c.h"
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#define CONFIG_H2C_EF
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#define RTL88E_MAX_H2C_BOX_NUMS 4
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#define RTL88E_MAX_CMD_LEN 7
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#define RTL88E_MESSAGE_BOX_SIZE 4
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#define RTL88E_EX_MESSAGE_BOX_SIZE 4
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static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num)
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{
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u8 read_down = _FALSE;
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int retry_cnts = 100;
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u8 valid;
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/* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */
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do {
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valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num);
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if (0 == valid)
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read_down = _TRUE;
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else
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rtw_msleep_os(1);
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} while ((!read_down) && (retry_cnts--));
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return read_down;
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}
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/*****************************************
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* H2C Msg format :
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* 0x1DF - 0x1D0
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*| 31 - 8 | 7-5 4 - 0 |
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*| h2c_msg |Class_ID CMD_ID |
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*
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* Extend 0x1FF - 0x1F0
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*|31 - 0 |
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*|ext_msg|
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******************************************/
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s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
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{
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struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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u8 h2c_box_num;
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u32 msgbox_addr;
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u32 msgbox_ex_addr = 0;
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u8 cmd_idx;
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u32 h2c_cmd = 0;
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u32 h2c_cmd_ex = 0;
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s32 ret = _FAIL;
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padapter = GET_PRIMARY_ADAPTER(padapter);
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pHalData = GET_HAL_DATA(padapter);
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if (pHalData->bFWReady == _FALSE) {
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RTW_INFO("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
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return ret;
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}
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_enter_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL);
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if (!pCmdBuffer)
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goto exit;
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if (CmdLen > RTL88E_MAX_CMD_LEN)
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goto exit;
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if (rtw_is_surprise_removed(padapter))
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goto exit;
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/* pay attention to if race condition happened in H2C cmd setting. */
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do {
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h2c_box_num = pHalData->LastHMEBoxNum;
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if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) {
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RTW_INFO(" fw read cmd failed...\n");
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goto exit;
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}
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*(u8 *)(&h2c_cmd) = ElementID;
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if (CmdLen <= 3)
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_rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen);
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else {
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_rtw_memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3);
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_rtw_memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, CmdLen - 3);
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}
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/* Write Ext command */
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msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
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#ifdef CONFIG_H2C_EF
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for (cmd_idx = 0; cmd_idx < RTL88E_EX_MESSAGE_BOX_SIZE; cmd_idx++)
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rtw_write8(padapter, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx));
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#else
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h2c_cmd_ex = le32_to_cpu(h2c_cmd_ex);
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rtw_write32(padapter, msgbox_ex_addr, h2c_cmd_ex);
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#endif
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/* Write command */
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msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
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#ifdef CONFIG_H2C_EF
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for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++)
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rtw_write8(padapter, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx));
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#else
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h2c_cmd = le32_to_cpu(h2c_cmd);
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rtw_write32(padapter, msgbox_addr, h2c_cmd);
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#endif
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/* RTW_INFO("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" */
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/* ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); */
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pHalData->LastHMEBoxNum = (h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS;
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} while (0);
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ret = _SUCCESS;
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exit:
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_exit_critical_mutex(&(dvobj->h2c_fwcmd_mutex), NULL);
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return ret;
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}
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void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode)
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{
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SETPWRMODE_PARM H2CSetPwrMode;
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struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
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u8 RLBM = 0; /* 0:Min, 1:Max , 2:User define */
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u8 allQueueUAPSD = 0;
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RTW_INFO("%s: Mode=%d SmartPS=%d \n", __FUNCTION__, Mode, pwrpriv->smart_ps);
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H2CSetPwrMode.AwakeInterval = 2; /* DTIM = 1 */
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switch (Mode) {
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case PS_MODE_ACTIVE:
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H2CSetPwrMode.Mode = 0;
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break;
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case PS_MODE_MIN:
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H2CSetPwrMode.Mode = 1;
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break;
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case PS_MODE_MAX:
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RLBM = 1;
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H2CSetPwrMode.Mode = 1;
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break;
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case PS_MODE_DTIM:
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RLBM = 2;
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H2CSetPwrMode.AwakeInterval = 3; /* DTIM = 2 */
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H2CSetPwrMode.Mode = 1;
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break;
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case PS_MODE_UAPSD_WMM:
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H2CSetPwrMode.Mode = 2;
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break;
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default:
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H2CSetPwrMode.Mode = 0;
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break;
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}
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/* H2CSetPwrMode.Mode = Mode; */
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H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f));
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H2CSetPwrMode.bAllQueueUAPSD = allQueueUAPSD;
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if (Mode > 0) {
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H2CSetPwrMode.PwrState = 0x00;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
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#ifdef CONFIG_EXT_CLK
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H2CSetPwrMode.Mode |= BIT(7);/* supporting 26M XTAL CLK_Request feature. */
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#endif /* CONFIG_EXT_CLK */
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} else
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H2CSetPwrMode.PwrState = 0x0C;/* AllON(0x0C), RFON(0x04), RFOFF(0x00) */
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FillH2CCmd_88E(padapter, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
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}
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/*
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* Description: Get the reserved page number in Tx packet buffer.
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* Retrun value: the page number.
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* 2012.08.09, by tynli.
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* */
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u8
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GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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u8 RsvdPageNum = 0;
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/* default reseved 1 page for the IC type which is undefined. */
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u8 TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter);
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rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy);
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RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(padapter) - TxPageBndy + 1;
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return RsvdPageNum;
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}
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void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus)
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{
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JOINBSSRPT_PARM_88E JoinBssRptParm;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
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struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
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#ifdef CONFIG_WOWLAN
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struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
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struct sta_info *psta = NULL;
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#endif
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BOOLEAN bSendBeacon = _FALSE;
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BOOLEAN bcn_valid = _FALSE;
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u8 DLBcnCount = 0;
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u32 poll = 0;
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u8 RegFwHwTxQCtrl = 0;
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RTW_INFO("%s mstatus(%x)\n", __FUNCTION__, mstatus);
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if (mstatus == 1) {
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u8 bcn_ctrl = rtw_read8(padapter, REG_BCN_CTRL);
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/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
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/* Suggested by filen. Added by tynli. */
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rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
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/* Hw sequende enable by dedault. 2010.06.23. by tynli. */
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/* rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); */
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/* rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); */
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/* Set REG_CR bit 8. DMA beacon by SW. */
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rtw_write8(padapter, REG_CR + 1,
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rtw_read8(padapter, REG_CR + 1) | BIT0);
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/* Disable Hw protection for a time which revserd for Hw sending beacon. */
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/* Fix download reserved page packet fail that access collision with the protection time. */
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/* 2010.05.11. Added by tynli. */
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rtw_write8(padapter, REG_BCN_CTRL, (bcn_ctrl & (~EN_BCN_FUNCTION)) | DIS_TSF_UDT);
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RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2);
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if (RegFwHwTxQCtrl & BIT6) {
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RTW_INFO("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
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bSendBeacon = _TRUE;
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}
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/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
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RegFwHwTxQCtrl &= (~BIT6);
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rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
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/* Clear beacon valid check bit. */
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rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
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DLBcnCount = 0;
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poll = 0;
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do {
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/* download rsvd page.*/
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rtw_hal_set_fw_rsvd_page(padapter, _FALSE);
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DLBcnCount++;
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do {
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rtw_yield_os();
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/* rtw_mdelay_os(10); */
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/* check rsvd page download OK. */
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rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
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poll++;
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} while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter));
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} while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter));
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/* RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); */
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if (RTW_CANNOT_RUN(padapter))
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;
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else if (!bcn_valid)
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RTW_ERR(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
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ADPT_ARG(padapter) , DLBcnCount, poll);
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else {
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struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
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pwrctl->fw_psmode_iface_id = padapter->iface_id;
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rtw_hal_set_fw_rsvd_page(padapter, _TRUE);
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RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n",
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ADPT_ARG(padapter), DLBcnCount, poll);
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}
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/* restore bcn_ctrl */
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rtw_write8(padapter, REG_BCN_CTRL, bcn_ctrl);
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/* To make sure that if there exists an adapter which would like to send beacon. */
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/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
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/* prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
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/* the beacon cannot be sent by HW. */
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/* 2010.06.23. Added by tynli. */
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if (bSendBeacon) {
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RegFwHwTxQCtrl |= BIT6;
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rtw_write8(padapter, REG_FWHW_TXQ_CTRL + 2, RegFwHwTxQCtrl);
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}
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/* */
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/* Update RSVD page location H2C to Fw. */
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/* */
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if (bcn_valid) {
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rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
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RTW_INFO("Set RSVD page location to Fw.\n");
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/* FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); */
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}
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/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
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/* if(!padapter->bEnterPnpSleep) */
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#ifndef CONFIG_PCI_HCI
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{
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/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
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rtw_write8(padapter, REG_CR + 1,
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rtw_read8(padapter, REG_CR + 1) & (~BIT0));
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}
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#endif /* !CONFIG_PCI_HCI */
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}
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}
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#ifdef CONFIG_P2P_PS
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void rtl8188e_set_p2p_ps_offload_cmd(_adapter *padapter, u8 p2p_ps_state)
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{
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
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struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
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struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
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struct P2P_PS_Offload_t *p2p_ps_offload = (struct P2P_PS_Offload_t *)(&pHalData->p2p_ps_offload);
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u8 i;
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#if 1
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switch (p2p_ps_state) {
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case P2P_PS_DISABLE:
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RTW_INFO("P2P_PS_DISABLE\n");
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_rtw_memset(p2p_ps_offload, 0 , 1);
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break;
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case P2P_PS_ENABLE:
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RTW_INFO("P2P_PS_ENABLE\n");
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/* update CTWindow value. */
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if (pwdinfo->ctwindow > 0) {
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p2p_ps_offload->CTWindow_En = 1;
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rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow);
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}
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/* hw only support 2 set of NoA */
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for (i = 0 ; i < pwdinfo->noa_num ; i++) {
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/* To control the register setting for which NOA */
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rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4));
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if (i == 0)
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p2p_ps_offload->NoA0_En = 1;
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else
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p2p_ps_offload->NoA1_En = 1;
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/* config P2P NoA Descriptor Register */
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/* RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); */
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rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
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/* RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); */
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rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
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/* RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); */
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rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
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/* RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); */
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rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
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}
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if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
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/* rst p2p circuit */
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rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4));
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p2p_ps_offload->Offload_En = 1;
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if (pwdinfo->role == P2P_ROLE_GO) {
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p2p_ps_offload->role = 1;
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p2p_ps_offload->AllStaSleep = 0;
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} else
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p2p_ps_offload->role = 0;
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p2p_ps_offload->discovery = 0;
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}
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break;
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case P2P_PS_SCAN:
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RTW_INFO("P2P_PS_SCAN\n");
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p2p_ps_offload->discovery = 1;
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break;
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case P2P_PS_SCAN_DONE:
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RTW_INFO("P2P_PS_SCAN_DONE\n");
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p2p_ps_offload->discovery = 0;
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pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
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break;
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default:
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break;
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}
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FillH2CCmd_88E(padapter, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
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#endif
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}
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#endif /* CONFIG_P2P_PS */
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