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include/rtl8812a_xmit.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8812A_XMIT_H__
#define __RTL8812A_XMIT_H__
/* For 88e early mode */
#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
/*
* defined for TX DESC Operation
* */
#define MAX_TID (15)
/* OFFSET 0 */
#define OFFSET_SZ 0
#define OFFSET_SHT 16
#define BMC BIT(24)
#define LSG BIT(26)
#define FSG BIT(27)
#define OWN BIT(31)
/* OFFSET 4 */
#define PKT_OFFSET_SZ 0
#define QSEL_SHT 8
#define RATE_ID_SHT 16
#define NAVUSEHDR BIT(20)
#define SEC_TYPE_SHT 22
#define PKT_OFFSET_SHT 26
/* OFFSET 8 */
#define AGG_EN BIT(12)
#define AGG_BK BIT(16)
#define AMPDU_DENSITY_SHT 20
#define ANTSEL_A BIT(24)
#define ANTSEL_B BIT(25)
#define TX_ANT_CCK_SHT 26
#define TX_ANTL_SHT 28
#define TX_ANT_HT_SHT 30
/* OFFSET 12 */
#define SEQ_SHT 16
#define EN_HWSEQ BIT(31)
/* OFFSET 16 */
#define QOS BIT(6)
#define HW_SSN BIT(7)
#define USERATE BIT(8)
#define DISDATAFB BIT(10)
#define CTS_2_SELF BIT(11)
#define RTS_EN BIT(12)
#define HW_RTS_EN BIT(13)
#define DATA_SHORT BIT(24)
#define PWR_STATUS_SHT 15
#define DATA_SC_SHT 20
#define DATA_BW BIT(25)
/* OFFSET 20 */
#define RTY_LMT_EN BIT(17)
/* OFFSET 20 */
#define SGI BIT(6)
#define USB_TXAGG_NUM_SHT 24
typedef struct txdescriptor_8812 {
/* Offset 0 */
u32 pktlen:16;
u32 offset:8;
u32 bmc:1;
u32 htc:1;
u32 ls:1;
u32 fs:1;
u32 linip:1;
u32 noacm:1;
u32 gf:1;
u32 own:1;
/* Offset 4 */
u32 macid:6;
u32 rsvd0406:2;
u32 qsel:5;
u32 rd_nav_ext:1;
u32 lsig_txop_en:1;
u32 pifs:1;
u32 rate_id:4;
u32 navusehdr:1;
u32 en_desc_id:1;
u32 sectype:2;
u32 rsvd0424:2;
u32 pkt_offset:5; /* unit: 8 bytes */
u32 rsvd0431:1;
/* Offset 8 */
u32 rts_rc:6;
u32 data_rc:6;
u32 agg_en:1;
u32 rd_en:1;
u32 bar_rty_th:2;
u32 bk:1;
u32 morefrag:1;
u32 raw:1;
u32 ccx:1;
u32 ampdu_density:3;
u32 bt_null:1;
u32 ant_sel_a:1;
u32 ant_sel_b:1;
u32 tx_ant_cck:2;
u32 tx_antl:2;
u32 tx_ant_ht:2;
/* Offset 12 */
u32 nextheadpage:8;
u32 tailpage:8;
u32 seq:12;
u32 cpu_handle:1;
u32 tag1:1;
u32 trigger_int:1;
u32 hwseq_en:1;
/* Offset 16 */
u32 rtsrate:5;
u32 ap_dcfe:1;
u32 hwseq_sel:2;
u32 userate:1;
u32 disrtsfb:1;
u32 disdatafb:1;
u32 cts2self:1;
u32 rtsen:1;
u32 hw_rts_en:1;
u32 port_id:1;
u32 pwr_status:3;
u32 wait_dcts:1;
u32 cts2ap_en:1;
u32 data_sc:2;
u32 data_stbc:2;
u32 data_short:1;
u32 data_bw:1;
u32 rts_short:1;
u32 rts_bw:1;
u32 rts_sc:2;
u32 vcs_stbc:2;
/* Offset 20 */
u32 datarate:6;
u32 sgi:1;
u32 try_rate:1;
u32 data_ratefb_lmt:5;
u32 rts_ratefb_lmt:4;
u32 rty_lmt_en:1;
u32 data_rt_lmt:6;
u32 usb_txagg_num:8;
/* Offset 24 */
u32 txagg_a:5;
u32 txagg_b:5;
u32 use_max_len:1;
u32 max_agg_num:5;
u32 mcsg1_max_len:4;
u32 mcsg2_max_len:4;
u32 mcsg3_max_len:4;
u32 mcs7_sgi_max_len:4;
/* Offset 28 */
u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */
u32 mcsg4_max_len:4;
u32 mcsg5_max_len:4;
u32 mcsg6_max_len:4;
u32 mcs15_sgi_max_len:4;
/* Offset 32 */
u32 rsvd32;
/* Offset 36 */
u32 rsvd36;
} TXDESC_8812, *PTXDESC_8812;
/* Dword 0 */
#define GET_TX_DESC_OWN_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
#define SET_TX_DESC_PKT_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
#define SET_TX_DESC_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
#define SET_TX_DESC_BMC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
#define SET_TX_DESC_HTC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
#define SET_TX_DESC_LAST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value)
#define SET_TX_DESC_FIRST_SEG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
#define SET_TX_DESC_LINIP_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value)
#define SET_TX_DESC_NO_ACM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
#define SET_TX_DESC_GF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
#define SET_TX_DESC_OWN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
/* Dword 1 */
#define SET_TX_DESC_MACID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
#define SET_TX_DESC_QUEUE_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
#define SET_TX_DESC_RDG_NAV_EXT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
#define SET_TX_DESC_LSIG_TXOP_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
#define SET_TX_DESC_PIFS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
#define SET_TX_DESC_RATE_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
#define SET_TX_DESC_EN_DESC_ID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
#define SET_TX_DESC_SEC_TYPE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
#define SET_TX_DESC_PKT_OFFSET_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
/* Dword 2 */
#define SET_TX_DESC_PAID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
#define SET_TX_DESC_CCA_RTS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
#define SET_TX_DESC_AGG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
#define SET_TX_DESC_RDG_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
#define SET_TX_DESC_AGG_BREAK_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
#define SET_TX_DESC_MORE_FRAG_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
#define SET_TX_DESC_RAW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
#define SET_TX_DESC_SPE_RPT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
#define SET_TX_DESC_AMPDU_DENSITY_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
#define SET_TX_DESC_BT_INT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
#define SET_TX_DESC_GID_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value)
/* Dword 3 */
#define SET_TX_DESC_WHEADER_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value)
#define SET_TX_DESC_CHK_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value)
#define SET_TX_DESC_EARLY_MODE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value)
#define SET_TX_DESC_HWSEQ_SEL_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
#define SET_TX_DESC_USE_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
#define SET_TX_DESC_DISABLE_RTS_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
#define SET_TX_DESC_DISABLE_FB_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
#define SET_TX_DESC_CTS2SELF_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
#define SET_TX_DESC_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
#define SET_TX_DESC_HW_RTS_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
#define SET_TX_DESC_NAV_USE_HDR_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value)
#define SET_TX_DESC_USE_MAX_LEN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
#define SET_TX_DESC_MAX_AGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
#define SET_TX_DESC_NDPA_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value)
#define SET_TX_DESC_AMPDU_MAX_TIME_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
/* Dword 4 */
#define SET_TX_DESC_TX_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
#define SET_TX_DESC_DATA_RETRY_LIMIT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
#define SET_TX_DESC_RTS_RATE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
/* Dword 5 */
#define SET_TX_DESC_DATA_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
#define SET_TX_DESC_DATA_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
#define SET_TX_DESC_DATA_BW_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
#define SET_TX_DESC_DATA_LDPC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value)
#define SET_TX_DESC_DATA_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
#define SET_TX_DESC_CTROL_STBC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
#define SET_TX_DESC_RTS_SHORT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
#define SET_TX_DESC_RTS_SC_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
#define SET_TX_DESC_TX_ANT_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value)
/* Dword 6 */
#define SET_TX_DESC_SW_DEFINE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
#define SET_TX_DESC_ANTSEL_A_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
#define SET_TX_DESC_ANTSEL_B_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value)
#define SET_TX_DESC_ANTSEL_C_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value)
#define SET_TX_DESC_ANTSEL_D_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value)
#define SET_TX_DESC_MBSSID_8821(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
/* Dword 7 */
#define SET_TX_DESC_TX_BUFFER_SIZE_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
#define SET_TX_DESC_TX_DESC_CHECKSUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
#define SET_TX_DESC_USB_TXAGG_NUM_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
#ifdef CONFIG_SDIO_HCI
#define SET_TX_DESC_SDIO_TXSEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
#endif
/* Dword 8 */
#define SET_TX_DESC_HWSEQ_EN_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
/* Dword 9 */
#define SET_TX_DESC_SEQ_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
/* Dword 10 */
#define SET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value)
#define GET_TX_DESC_TX_BUFFER_ADDRESS_8812(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32)
/* Dword 11 */
#define SET_TX_DESC_NEXT_DESC_ADDRESS_8812(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value)
#define SET_EARLYMODE_PKTNUM_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
#define SET_EARLYMODE_LEN0_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
#define SET_EARLYMODE_LEN1_1_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
#define SET_EARLYMODE_LEN1_2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
#define SET_EARLYMODE_LEN2_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value)
#define SET_EARLYMODE_LEN3_8812(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
#ifdef CONFIG_TX_EARLY_MODE
#define USB_DUMMY_OFFSET 2
#else
#define USB_DUMMY_OFFSET 1
#endif
#define USB_DUMMY_LENGTH (USB_DUMMY_OFFSET * PACKET_OFFSET_SZ)
void rtl8812a_cal_txdesc_chksum(u8 *ptxdesc);
void rtl8812a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
void rtl8812a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc);
void rtl8812a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc);
void rtl8812a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc);
void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
#ifdef CONFIG_USB_HCI
s32 rtl8812au_init_xmit_priv(PADAPTER padapter);
void rtl8812au_free_xmit_priv(PADAPTER padapter);
s32 rtl8812au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8812au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
#ifdef CONFIG_RTW_MGMT_QUEUE
s32 rtl8812au_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
#endif
s32 rtl8812au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtl8812au_xmit_buf_handler(PADAPTER padapter);
void rtl8812au_xmit_tasklet(void *priv);
s32 rtl8812au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8812ae_init_xmit_priv(PADAPTER padapter);
void rtl8812ae_free_xmit_priv(PADAPTER padapter);
struct xmit_buf *rtl8812ae_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8812ae_xmitframe_resume(_adapter *padapter);
s32 rtl8812ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8812ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
#ifdef CONFIG_RTW_MGMT_QUEUE
s32 rtl8812ae_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
#endif
s32 rtl8812ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
void rtl8812ae_xmit_tasklet(void *priv);
#ifdef CONFIG_XMIT_THREAD_MODE
s32 rtl8812ae_xmit_buf_handler(_adapter *padapter);
#endif
#endif
#ifdef CONFIG_TX_EARLY_MODE
void UpdateEarlyModeInfo8812(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif
void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc);
u8 BWMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib);
u8 SCMapping_8812(PADAPTER Adapter, struct pkt_attrib *pattrib);
#endif /* __RTL8812_XMIT_H__ */
#ifdef CONFIG_RTL8821A
#include "rtl8821a_xmit.h"
#endif /* CONFIG_RTL8821A */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_CMD_H__
#define __RTL8814A_CMD_H__
#include "hal_com_h2c.h"
/* _RSVDPAGE_LOC_CMD0 */
#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_8814A_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_8814A_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
#define SET_8814A_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
#define SET_8814A_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
/* _SETPWRMODE_PARM */
#define SET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value)
#define SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
#define GET_8814A_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8)
/* _WoWLAN PARAM_CMD5 */
#define SET_8814A_H2CCMD_WOWLAN_FUNC_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_PATTERN_MATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_MAGIC_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_UNICAST_PKT_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_ALL_PKT_DROP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_GPIO_ACTIVE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_REKEY_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_DISCONNECT_WAKE_UP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value)
#define SET_8814A_H2CCMD_WOWLAN_GPIONUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_8814A_H2CCMD_WOWLAN_GPIO_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
/* WLANINFO_PARM */
#define SET_8814A_H2CCMD_WLANINFO_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_8814A_H2CCMD_WLANINFO_PARM_CHANNEL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_8814A_H2CCMD_WLANINFO_PARM_BW40MHZ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
/* _REMOTE_WAKEUP_CMD7 */
#define SET_8814A_H2CCMD_REMOTE_WAKECTRL_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_ARP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
#define SET_8814A_H2CCMD_REMOTE_WAKE_CTRL_GTK_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
/* _AP_OFFLOAD_CMD8 */
#define SET_8814A_H2CCMD_AP_OFFLOAD_ON(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_8814A_H2CCMD_AP_OFFLOAD_HIDDEN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_8814A_H2CCMD_AP_OFFLOAD_DENYANY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
#define SET_8814A_H2CCMD_AP_OFFLOAD_WAKEUP_EVT_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
/* _PWR_MOD_CMD20 */
#define SET_88E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_88E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value)
#define SET_88E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value)
#define SET_88E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
#define SET_88E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value)
#define SET_88E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value)
/* AP_REQ_TXREP_CMD 0x43 */
#define SET_8814A_H2CCMD_TXREP_PARM_STA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_8814A_H2CCMD_TXREP_PARM_STA2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_8814A_H2CCMD_TXREP_PARM_RTY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 2, __Value)
/* C2H_AP_REQ_TXRPT */
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID1(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE1(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_MACID2(_Header) LE_BITS_TO_1BYTE((_Header + 6), 0, 8)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXOK2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_TXFAIL2(_Header) LE_BITS_TO_2BYTE((_Header + 9), 0, 16)
#define GET_8814A_C2H_TC2H_APREQ_TXRPT_INIRATE2(_Header) LE_BITS_TO_1BYTE((_Header + 11), 0, 8)
/* C2H_SPC_STAT */
#define GET_8814A_C2H_SPC_STAT_IDX(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 8)
/* Tip :TYPE_A data3 is msb and data0 is lsb */
#define GET_8814A_C2H_SPC_STAT_TYPEA_RETRY(_Header) LE_BITS_TO_4BYTE((_Header + 1), 0, 32)
#define GET_8814A_C2H_SPC_STAT_TYPEB_PKT1(_Header) LE_BITS_TO_2BYTE((_Header + 1), 0, 16)
#define GET_8814A_C2H_SPC_STAT_TYPEB_RETRY1(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16)
#define GET_8814A_C2H_SPC_STAT_TYPEB_PKT2(_Header) LE_BITS_TO_2BYTE((_Header + 5), 0, 16)
#define GET_8814A_C2H_SPC_STAT_TYPEB_RETRY2(_Header) LE_BITS_TO_2BYTE((_Header + 7), 0, 16)
/*BCNHWSEQ*/
#define SET_8814A_H2CCMD_BCNHWSEQ_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 1, __Value)
#define SET_8814A_H2CCMD_BCNHWSEQ_BCN_NUMBER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 1, 3, __Value)
#define SET_8814A_H2CCMD_BCNHWSEQ_HWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 6, 1, __Value)
#define SET_8814A_H2CCMD_BCNHWSEQ_EXHWSEQ(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 7, 1, __Value)
#define SET_8814A_H2CCMD_BCNHWSEQ_PAGE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
void rtl8814_fw_update_beacon_cmd(_adapter *padapter);
/* TX Beamforming */
#define GET_8814A_C2H_TXBF_ORIGINATE(_Header) LE_BITS_TO_1BYTE(_Header, 0, 8)
#define GET_8814A_C2H_TXBF_MACID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8)
/* / TX Feedback Content */
#define USEC_UNIT_FOR_8814A_C2H_TX_RPT_QUEUE_TIME 256
#define GET_8814A_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5)
#define GET_8814A_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1)
#define GET_8814A_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1)
#define GET_8814A_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1)
#define GET_8814A_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8)
#define GET_8814A_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6)
#define GET_8814A_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) /* In unit of 256 microseconds. */
#define GET_8814A_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8)
/* _P2P_PS_OFFLOAD */
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
#define SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value)
s32 FillH2CCmd_8814(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
void rtl8814_set_wowlan_cmd(_adapter *padapter, u8 enable);
void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode);
u8 GetTxBufferRsvdPageNum8814(_adapter *padapter, bool wowlan);
void rtl8814_req_txrpt_cmd(PADAPTER padapter, u8 macid);
void rtl8814a_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param);
void
Set_RA_LDPC_8814(
struct sta_info *psta,
BOOLEAN bLDPC
);
s32 c2h_handler_8814a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload);
#ifdef CONFIG_BT_COEXIST
void rtl8814a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter);
#endif /* CONFIG_BT_COEXIST */
#ifdef CONFIG_P2P_PS
void rtl8814_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
#endif /* CONFIG_P2P */
#endif/* __RTL8814A_CMD_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_DM_H__
#define __RTL8814A_DM_H__
void rtl8814_init_dm_priv(PADAPTER Adapter);
void rtl8814_deinit_dm_priv(PADAPTER Adapter);
void rtl8814_InitHalDm(PADAPTER Adapter);
void rtl8814_HalDmWatchDog(PADAPTER Adapter);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_HAL_H__
#define __RTL8814A_HAL_H__
/* #include "hal_com.h" */
#include "hal_data.h"
/* include HAL Related header after HAL Related compiling flags */
#include "rtl8814a_spec.h"
#include "rtl8814a_rf.h"
#include "rtl8814a_dm.h"
#include "rtl8814a_recv.h"
#include "rtl8814a_xmit.h"
#include "rtl8814a_cmd.h"
#include "rtl8814a_led.h"
#include "Hal8814PwrSeq.h"
#include "Hal8814PhyReg.h"
#include "Hal8814PhyCfg.h"
#ifdef DBG_CONFIG_ERROR_DETECT
#include "rtl8814a_sreset.h"
#endif /* DBG_CONFIG_ERROR_DETECT */
enum {
VOLTAGE_V25 = 0x03,
LDOE25_SHIFT = 28 ,
};
/* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/
#define FW_SIZE 0x18000
#define FW_START_ADDRESS 0x1000
typedef struct _RT_FIRMWARE_8814 {
FIRMWARE_SOURCE eFWSource;
#ifdef CONFIG_EMBEDDED_FWIMG
u8 *szFwBuffer;
#else
u8 szFwBuffer[FW_SIZE];
#endif
u32 ulFwLength;
} RT_FIRMWARE_8814, *PRT_FIRMWARE_8814;
#define PAGE_SIZE_TX_8814 PAGE_SIZE_128
/* BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8814
* PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/
#define BCNQ_PAGE_NUM_8814 (MAX_BEACON_LEN / PAGE_SIZE_TX_8814 + 6) /*0x08*/
#define Rtl8814A_NIC_PWR_ON_FLOW rtl8814A_power_on_flow
#define Rtl8814A_NIC_RF_OFF_FLOW rtl8814A_radio_off_flow
#define Rtl8814A_NIC_DISABLE_FLOW rtl8814A_card_disable_flow
#define Rtl8814A_NIC_ENABLE_FLOW rtl8814A_card_enable_flow
#define Rtl8814A_NIC_SUSPEND_FLOW rtl8814A_suspend_flow
#define Rtl8814A_NIC_RESUME_FLOW rtl8814A_resume_flow
#define Rtl8814A_NIC_PDN_FLOW rtl8814A_hwpdn_flow
#define Rtl8814A_NIC_LPS_ENTER_FLOW rtl8814A_enter_lps_flow
#define Rtl8814A_NIC_LPS_LEAVE_FLOW rtl8814A_leave_lps_flow
/* *****************************************************
* New Firmware Header(8-byte alinment required)
* *****************************************************
* --- LONG WORD 0 ---- */
#define GET_FIRMWARE_HDR_SIGNATURE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16)
#define GET_FIRMWARE_HDR_CATEGORY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */
#define GET_FIRMWARE_HDR_FUNCTION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */
#define GET_FIRMWARE_HDR_VERSION_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */
#define GET_FIRMWARE_HDR_SUB_VER_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */
#define GET_FIRMWARE_HDR_SUB_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) /* FW Subversion Index */
/* --- LONG WORD 1 ---- */
#define GET_FIRMWARE_HDR_SVN_IDX_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 32)/* The SVN entry index */
#define GET_FIRMWARE_HDR_RSVD1_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 32)
/* --- LONG WORD 2 ---- */
#define GET_FIRMWARE_HDR_MONTH_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 8) /* Release time Month field */
#define GET_FIRMWARE_HDR_DATE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 8, 8) /* Release time Date field */
#define GET_FIRMWARE_HDR_HOUR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 16, 8)/* Release time Hour field */
#define GET_FIRMWARE_HDR_MINUTE_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 24, 8)/* Release time Minute field */
#define GET_FIRMWARE_HDR_YEAR_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 16)/* Release time Year field */
#define GET_FIRMWARE_HDR_FOUNDRY_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 16, 8)/* Release time Foundry field */
#define GET_FIRMWARE_HDR_RSVD2_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 24, 8)
/* --- LONG WORD 3 ---- */
#define GET_FIRMWARE_HDR_MEM_UASGE_DL_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 1)
#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_FROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 1, 1)
#define GET_FIRMWARE_HDR_MEM_UASGE_BOOT_LOADER_3081(__FwHdr)LE_BITS_TO_4BYTE(__FwHdr+24, 2, 1)
#define GET_FIRMWARE_HDR_MEM_UASGE_IRAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 3, 1)
#define GET_FIRMWARE_HDR_MEM_UASGE_ERAM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 4, 1)
#define GET_FIRMWARE_HDR_MEM_UASGE_RSVD4_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 5, 3)
#define GET_FIRMWARE_HDR_RSVD3_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 8, 8)
#define GET_FIRMWARE_HDR_BOOT_LOADER_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 16, 16)
#define GET_FIRMWARE_HDR_RSVD5_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)
/* --- LONG WORD 4 ---- */
#define GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 32)
#define GET_FIRMWARE_HDR_FW_CFG_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 0, 16)
#define GET_FIRMWARE_HDR_FW_ATTR_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+36, 16, 16)
/* --- LONG WORD 5 ---- */
#define GET_FIRMWARE_HDR_IROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+40, 0, 32)
#define GET_FIRMWARE_HDR_EROM_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+44, 0, 32)
/* --- LONG WORD 6 ---- */
#define GET_FIRMWARE_HDR_IRAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+48, 0, 32)
#define GET_FIRMWARE_HDR_ERAM_SZ_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+52, 0, 32)
/* --- LONG WORD 7 ---- */
#define GET_FIRMWARE_HDR_RSVD6_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+56, 0, 32)
#define GET_FIRMWARE_HDR_RSVD7_3081(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+60, 0, 32)
/*
* 2013/08/16 MH MOve from SDIO.h for common use.
* */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI)
#define TRX_SHARE_MODE_8814A 0 /* TRX Buffer Share Index */
#define BASIC_RXFF_SIZE_8814A 24576/* Basic RXFF Size is 24K = 24*1024 Unit: Byte */
#define TRX_SHARE_BUFF_UNIT_8814A 65536/* TRX Share Buffer unit Size 64K = 64*1024 Unit: Byte */
#define TRX_SHARE_BUFF_UNIT_PAGE_8814A (TRX_SHARE_BUFF_UNIT_8814A/PAGE_SIZE_8814A)/* 512 Pages */
/* Origin: */
#define HPQ_PGNUM_8814A 0x20 /* High Queue */
#define LPQ_PGNUM_8814A 0x20 /* Low Queue */
#define NPQ_PGNUM_8814A 0x20 /* Normal Queue */
#define EPQ_PGNUM_8814A 0x20 /* Extra Queue */
#else /* #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) */
#define HPQ_PGNUM_8814A 20
#define NPQ_PGNUM_8814A 20
#define LPQ_PGNUM_8814A 20 /* 1972 */
#define EPQ_PGNUM_8814A 20
#define BCQ_PGNUM_8814A 32
#endif /* #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) */
#ifdef CONFIG_WOWLAN
#define WOWLAN_PAGE_NUM_8814 0x06
#else
#define WOWLAN_PAGE_NUM_8814 0x00
#endif
#define PAGE_SIZE_8814A 128/* TXFF Page Size, Unit: Byte */
#define MAX_RX_DMA_BUFFER_SIZE_8814A 0x5C00 /* BASIC_RXFF_SIZE_8814A + TRX_SHARE_MODE_8814A * TRX_SHARE_BUFF_UNIT_8814A */ /* Basic RXFF Size + ShareBuffer Size */
#define TX_PAGE_BOUNDARY_8814A TXPKT_PGNUM_8814A /* Need to enlarge boundary, by KaiYuan */
#define TX_PAGE_BOUNDARY_WOWLAN_8814A TXPKT_PGNUM_8814A /* TODO: 20130415 KaiYuan Check this value later */
#ifdef CONFIG_FW_C2H_DEBUG
#define RX_DMA_RESERVED_SIZE_8814A 0x100 /* 256B, reserved for c2h debug message */
#else
#define RX_DMA_RESERVED_SIZE_8814A 0x0 /* 0B */
#endif
#define RX_DMA_BOUNDARY_8814A (MAX_RX_DMA_BUFFER_SIZE_8814A - RX_DMA_RESERVED_SIZE_8814A - 1)
#define TOTAL_PGNUM_8814A 2048
#define TXPKT_PGNUM_8814A (2048 - BCNQ_PAGE_NUM_8814-WOWLAN_PAGE_NUM_8814)
#define PUB_PGNUM_8814A (TXPKT_PGNUM_8814A-HPQ_PGNUM_8814A-NPQ_PGNUM_8814A-LPQ_PGNUM_8814A-EPQ_PGNUM_8814A)
/* Note: For WMM Normal Chip Setting ,modify later */
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A TX_PAGE_BOUNDARY_8814A
#define WMM_NORMAL_TX_PAGE_BOUNDARY_8814A (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8814A + 1)
#define DRIVER_EARLY_INT_TIME_8814 0x05
#define BCN_DMA_ATIME_INT_TIME_8814 0x02
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define EFUSE_MAX_SECTION_JAGUAR 64
#define HWSET_MAX_SIZE_8814A 512
#define EFUSE_REAL_CONTENT_LEN_8814A 1024
#define EFUSE_MAX_BANK_8814A 2
#define EFUSE_MAP_LEN_8814A 512
#define EFUSE_MAX_SECTION_8814A 64
#define EFUSE_MAX_WORD_UNIT_8814A 4
#define EFUSE_PROTECT_BYTES_BANK_8814A 16
#define EFUSE_IC_ID_OFFSET_8814A 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */
#define AVAILABLE_EFUSE_ADDR_8814A(addr) (addr < EFUSE_REAL_CONTENT_LEN_8814A)
/*-------------------------------------------------------------------------
Chip specific
-------------------------------------------------------------------------*/
/* pic buffer descriptor */
#if 1 /* according to the define in the rtw_xmit.h, rtw_recv.h */
#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */
#define TX_DESC_NUM_8814A TX_BD_NUM /* 128 */
#define RX_DESC_NUM_8814A PCI_MAX_RX_COUNT /* 128 */
#ifdef CONFIG_CONCURRENT_MODE
#define BE_QUEUE_TX_DESC_NUM_8814A (TX_BD_NUM<<1) /* 256 */
#else
#define BE_QUEUE_TX_DESC_NUM_8814A (TX_BD_NUM+(TX_BD_NUM>>1)) /* 192 */
#endif
#else
#define RTL8814AE_SEG_NUM TX_BUFFER_SEG_NUM /* 0:2 seg, 1: 4 seg, 2: 8 seg */
#define TX_DESC_NUM_8814A 128 /* 1024//2048 change by ylb 20130624 */
#define RX_DESC_NUM_8814A 128 /* 1024 //512 change by ylb 20130624 */
#endif
/* <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
* 9bytes + 1byt + 5bytes and pre 1byte.
* For worst case:
* | 1byte|----8bytes----|1byte|--5bytes--|
* | | Reserved(14bytes) |
* */
#define EFUSE_OOB_PROTECT_BYTES 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */
#ifdef CONFIG_FILE_FWIMG
extern char *rtw_fw_file_path;
#ifdef CONFIG_WOWLAN
extern char *rtw_fw_wow_file_path;
#endif
#ifdef CONFIG_MP_INCLUDED
extern char *rtw_fw_mp_bt_file_path;
#endif /* CONFIG_MP_INCLUDED */
#endif /* CONFIG_FILE_FWIMG */
/* rtl8814_hal_init.c */
s32 FirmwareDownload8814A(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);
void InitializeFirmwareVars8814(PADAPTER padapter);
void
Hal_InitEfuseVars_8814A(
PADAPTER Adapter
);
s32 InitLLTTable8814A(
PADAPTER Adapter
);
void InitRDGSetting8814A(PADAPTER padapter);
/* void CheckAutoloadState8812A(PADAPTER padapter); */
/* EFuse */
u8 GetEEPROMSize8814A(PADAPTER padapter);
void hal_InitPGData_8814A(
PADAPTER padapter,
u8 *PROMContent
);
void hal_ReadPROMVersion8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void hal_ReadTxPowerInfo8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void hal_ReadBoardType8814A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void hal_ReadThermalMeter_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
void hal_ReadChannelPlan8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void hal_EfuseParseXtal_8814A(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void hal_ReadAntennaDiversity8814A(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail);
void hal_Read_TRX_antenna_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
void hal_ReadAmplifierType_8814A(
PADAPTER Adapter
);
void hal_ReadPAType_8814A(
PADAPTER Adapter,
u8 *PROMContent,
BOOLEAN AutoloadFail,
u8 *pPAType,
u8 *pLNAType
);
void hal_GetRxGainOffset_8814A(
PADAPTER Adapter,
u8 *PROMContent,
BOOLEAN AutoloadFail
);
void Hal_EfuseParseKFreeData_8814A(
PADAPTER Adapter,
u8 *PROMContent,
BOOLEAN AutoloadFail);
void hal_ReadRFEType_8814A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
void hal_EfuseParseBTCoexistInfo8814A(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
/* void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);
* int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); */
void hal_ReadRemoteWakeup_8814A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
u8 MgntQuery_NssTxRate(u16 Rate);
/* BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter); */
#ifdef CONFIG_WOWLAN
void Hal_DetectWoWMode(PADAPTER pAdapter);
#endif /* CONFIG_WOWLAN */
void _InitBeaconParameters_8814A(PADAPTER padapter);
void SetBeaconRelatedRegisters8814A(PADAPTER padapter);
void ReadRFType8814A(PADAPTER padapter);
void InitDefaultValue8814A(PADAPTER padapter);
u8 SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval);
void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval);
u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);
void rtl8814_set_hal_ops(struct hal_ops *pHalFunc);
void init_hal_spec_8814a(_adapter *adapter);
void rtl8814_start_thread(PADAPTER padapter);
void rtl8814_stop_thread(PADAPTER padapter);
#ifdef CONFIG_PCI_HCI
BOOLEAN InterruptRecognized8814AE(PADAPTER Adapter);
void UpdateInterruptMask8814AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
void InitMAC_TRXBD_8814AE(PADAPTER Adapter);
void rtl8814ae_reset_desc_ring(_adapter *padapter);
u16 get_txbd_rw_reg(u16 ff_hwaddr);
#endif
#ifdef CONFIG_BT_COEXIST
void rtl8814a_combo_card_WifiOnlyHwInit(PADAPTER Adapter);
#endif
#endif /* __RTL8188E_HAL_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_LED_H__
#define __RTL8814A_LED_H__
#ifdef CONFIG_RTW_SW_LED
/* ********************************************************************************
* Interface to manipulate LED objects.
* ******************************************************************************** */
#ifdef CONFIG_USB_HCI
void rtl8814au_InitSwLeds(PADAPTER padapter);
void rtl8814au_DeInitSwLeds(PADAPTER padapter);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_PCI_HCI
void rtl8814ae_InitSwLeds(PADAPTER padapter);
void rtl8814ae_DeInitSwLeds(PADAPTER padapter);
#endif /* CONFIG_PCI_HCI */
#ifdef CONFIG_SDIO_HCI
void rtl8814s_InitSwLeds(PADAPTER padapter);
void rtl8814s_DeInitSwLeds(PADAPTER padapter);
#endif /* CONFIG_SDIO_HCI */
#endif /* __RTL8814A_LED_H__ */
#endif /*CONFIG_RTW_SW_LED*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_RECV_H__
#define __RTL8814A_RECV_H__
#if defined(CONFIG_USB_HCI)
#ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#ifdef CONFIG_PLATFORM_MSTAR
#define MAX_RECVBUF_SZ (8192) /* 8K */
#else
#define MAX_RECVBUF_SZ (32768) /* 32k */
#endif
/* #define MAX_RECVBUF_SZ (24576) */ /* 24k */
/* #define MAX_RECVBUF_SZ (20480) */ /* 20K */
/* #define MAX_RECVBUF_SZ (10240) */ /* 10K */
/* #define MAX_RECVBUF_SZ (15360) */ /* 15k < 16k */
/* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */
#else
#define MAX_RECVBUF_SZ (4000) /* about 4K */
#endif
#endif /* !MAX_RECVBUF_SZ */
#elif defined(CONFIG_PCI_HCI)
/* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */
/* #define MAX_RECVBUF_SZ (9100) */
/* #else */
#define MAX_RECVBUF_SZ (4000) /* about 4K
* #endif */
#elif defined(CONFIG_SDIO_HCI)
#if 0
/* temp solution */
#ifdef CONFIG_SDIO_RX_COPY
#define MAX_RECVBUF_SZ (10240)
#else /* !CONFIG_SDIO_RX_COPY */
#define MAX_RECVBUF_SZ MAX_RX_DMA_BUFFER_SIZE_8821
#endif /* !CONFIG_SDIO_RX_COPY */
#endif
#endif
/* RX buffer descriptor */
/* DWORD 0 */
#define SET_RX_BUFFER_DESC_DATA_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
#define SET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 14, 1, __Value)
#define SET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value)
#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 16, __Value)
#define GET_RX_BUFFER_DESC_OWN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
#define GET_RX_BUFFER_DESC_LS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
#define GET_RX_BUFFER_DESC_FS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15)
/* DWORD 1 */
#define SET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value)
#define GET_RX_BUFFER_PHYSICAL_LOW_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32)
/* DWORD 2 */
#define SET_RX_BUFFER_PHYSICAL_HIGH_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value)
/* DWORD 3*/ /* RESERVED */
#if 0
/* =============
* RX Info
* ============== */
#endif
/* DWORD 0 */
#define SET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
#define SET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
#define SET_RX_STATUS_DESC_OWN_8814AE(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
#define GET_RX_STATUS_DESC_PKT_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
#define GET_RX_STATUS_DESC_CRC32_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
#define GET_RX_STATUS_DESC_ICV_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
#define GET_RX_STATUS_DESC_SECURITY_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
#define GET_RX_STATUS_DESC_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
#define GET_RX_STATUS_DESC_SHIFT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
#define GET_RX_STATUS_DESC_PHY_STATUS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
#define GET_RX_STATUS_DESC_SWDEC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
#define GET_RX_STATUS_DESC_LAST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1)
#define GET_RX_STATUS_DESC_EOR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
/* DWORD 1 */
#define GET_RX_STATUS_DESC_MACID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 7)
#define GET_RX_STATUS_DESC_EXT_SECTYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)/* 20130415 KaiYuan add for 8814 */
#define GET_RX_STATUS_DESC_TID_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 4)
#define GET_RX_STATUS_DESC_MACID_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 12, 1)
#define GET_RX_STATUS_DESC_AMSDU_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 13, 1)
#define GET_RX_STATUS_DESC_RXID_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 14, 1)
#define GET_RX_STATUS_DESC_PAGGR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 15, 1)
#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 20, 1)
#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 21, 1)
#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 22, 1)
#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 23, 1)
#define GET_RX_STATUS_DESC_PAM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 24, 1)
#define GET_RX_STATUS_DESC_PWR_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 1)
#define GET_RX_STATUS_DESC_MORE_DATA_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 26, 1)
#define GET_RX_STATUS_DESC_MORE_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 27, 1)
#define GET_RX_STATUS_DESC_TYPE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 2)
#define GET_RX_STATUS_DESC_FIRST_SEG_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1)
#define GET_RX_STATUS_DESC_EOR_8814AE(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
#define GET_RX_STATUS_DESC_MC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 1)
#define GET_RX_STATUS_DESC_BC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 31, 1)
/* DWORD 2 */
#define GET_RX_STATUS_DESC_SEQ_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
#define GET_RX_STATUS_DESC_FRAG_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
#ifdef CONFIG_USB_RX_AGGREGATION
#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 8)
#else
#define GET_RX_STATUS_DESC_RX_IS_QOS_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
#endif
#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
#define GET_RX_STATUS_DESC_HWRSVD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 24, 4)
#define GET_RX_STATUS_C2H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
#define GET_RX_STATUS_DESC_FCS_OK_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
/* DWORD 3 */
#define GET_RX_STATUS_DESC_RX_RATE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
#define GET_RX_STATUS_DESC_BSSID_FIT_H_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 7, 3)/* 20130415 KaiYuan add for 8814 */
#define GET_RX_STATUS_DESC_HTC_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
#define GET_RX_STATUS_DESC_EOSP_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
#define GET_RX_STATUS_DESC_BSSID_FIT_L_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
#define GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)/* 20130415 KaiYuan Check if it exist anymore */
#define GET_RX_STATUS_DESC_PATTERN_MATCH_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 29, 1)
#define GET_RX_STATUS_DESC_UNICAST_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 30, 1)
#define GET_RX_STATUS_DESC_MAGIC_WAKE_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 31, 1)
/* DWORD 4 */
#define GET_RX_STATUS_DESC_PATTERN_IDX_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 8)
#define GET_RX_STATUS_DESC_RX_EOF_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 8, 1)
#define GET_RX_STATUS_DESC_RX_SCRAMBLER_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 9, 7)
#define GET_RX_STATUS_DESC_RX_PRE_NDP_VLD_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 16, 1)
#define GET_RX_STATUS_DESC_A1_FIT_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 24, 5)
/* DWORD 5 */
#define GET_RX_STATUS_DESC_TSFL_8814A(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
/* Rx smooth factor */
#define Rx_Smooth_Factor (20)
#ifdef CONFIG_USB_HCI
s32 rtl8814au_init_recv_priv(PADAPTER padapter);
void rtl8814au_free_recv_priv(PADAPTER padapter);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8814ae_init_recv_priv(PADAPTER padapter);
void rtl8814ae_free_recv_priv(PADAPTER padapter);
#endif
#if 0
/* temp solution */
#ifdef CONFIG_SDIO_HCI
s32 InitRecvPriv8821AS(PADAPTER padapter);
void FreeRecvPriv8821AS(PADAPTER padapter);
#endif /* CONFIG_SDIO_HCI */
#endif
void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc);
#endif /* __RTL8814A_RECV_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_RF_H__
#define __RTL8814A_RF_H__
void
PHY_RF6052SetBandwidth8814A(
PADAPTER Adapter,
enum channel_width Bandwidth);
int
PHY_RF6052_Config_8814A(
PADAPTER Adapter);
#endif/* __RTL8188E_RF_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_SPEC_H__
#define __RTL8814A_SPEC_H__
#include <drv_conf.h>
/* ************************************************************
*
* ************************************************************ */
/* -----------------------------------------------------
*
* 0x0000h ~ 0x00FFh System Configuration
*
* ----------------------------------------------------- */
#define REG_SYS_ISO_CTRL_8814A 0x0000 /* 2 Byte */
#define REG_SYS_FUNC_EN_8814A 0x0002 /* 2 Byte */
#define REG_SYS_PW_CTRL_8814A 0x0004 /* 4 Byte */
#define REG_SYS_CLKR_8814A 0x0008 /* 2 Byte */
#define REG_SYS_EEPROM_CTRL_8814A 0x000A /* 2 Byte */
#define REG_EE_VPD_8814A 0x000C /* 2 Byte */
#define REG_SYS_SWR_CTRL1_8814A 0x0010 /* 1 Byte */
#define REG_SPS0_CTRL_8814A 0x0011 /* 7 Byte */
#define REG_SYS_SWR_CTRL3_8814A 0x0018 /* 4 Byte */
#define REG_RSV_CTRL_8814A 0x001C /* 3 Byte */
#define REG_RF_CTRL0_8814A 0x001F /* 1 Byte */
#define REG_RF_CTRL1_8814A 0x0020 /* 1 Byte */
#define REG_RF_CTRL2_8814A 0x0021 /* 1 Byte */
#define REG_LPLDO_CTRL_8814A 0x0023 /* 1 Byte */
#define REG_AFE_CTRL1_8814A 0x0024 /* 4 Byte */
#define REG_AFE_CTRL2_8814A 0x0028 /* 4 Byte */
#define REG_AFE_CTRL3_8814A 0x002c /* 4 Byte */
#define REG_EFUSE_CTRL_8814A 0x0030
#define REG_LDO_EFUSE_CTRL_8814A 0x0034
#define REG_PWR_DATA_8814A 0x0038
#define REG_CAL_TIMER_8814A 0x003C
#define REG_ACLK_MON_8814A 0x003E
#define REG_GPIO_MUXCFG_8814A 0x0040
#define REG_GPIO_IO_SEL_8814A 0x0042
#define REG_MAC_PINMUX_CFG_8814A 0x0043
#define REG_GPIO_PIN_CTRL_8814A 0x0044
#define REG_GPIO_INTM_8814A 0x0048
#define REG_LEDCFG0_8814A 0x004C
#define REG_LEDCFG1_8814A 0x004D
#define REG_LEDCFG2_8814A 0x004E
#define REG_LEDCFG3_8814A 0x004F
#define REG_FSIMR_8814A 0x0050
#define REG_FSISR_8814A 0x0054
#define REG_HSIMR_8814A 0x0058
#define REG_HSISR_8814A 0x005c
#define REG_GPIO_EXT_CTRL_8814A 0x0060
#define REG_GPIO_STATUS_8814A 0x006C
#define REG_SDIO_CTRL_8814A 0x0070
#define REG_HCI_OPT_CTRL_8814A 0x0074
#define REG_RF_CTRL3_8814A 0x0076 /* 1 Byte */
#define REG_AFE_CTRL4_8814A 0x0078
#define REG_8051FW_CTRL_8814A 0x0080
#define REG_HIMR0_8814A 0x00B0
#define REG_HISR0_8814A 0x00B4
#define REG_HIMR1_8814A 0x00B8
#define REG_HISR1_8814A 0x00BC
#define REG_SYS_CFG1_8814A 0x00F0
#define REG_SYS_CFG2_8814A 0x00FC
#define REG_SYS_CFG3_8814A 0x1000
/* -----------------------------------------------------
*
* 0x0100h ~ 0x01FFh MACTOP General Configuration
*
* ----------------------------------------------------- */
#define REG_CR_8814A 0x0100
#define REG_PBP_8814A 0x0104
#define REG_PKT_BUFF_ACCESS_CTRL_8814A 0x0106
#define REG_TRXDMA_CTRL_8814A 0x010C
#define REG_TRXFF_BNDY_8814A 0x0114
#define REG_TRXFF_STATUS_8814A 0x0118
#define REG_RXFF_PTR_8814A 0x011C
#define REG_CPWM_8814A 0x012F
#define REG_FWIMR_8814A 0x0130
#define REG_FWISR_8814A 0x0134
#define REG_FTIMR_8814A 0x0138
#define REG_PKTBUF_DBG_CTRL_8814A 0x0140
#define REG_RXPKTBUF_CTRL_8814A 0x0142
#define REG_PKTBUF_DBG_DATA_L_8814A 0x0144
#define REG_PKTBUF_DBG_DATA_H_8814A 0x0148
#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN
#define REG_TC0_CTRL_8814A 0x0150
#define REG_TC1_CTRL_8814A 0x0154
#define REG_TC2_CTRL_8814A 0x0158
#define REG_TC3_CTRL_8814A 0x015C
#define REG_TC4_CTRL_8814A 0x0160
#define REG_TCUNIT_BASE_8814A 0x0164
#define REG_RSVD3_8814A 0x0168
#define REG_C2HEVT_MSG_NORMAL_8814A 0x01A0
#define REG_C2HEVT_CLEAR_8814A 0x01AF
#define REG_MCUTST_1_8814A 0x01C0
#define REG_MCUTST_WOWLAN_8814A 0x01C7
#define REG_FMETHR_8814A 0x01C8
#define REG_HMETFR_8814A 0x01CC
#define REG_HMEBOX_0_8814A 0x01D0
#define REG_HMEBOX_1_8814A 0x01D4
#define REG_HMEBOX_2_8814A 0x01D8
#define REG_HMEBOX_3_8814A 0x01DC
#define REG_LLT_INIT_8814A 0x01E0
#define REG_LLT_ADDR_8814A 0x01E4 /* 20130415 KaiYuan add for 8814 */
#define REG_HMEBOX_EXT0_8814A 0x01F0
#define REG_HMEBOX_EXT1_8814A 0x01F4
#define REG_HMEBOX_EXT2_8814A 0x01F8
#define REG_HMEBOX_EXT3_8814A 0x01FC
/* -----------------------------------------------------
*
* 0x0200h ~ 0x027Fh TXDMA Configuration
*
* ----------------------------------------------------- */
#define REG_FIFOPAGE_CTRL_1_8814A 0x0200
#define REG_FIFOPAGE_CTRL_2_8814A 0x0204
#define REG_AUTO_LLT_8814A 0x0208
#define REG_TXDMA_OFFSET_CHK_8814A 0x020C
#define REG_TXDMA_STATUS_8814A 0x0210
#define REG_RQPN_NPQ_8814A 0x0214
#define REG_TQPNT1_8814A 0x0218
#define REG_TQPNT2_8814A 0x021C
#define REG_TQPNT3_8814A 0x0220
#define REG_TQPNT4_8814A 0x0224
#define REG_RQPN_CTRL_1_8814A 0x0228
#define REG_RQPN_CTRL_2_8814A 0x022C
#define REG_FIFOPAGE_INFO_1_8814A 0x0230
#define REG_FIFOPAGE_INFO_2_8814A 0x0234
#define REG_FIFOPAGE_INFO_3_8814A 0x0238
#define REG_FIFOPAGE_INFO_4_8814A 0x023C
#define REG_FIFOPAGE_INFO_5_8814A 0x0240
/* -----------------------------------------------------
*
* 0x0280h ~ 0x02FFh RXDMA Configuration
*
* ----------------------------------------------------- */
#define REG_RXDMA_AGG_PG_TH_8814A 0x0280
#define REG_RXPKT_NUM_8814A 0x0284 /* The number of packets in RXPKTBUF. */
#define REG_RXDMA_CONTROL_8814A 0x0286 /* ?????? Control the RX DMA. */
#define REG_RXDMA_STATUS_8814A 0x0288
#define REG_RXDMA_MODE_8814A 0x0290 /* ?????? */
#define REG_EARLY_MODE_CONTROL_8814A 0x02BC /* ?????? */
#define REG_RSVD5_8814A 0x02F0 /* ?????? */
/* -----------------------------------------------------
*
* 0x0300h ~ 0x03FFh PCIe
*
* ----------------------------------------------------- */
#define REG_PCIE_CTRL_REG_8814A 0x0300
#define REG_INT_MIG_8814A 0x0304 /* Interrupt Migration */
#define REG_BCNQ_TXBD_DESA_8814A 0x0308 /* TX Beacon Descriptor Address */
#define REG_MGQ_TXBD_DESA_8814A 0x0310 /* TX Manage Queue Descriptor Address */
#define REG_VOQ_TXBD_DESA_8814A 0x0318 /* TX VO Queue Descriptor Address */
#define REG_VIQ_TXBD_DESA_8814A 0x0320 /* TX VI Queue Descriptor Address */
#define REG_BEQ_TXBD_DESA_8814A 0x0328 /* TX BE Queue Descriptor Address */
#define REG_BKQ_TXBD_DESA_8814A 0x0330 /* TX BK Queue Descriptor Address */
#define REG_RXQ_RXBD_DESA_8814A 0x0338 /* RX Queue Descriptor Address */
#define REG_HI0Q_TXBD_DESA_8814A 0x0340
#define REG_HI1Q_TXBD_DESA_8814A 0x0348
#define REG_HI2Q_TXBD_DESA_8814A 0x0350
#define REG_HI3Q_TXBD_DESA_8814A 0x0358
#define REG_HI4Q_TXBD_DESA_8814A 0x0360
#define REG_HI5Q_TXBD_DESA_8814A 0x0368
#define REG_HI6Q_TXBD_DESA_8814A 0x0370
#define REG_HI7Q_TXBD_DESA_8814A 0x0378
#define REG_MGQ_TXBD_NUM_8814A 0x0380
#define REG_RX_RXBD_NUM_8814A 0x0382
#define REG_VOQ_TXBD_NUM_8814A 0x0384
#define REG_VIQ_TXBD_NUM_8814A 0x0386
#define REG_BEQ_TXBD_NUM_8814A 0x0388
#define REG_BKQ_TXBD_NUM_8814A 0x038A
#define REG_HI0Q_TXBD_NUM_8814A 0x038C
#define REG_HI1Q_TXBD_NUM_8814A 0x038E
#define REG_HI2Q_TXBD_NUM_8814A 0x0390
#define REG_HI3Q_TXBD_NUM_8814A 0x0392
#define REG_HI4Q_TXBD_NUM_8814A 0x0394
#define REG_HI5Q_TXBD_NUM_8814A 0x0396
#define REG_HI6Q_TXBD_NUM_8814A 0x0398
#define REG_HI7Q_TXBD_NUM_8814A 0x039A
#define REG_TSFTIMER_HCI_8814A 0x039C
/* Read Write Point */
#define REG_VOQ_TXBD_IDX_8814A 0x03A0
#define REG_VIQ_TXBD_IDX_8814A 0x03A4
#define REG_BEQ_TXBD_IDX_8814A 0x03A8
#define REG_BKQ_TXBD_IDX_8814A 0x03AC
#define REG_MGQ_TXBD_IDX_8814A 0x03B0
#define REG_RXQ_TXBD_IDX_8814A 0x03B4
#define REG_HI0Q_TXBD_IDX_8814A 0x03B8
#define REG_HI1Q_TXBD_IDX_8814A 0x03BC
#define REG_HI2Q_TXBD_IDX_8814A 0x03C0
#define REG_HI3Q_TXBD_IDX_8814A 0x03C4
#define REG_HI4Q_TXBD_IDX_8814A 0x03C8
#define REG_HI5Q_TXBD_IDX_8814A 0x03CC
#define REG_HI6Q_TXBD_IDX_8814A 0x03D0
#define REG_HI7Q_TXBD_IDX_8814A 0x03D4
#define REG_DBG_SEL_V1_8814A 0x03D8
#define REG_PCIE_HRPWM1_V1_8814A 0x03D9
#define REG_PCIE_HCPWM1_V1_8814A 0x03DA
#define REG_PCIE_CTRL2_8814A 0x03DB
#define REG_PCIE_HRPWM2_V1_8814A 0x03DC
#define REG_PCIE_HCPWM2_V1_8814A 0x03DE
#define REG_PCIE_H2C_MSG_V1_8814A 0x03E0
#define REG_PCIE_C2H_MSG_V1_8814A 0x03E4
#define REG_DBI_WDATA_V1_8814A 0x03E8
#define REG_DBI_RDATA_V1_8814A 0x03EC
#define REG_DBI_FLAG_V1_8814A 0x03F0
#define REG_MDIO_V1_8814A 0x03F4
#define REG_PCIE_MIX_CFG_8814A 0x03F8
#define REG_DBG_8814A 0x03FC
/* -----------------------------------------------------
*
* 0x0400h ~ 0x047Fh Protocol Configuration
*
* ----------------------------------------------------- */
#define REG_VOQ_INFORMATION_8814A 0x0400
#define REG_VIQ_INFORMATION_8814A 0x0404
#define REG_BEQ_INFORMATION_8814A 0x0408
#define REG_BKQ_INFORMATION_8814A 0x040C
#define REG_MGQ_INFORMATION_8814A 0x0410
#define REG_HGQ_INFORMATION_8814A 0x0414
#define REG_BCNQ_INFORMATION_8814A 0x0418
#define REG_TXPKT_EMPTY_8814A 0x041A
#define REG_CPU_MGQ_INFORMATION_8814A 0x041C
#define REG_FWHW_TXQ_CTRL_8814A 0x0420
#define REG_HWSEQ_CTRL_8814A 0x0423
#define REG_TXPKTBUF_BCNQ_BDNY_8814A 0x0424
/* #define REG_MGQ_BDNY_8814A 0x0425 */
#define REG_LIFETIME_EN_8814A 0x0426
/* #define REG_FW_FREE_TAIL_8814A 0x0427 */
#define REG_SPEC_SIFS_8814A 0x0428
#define REG_RETRY_LIMIT_8814A 0x042A
#define REG_TXBF_CTRL_8814A 0x042C
#define REG_DARFRC_8814A 0x0430
#define REG_RARFRC_8814A 0x0438
#define REG_RRSR_8814A 0x0440
#define REG_ARFR0_8814A 0x0444
#define REG_ARFR1_8814A 0x044C
#define REG_CCK_CHECK_8814A 0x0454
#define REG_AMPDU_MAX_TIME_8814A 0x0455
#define REG_TXPKTBUF_BCNQ1_BDNY_8814A 0x0456
#define REG_AMPDU_MAX_LENGTH_8814A 0x0458
#define REG_ACQ_STOP_8814A 0x045C
#define REG_NDPA_RATE_8814A 0x045D
#define REG_TX_HANG_CTRL_8814A 0x045E
#define REG_NDPA_OPT_CTRL_8814A 0x045F
#define REG_FAST_EDCA_CTRL_8814A 0x0460
#define REG_RD_RESP_PKT_TH_8814A 0x0463
#define REG_CMDQ_INFO_8814A 0x0464
#define REG_Q4_INFO_8814A 0x0468
#define REG_Q5_INFO_8814A 0x046C
#define REG_Q6_INFO_8814A 0x0470
#define REG_Q7_INFO_8814A 0x0474
#define REG_WMAC_LBK_BUF_HD_8814A 0x0478
#define REG_MGQ_PGBNDY_8814A 0x047A
#define REG_INIRTS_RATE_SEL_8814A 0x0480
#define REG_BASIC_CFEND_RATE_8814A 0x0481
#define REG_STBC_CFEND_RATE_8814A 0x0482
#define REG_DATA_SC_8814A 0x0483
#define REG_MACID_SLEEP3_8814A 0x0484
#define REG_MACID_SLEEP1_8814A 0x0488
#ifdef CONFIG_WOWLAN
#define REG_TXPKTBUF_IV_LOW 0x0484
#define REG_TXPKTBUF_IV_HIGH 0x0488
#endif /* CONFIG_WOWLAN */
#define REG_ARFR2_8814A 0x048C
#define REG_ARFR3_8814A 0x0494
#define REG_ARFR4_8814A 0x049C
#define REG_ARFR5_8814A 0x04A4
#define REG_TXRPT_START_OFFSET_8814A 0x04AC
#define REG_TRYING_CNT_TH_8814A 0x04B0
#define REG_POWER_STAGE1_8814A 0x04B4
#define REG_POWER_STAGE2_8814A 0x04B8
#define REG_SW_AMPDU_BURST_MODE_CTRL_8814A 0x04BC
#define REG_PKT_LIFE_TIME_8814A 0x04C0
#define REG_PKT_BE_BK_LIFE_TIME_8814A 0x04C2 /* ?????? */
#define REG_STBC_SETTING_8814A 0x04C4
#define REG_STBC_8814A 0x04C5
#define REG_QUEUE_CTRL_8814A 0x04C6
#define REG_SINGLE_AMPDU_CTRL_8814A 0x04C7
#define REG_PROT_MODE_CTRL_8814A 0x04C8
#define REG_MAX_AGGR_NUM_8814A 0x04CA
#define REG_RTS_MAX_AGGR_NUM_8814A 0x04CB
#define REG_BAR_MODE_CTRL_8814A 0x04CC
#define REG_RA_TRY_RATE_AGG_LMT_8814A 0x04CF
#define REG_MACID_SLEEP2_8814A 0x04D0
#define REG_MACID_SLEEP0_8814A 0x04D4
#define REG_HW_SEQ0_8814A 0x04D8
#define REG_HW_SEQ1_8814A 0x04DA
#define REG_HW_SEQ2_8814A 0x04DC
#define REG_HW_SEQ3_8814A 0x04DE
#define REG_NULL_PKT_STATUS_8814A 0x04E0
#define REG_PTCL_ERR_STATUS_8814A 0x04E2
#define REG_DROP_PKT_NUM_8814A 0x04EC
#define REG_PTCL_TX_RPT_8814A 0x04F0
#define REG_Dummy_8814A 0x04FC
/* -----------------------------------------------------
*
* 0x0500h ~ 0x05FFh EDCA Configuration
*
* ----------------------------------------------------- */
#define REG_EDCA_VO_PARAM_8814A 0x0500
#define REG_EDCA_VI_PARAM_8814A 0x0504
#define REG_EDCA_BE_PARAM_8814A 0x0508
#define REG_EDCA_BK_PARAM_8814A 0x050C
#define REG_BCNTCFG_8814A 0x0510
#define REG_PIFS_8814A 0x0512
#define REG_RDG_PIFS_8814A 0x0513
#define REG_SIFS_CTX_8814A 0x0514
#define REG_SIFS_TRX_8814A 0x0516
#define REG_AGGR_BREAK_TIME_8814A 0x051A
#define REG_SLOT_8814A 0x051B
#define REG_TX_PTCL_CTRL_8814A 0x0520
#define REG_TXPAUSE_8814A 0x0522
#define REG_DIS_TXREQ_CLR_8814A 0x0523
#define REG_RD_CTRL_8814A 0x0524
/*
* Format for offset 540h-542h:
* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT.
* [7:4]: Reserved.
* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet.
* [23:20]: Reserved
* Description:
* |
* |<--Setup--|--Hold------------>|
* --------------|----------------------
* |
* TBTT
* Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold.
* Described by Designer Tim and Bruce, 2011-01-14.
* */
#define REG_TBTT_PROHIBIT_8814A 0x0540
#define REG_RD_NAV_NXT_8814A 0x0544
#define REG_NAV_PROT_LEN_8814A 0x0546
#define REG_BCN_CTRL_8814A 0x0550
#define REG_BCN_CTRL_1_8814A 0x0551
#define REG_MBID_NUM_8814A 0x0552
#define REG_DUAL_TSF_RST_8814A 0x0553
#define REG_MBSSID_BCN_SPACE_8814A 0x0554
#define REG_DRVERLYINT_8814A 0x0558
#define REG_BCNDMATIM_8814A 0x0559
#define REG_ATIMWND_8814A 0x055A
#define REG_USTIME_TSF_8814A 0x055C
#define REG_BCN_MAX_ERR_8814A 0x055D
#define REG_RXTSF_OFFSET_CCK_8814A 0x055E
#define REG_RXTSF_OFFSET_OFDM_8814A 0x055F
#define REG_TSFTR_8814A 0x0560
#define REG_CTWND_8814A 0x0572
#define REG_SECONDARY_CCA_CTRL_8814A 0x0577 /* ?????? */
#define REG_PSTIMER_8814A 0x0580
#define REG_TIMER0_8814A 0x0584
#define REG_TIMER1_8814A 0x0588
#define REG_BCN_PREDL_ITV_8814A 0x058F /* Pre download beacon interval */
#define REG_ACMHWCTRL_8814A 0x05C0
#define REG_P2P_RST_8814A 0x05F0
/* -----------------------------------------------------
*
* 0x0600h ~ 0x07FFh WMAC Configuration
*
* ----------------------------------------------------- */
#define REG_MAC_CR_8814A 0x0600
#define REG_TCR_8814A 0x0604
#define REG_RCR_8814A 0x0608
#define REG_RX_PKT_LIMIT_8814A 0x060C
#define REG_RX_DLK_TIME_8814A 0x060D
#define REG_RX_DRVINFO_SZ_8814A 0x060F
#define REG_MACID_8814A 0x0610
#define REG_BSSID_8814A 0x0618
#define REG_MAR_8814A 0x0620
#define REG_MBIDCAMCFG_8814A 0x0628
#define REG_USTIME_EDCA_8814A 0x0638
#define REG_MAC_SPEC_SIFS_8814A 0x063A
#define REG_RESP_SIFP_CCK_8814A 0x063C
#define REG_RESP_SIFS_OFDM_8814A 0x063E
#define REG_ACKTO_8814A 0x0640
#define REG_CTS2TO_8814A 0x0641
#define REG_EIFS_8814A 0x0642
#define REG_NAV_UPPER_8814A 0x0652 /* unit of 128 */
#define REG_TRXPTCL_CTL_8814A 0x0668
/* Security */
#define REG_CAMCMD_8814A 0x0670
#define REG_CAMWRITE_8814A 0x0674
#define REG_CAMREAD_8814A 0x0678
#define REG_CAMDBG_8814A 0x067C
#define REG_SECCFG_8814A 0x0680
/* Power */
#define REG_WOW_CTRL_8814A 0x0690
#define REG_PS_RX_INFO_8814A 0x0692
#define REG_UAPSD_TID_8814A 0x0693
#define REG_WKFMCAM_NUM_8814A 0x0698
#define REG_RXFLTMAP0_8814A 0x06A0
#define REG_RXFLTMAP1_8814A 0x06A2
#define REG_RXFLTMAP2_8814A 0x06A4
#define REG_BCN_PSR_RPT_8814A 0x06A8
#define REG_BT_COEX_TABLE_8814A 0x06C0
#define REG_TX_DATA_RSP_RATE_8814A 0x06DE
#define REG_ASSOCIATED_BFMER0_INFO_8814A 0x06E4
#define REG_ASSOCIATED_BFMER1_INFO_8814A 0x06EC
#define REG_CSI_RPT_PARAM_BW20_8814A 0x06F4
#define REG_CSI_RPT_PARAM_BW40_8814A 0x06F8
#define REG_CSI_RPT_PARAM_BW80_8814A 0x06FC
/* Hardware Port 2 */
#define REG_MACID1_8814A 0x0700
#define REG_BSSID1_8814A 0x0708
/* Hardware Port 3 */
#define REG_MACID2_8814A 0x1620
#define REG_BSSID2_8814A 0x1628
/* Hardware Port 4 */
#define REG_MACID3_8814A 0x1630
#define REG_BSSID3_8814A 0x1638
/* Hardware Port 5 */
#define REG_MACID4_8814A 0x1640
#define REG_BSSID4_8814A 0x1648
#define REG_ASSOCIATED_BFMEE_SEL_8814A 0x0714
#define REG_SND_PTCL_CTRL_8814A 0x0718
#define REG_IQ_DUMP_8814A 0x07C0
#define REG_CPU_DMEM_CON_8814A 0x1080
/**** page 19 ****/
/* TX BeamForming */
#define REG_BB_TXBF_ANT_SET_BF1 0x19ac
#define REG_BB_TXBF_ANT_SET_BF0 0x19b4
/* 0x1200h ~ 0x12FFh DDMA CTRL
*
* ----------------------------------------------------- */
#define REG_DDMA_CH0SA 0x1200
#define REG_DDMA_CH0DA 0x1204
#define REG_DDMA_CH0CTRL 0x1208
#define REG_DDMA_CH1SA 0x1210
#define REG_DDMA_CH1DA 0x1214
#define REG_DDMA_CH1CTRL 0x1218
#define REG_DDMA_CH2SA 0x1220
#define REG_DDMA_CH2DA 0x1224
#define REG_DDMA_CH2CTRL 0x1228
#define REG_DDMA_CH3SA 0x1230
#define REG_DDMA_CH3DA 0x1234
#define REG_DDMA_CH3CTRL 0x1238
#define REG_DDMA_CH4SA 0x1240
#define REG_DDMA_CH4DA 0x1244
#define REG_DDMA_CH4CTRL 0x1248
#define REG_DDMA_CH5SA 0x1250
#define REG_DDMA_CH5DA 0x1254
#define REG_DDMA_CH5CTRL 0x1258
#define REG_DDMA_INT_MSK 0x12E0
#define REG_DDMA_CHSTATUS 0x12E8
#define REG_DDMA_CHKSUM 0x12F0
#define REG_DDMA_MONITER 0x12FC
#define REG_Q0_Q1_INFO_8814A 0x1400
#define REG_Q2_Q3_INFO_8814A 0x1404
#define REG_Q4_Q5_INFO_8814A 0x1408
#define REG_Q6_Q7_INFO_8814A 0x140C
#define REG_MGQ_HIQ_INFO_8814A 0x1410
#define REG_CMDQ_BCNQ_INFO_8814A 0x1414
#define REG_MACID_DROP0_8814A 0x1450
#define REG_MACID_DROP1_8814A 0x1454
#define REG_MACID_DROP2_8814A 0x1458
#define REG_MACID_DROP3_8814A 0x145C
#define DDMA_LEN_MASK 0x0001FFFF
#define FW_CHKSUM_DUMMY_SZ 8
#define DDMA_CH_CHKSUM_CNT BIT(24)
#define DDMA_RST_CHKSUM_STS BIT(25)
#define DDMA_MODE_BLOCK_CPU BIT(26)
#define DDMA_CHKSUM_FAIL BIT(27)
#define DDMA_DA_W_DISABLE BIT(28)
#define DDMA_CHKSUM_EN BIT(29)
#define DDMA_CH_OWN BIT(31)
/* 3081 FWDL */
#define FWDL_EN BIT0
#define IMEM_BOOT_DL_RDY BIT1
#define IMEM_BOOT_CHKSUM_FAIL BIT2
#define IMEM_DL_RDY BIT3
#define IMEM_CHKSUM_OK BIT4
#define DMEM_DL_RDY BIT5
#define DMEM_CHKSUM_OK BIT6
#define EMEM_DL_RDY BIT7
#define EMEM_CHKSUM_FAIL BIT8
#define EMEM_TXBUF_DL_RDY BIT9
#define EMEM_TXBUF_CHKSUM_FAIL BIT10
#define CPU_CLK_SWITCH_BUSY BIT11
#define CPU_CLK_SEL (BIT12 | BIT13)
#define FWDL_OK BIT14
#define FW_INIT_RDY BIT15
#define R_EN_BOOT_FLASH BIT20
#define OCPBASE_IMEM_3081 0x00000000
#define OCPBASE_DMEM_3081 0x00200000
#define OCPBASE_RPTBUF_3081 0x18660000
#define OCPBASE_RXBUF2_3081 0x18680000
#define OCPBASE_RXBUF_3081 0x18700000
#define OCPBASE_TXBUF_3081 0x18780000
#define REG_FAST_EDCA_VOVI_SETTING_8814A 0x1448
#define REG_FAST_EDCA_BEBK_SETTING_8814A 0x144C
/* -----------------------------------------------------
* */
/* -----------------------------------------------------
*
* Redifine 8192C register definition for compatibility
*
* ----------------------------------------------------- */
/* TODO: use these definition when using REG_xxx naming rule.
* NOTE: DO NOT Remove these definition. Use later. */
#define EFUSE_CTRL_8814A REG_EFUSE_CTRL_8814A /* E-Fuse Control. */
#define EFUSE_TEST_8814A REG_LDO_EFUSE_CTRL_8814A /* E-Fuse Test. */
#define MSR_8814A (REG_CR_8814A + 2) /* Media Status register */
#define ISR_8814A REG_HISR0_8814A
#define TSFR_8814A REG_TSFTR_8814A /* Timing Sync Function Timer Register. */
#define PBP_8814A REG_PBP_8814A
/* Redifine MACID register, to compatible prior ICs. */
#define IDR0_8814A REG_MACID_8814A /* MAC ID Register, Offset 0x0050-0x0053 */
#define IDR4_8814A (REG_MACID_8814A + 4) /* MAC ID Register, Offset 0x0054-0x0055 */
/*
* 9. Security Control Registers (Offset: )
* */
#define RWCAM_8814A REG_CAMCMD_8814A /* 8190 Data Sheet is called CAMcmd */
#define WCAMI_8814A REG_CAMWRITE_8814A /* Software write CAM input content */
#define RCAMO_8814A REG_CAMREAD_8814A /* Software read/write CAM config */
#define CAMDBG_8814A REG_CAMDBG_8814A
#define SECR_8814A REG_SECCFG_8814A /* Security Configuration Register */
/* ----------------------------------------------------------------------------
* 8195 IMR/ISR bits (offset 0xB0, 8bits)
* ---------------------------------------------------------------------------- */
#define IMR_DISABLED_8814A 0
/* IMR DW0(0x00B0-00B3) Bit 0-31 */
#define IMR_TIMER2_8814A BIT31 /* Timeout interrupt 2 */
#define IMR_TIMER1_8814A BIT30 /* Timeout interrupt 1 */
#define IMR_PSTIMEOUT_8814A BIT29 /* Power Save Time Out Interrupt */
#define IMR_GTINT4_8814A BIT28 /* When GTIMER4 expires, this bit is set to 1 */
#define IMR_GTINT3_8814A BIT27 /* When GTIMER3 expires, this bit is set to 1 */
#define IMR_TXBCN0ERR_8814A BIT26 /* Transmit Beacon0 Error */
#define IMR_TXBCN0OK_8814A BIT25 /* Transmit Beacon0 OK */
#define IMR_TSF_BIT32_TOGGLE_8814A BIT24 /* TSF Timer BIT32 toggle indication interrupt */
#define IMR_BCNDMAINT0_8814A BIT20 /* Beacon DMA Interrupt 0 */
#define IMR_BCNDERR0_8814A BIT16 /* Beacon Queue DMA OK0 */
#define IMR_HSISR_IND_ON_INT_8814A BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
#define IMR_BCNDMAINT_E_8814A BIT14 /* Beacon DMA Interrupt Extension for Win7 */
#define IMR_ATIMEND_8814A BIT12 /* CTWidnow End or ATIM Window End */
#define IMR_C2HCMD_8814A BIT10 /* CPU to Host Command INT Status, Write 1 clear */
#define IMR_CPWM2_8814A BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_CPWM_8814A BIT8 /* CPU power Mode exchange INT Status, Write 1 clear */
#define IMR_HIGHDOK_8814A BIT7 /* High Queue DMA OK */
#define IMR_MGNTDOK_8814A BIT6 /* Management Queue DMA OK */
#define IMR_BKDOK_8814A BIT5 /* AC_BK DMA OK */
#define IMR_BEDOK_8814A BIT4 /* AC_BE DMA OK */
#define IMR_VIDOK_8814A BIT3 /* AC_VI DMA OK */
#define IMR_VODOK_8814A BIT2 /* AC_VO DMA OK */
#define IMR_RDU_8814A BIT1 /* Rx Descriptor Unavailable */
#define IMR_ROK_8814A BIT0 /* Receive DMA OK */
/* IMR DW1(0x00B4-00B7) Bit 0-31 */
#define IMR_MCUERR_8814A BIT28 /* Beacon DMA Interrupt 7 */
#define IMR_BCNDMAINT7_8814A BIT27 /* Beacon DMA Interrupt 7 */
#define IMR_BCNDMAINT6_8814A BIT26 /* Beacon DMA Interrupt 6 */
#define IMR_BCNDMAINT5_8814A BIT25 /* Beacon DMA Interrupt 5 */
#define IMR_BCNDMAINT4_8814A BIT24 /* Beacon DMA Interrupt 4 */
#define IMR_BCNDMAINT3_8814A BIT23 /* Beacon DMA Interrupt 3 */
#define IMR_BCNDMAINT2_8814A BIT22 /* Beacon DMA Interrupt 2 */
#define IMR_BCNDMAINT1_8814A BIT21 /* Beacon DMA Interrupt 1 */
#define IMR_BCNDOK7_8814A BIT20 /* Beacon Queue DMA OK Interrup 7 */
#define IMR_BCNDOK6_8814A BIT19 /* Beacon Queue DMA OK Interrup 6 */
#define IMR_BCNDOK5_8814A BIT18 /* Beacon Queue DMA OK Interrup 5 */
#define IMR_BCNDOK4_8814A BIT17 /* Beacon Queue DMA OK Interrup 4 */
#define IMR_BCNDOK3_8814A BIT16 /* Beacon Queue DMA OK Interrup 3 */
#define IMR_BCNDOK2_8814A BIT15 /* Beacon Queue DMA OK Interrup 2 */
#define IMR_BCNDOK1_8814A BIT14 /* Beacon Queue DMA OK Interrup 1 */
#define IMR_ATIMEND_E_8814A BIT13 /* ATIM Window End Extension for Win7 */
#define IMR_TXERR_8814A BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */
#define IMR_RXERR_8814A BIT10 /* Rx Error Flag INT Status, Write 1 clear */
#define IMR_TXFOVW_8814A BIT9 /* Transmit FIFO Overflow */
#define IMR_RXFOVW_8814A BIT8 /* Receive FIFO Overflow */
#ifdef CONFIG_PCI_HCI
#define IMR_TX_MASK (IMR_VODOK_8814A | IMR_VIDOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A | IMR_MGNTDOK_8814A | IMR_HIGHDOK_8814A)
#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8814A | IMR_TXBCN0OK_8814A | IMR_TXBCN0ERR_8814A | IMR_BCNDERR0_8814A)
#define RT_AC_INT_MASKS (IMR_VIDOK_8814A | IMR_VODOK_8814A | IMR_BEDOK_8814A | IMR_BKDOK_8814A)
#endif
/*===================================================================
=====================================================================
Here the register defines are for 92C. When the define is as same with 92C,
we will use the 92C's define for the consistency
So the following defines for 92C is not entire!!!!!!
=====================================================================
=====================================================================*/
/* -----------------------------------------------------
*
* 0xFE00h ~ 0xFE55h USB Configuration
*
* ----------------------------------------------------- */
/* 2 Special Option */
#define USB_AGG_EN_8814A BIT(7)
#define REG_USB_HRPWM_U3 0xF052
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A (2048-1) /* 20130415 KaiYuan add for 8814 */
#endif /* __RTL8814A_SPEC_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL88814A_SRESET_H_
#define _RTL8814A_SRESET_H_
#include <rtw_sreset.h>
#ifdef DBG_CONFIG_ERROR_DETECT
extern void rtl8814_sreset_xmit_status_check(_adapter *padapter);
extern void rtl8814_sreset_linked_status_check(_adapter *padapter);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8814A_XMIT_H__
#define __RTL8814A_XMIT_H__
typedef struct txdescriptor_8814 {
/* Offset 0 */
u32 pktlen:16;
u32 offset:8;
u32 bmc:1;
u32 htc:1;
u32 ls:1;
} TXDESC_8814, *PTXDESC_8814;
#define OFFSET_SZ 0
#define OFFSET_SHT 16
#ifdef CONFIG_SDIO_HCI
#define SET_TX_DESC_SDIO_TXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value)
#endif /* CONFIG_SDIO_HCI */
/* -----------------------------------------------------------------
* RTL8814A TX BUFFER DESC
* -----------------------------------------------------------------
*
- Each TXBD has 4 segment.
-- For 32 bit, each segment is 8 bytes.
-- For 64 bit, each segment is 16 bytes.
*/
#if 0
#if 1 /* 32 bit */
#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8), 0, 16, __Value)
#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*8)+4, 0, 32, __Value)
#else /* 64 bit */
#define SET_TX_EXTBUFF_DESC_LEN_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16), 0, 16, __Value)
#define SET_TX_EXTBUFF_DESC_ADDR_LOW_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+4, 0, 32, __Value)
#endif
#define SET_TX_EXTBUFF_DESC_ADDR_HIGH_8814A(__pTxDesc, __Value, __Set) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Set*16)+8, 0, 32, __Value)
#endif
/*c2h-DWORD 2*/
#define GET_RX_STATUS_DESC_RPT_SEL_8814A(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+8, 28, 1)
/* *********************************************************
* for Txfilldescroptor8814Ae, fill the desc content. */
#if 1 /* 32 bit */
#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 0, 16, __Valeu)
#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8), 31, 1, __Valeu)
#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*8)+4, 0, 32, __Valeu)
#else /* 64 bit */
#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu)
#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu)
#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu)
#endif
#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu)
/* ********************************************************* */
/* TX buffer
* *************
* Dword 0 */
#define SET_TX_BUFF_DESC_LEN_0_8814A(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Valeu)
#define SET_TX_BUFF_DESC_PSB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
#define SET_TX_BUFF_DESC_OWN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
#define GET_TX_BUFF_DESC_OWN_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
/* Dword 1 */
#define SET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
#define GET_TX_BUFF_DESC_ADDR_LOW_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32)
/* Dword 2 */
#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value)
#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32)
/* Dword 3 */ /* RESERVED 0 */
#if 0 /* 64 bit */
/* Dword 4 */
#define SET_TX_BUFF_DESC_LEN_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 16, __Value)
#define SET_TX_BUFF_DESC_AMSDU_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 31, 1, __Value)
/* Dword 5 */
#define SET_TX_BUFF_DESC_ADDR_LOW_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 32, __Value)
/* Dword 6 */
#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 32, __Value)
/* Dword 7 */ /* RESERVED 0 */
/* Dword 8 */
#define SET_TX_BUFF_DESC_LEN_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 16, __Value)
#define SET_TX_BUFF_DESC_AMSDU_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 31, 1, __Value)
/* Dword 9 */
#define SET_TX_BUFF_DESC_ADDR_LOW_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 32, __Value)
/* Dword 10 */
#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value)
/* Dword 11 */ /* RESERVED 0 */
/* Dword 12 */
#define SET_TX_BUFF_DESC_LEN_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 16, __Value)
#define SET_TX_BUFF_DESC_AMSDU_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 31, 1, __Value)
/* Dword 13 */
#define SET_TX_BUFF_DESC_ADDR_LOW_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+52, 0, 32, __Value)
/* Dword 14 */
#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+56, 0, 32, __Value)
/* Dword 15 */ /* RESERVED 0 */
#endif
/* *****Desc content
* TX Info
* *************
* Dword 0 */
#define SET_TX_DESC_PKT_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
#define GET_TX_DESC_PKT_SIZE_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 0, 16)
#define SET_TX_DESC_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
#define GET_TX_DESC_OFFSET_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 16, 8)
#define SET_TX_DESC_BMC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
#define SET_TX_DESC_HTC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
#define SET_TX_DESC_LAST_SEG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value)
#define SET_TX_DESC_LINIP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value)
#define SET_TX_DESC_AMSDU_PAD_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
#define SET_TX_DESC_NO_ACM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
#define SET_TX_DESC_GF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
#define SET_TX_DESC_DISQSELSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
/* Dword 1 */
#define SET_TX_DESC_MACID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
#define SET_TX_DESC_QUEUE_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
#define SET_TX_DESC_RDG_NAV_EXT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
#define SET_TX_DESC_LSIG_TXOP_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
#define SET_TX_DESC_PIFS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
#define SET_TX_DESC_RATE_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
#define SET_TX_DESC_EN_DESC_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
#define SET_TX_DESC_SEC_TYPE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
#define SET_TX_DESC_PKT_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
#define SET_TX_DESC_MORE_DATA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value)
#define SET_TX_DESC_TXOP_PS_CAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value)
#define SET_TX_DESC_TXOP_PS_MODE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value)
/* Dword 2 */
#define SET_TX_DESC_PAID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
#define SET_TX_DESC_CCA_RTS_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
#define SET_TX_DESC_AGG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
#define SET_TX_DESC_RDG_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
#define SET_TX_DESC_NULL_0_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value)
#define SET_TX_DESC_NULL_1_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value)
#define SET_TX_DESC_BK_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
#define SET_TX_DESC_MORE_FRAG_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
#define GET_TX_DESC_MORE_FRAG_8814A(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 17, 1)
#define SET_TX_DESC_RAW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
#define SET_TX_DESC_SPE_RPT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
#define SET_TX_DESC_AMPDU_DENSITY_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
#define SET_TX_DESC_BT_NULL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
#define SET_TX_DESC_GID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value)
#define SET_TX_DESC_HW_AES_IV_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 31, 1, __Value)
/* Dword 3 */
#define SET_TX_DESC_WHEADER_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 5, __Value)
#define SET_TX_DESC_EARLY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value)
#define SET_TX_DESC_HW_SSN_SEL_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
#define SET_TX_DESC_USE_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
#define SET_TX_DESC_DISABLE_RTS_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
#define SET_TX_DESC_DISABLE_FB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
#define SET_TX_DESC_CTS2SELF_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
#define SET_TX_DESC_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
#define SET_TX_DESC_HW_RTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
#define SET_TX_DESC_CHECK_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value)
#define SET_TX_DESC_NAV_USE_HDR_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value)
#define SET_TX_DESC_USE_MAX_LEN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
#define SET_TX_DESC_MAX_AGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
#define SET_TX_DESC_NDPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value)
#define SET_TX_DESC_AMPDU_MAX_TIME_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
/* Dword 4 */
#define SET_TX_DESC_TX_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
#define SET_TX_DESC_TRY_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value)
#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
#define SET_TX_DESC_DATA_RETRY_LIMIT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
#define SET_TX_DESC_RTS_RATE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
#define SET_TX_DESC_PCTS_ENABLE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value)
#define SET_TX_DESC_PCTS_MASK_IDX_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value)
/* Dword 5 */
#define SET_TX_DESC_DATA_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
#define SET_TX_DESC_DATA_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
#define SET_TX_DESC_DATA_BW_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
#define SET_TX_DESC_DATA_LDPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value)
#define SET_TX_DESC_DATA_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
#define SET_TX_DESC_CTROL_STBC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
#define SET_TX_DESC_RTS_SHORT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
#define SET_TX_DESC_RTS_SC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
#define SET_TX_DESC_SIGNALING_TA_PKT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 17, 1, __Value)
#define SET_TX_DESC_PORT_ID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 3, __Value)/* 20130415 KaiYuan add for 8814 */
#define SET_TX_DESC_TX_ANT_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value)
#define SET_TX_DESC_TX_POWER_OFFSET_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value)
/* Dword 6 */
#define SET_TX_DESC_SW_DEFINE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
#define SET_TX_DESC_MBSSID_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
#define SET_TX_DESC_ANTSEL_A_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
#define SET_TX_DESC_ANTSEL_B_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value)
#define SET_TX_DESC_ANT_MAPA_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 2, __Value)
#define SET_TX_DESC_ANT_MAPB_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 24, 2, __Value)
#define SET_TX_DESC_ANT_MAPC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 26, 2, __Value)
#define SET_TX_DESC_ANT_MAPD_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 28, 2, __Value)
/* Dword 7 */
#ifdef CONFIG_PCI_HCI
#define SET_TX_DESC_TX_BUFFER_SIZE_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
#endif
#if defined(CONFIG_SDIO_HCI)|| defined(CONFIG_USB_HCI)
#define SET_TX_DESC_TX_DESC_CHECKSUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
#endif
#define SET_TX_DESC_NTX_MAP_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 20, 4, __Value)
#define SET_TX_DESC_USB_TXAGG_NUM_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
/* Dword 8 */
#define SET_TX_DESC_RTS_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value)
#define SET_TX_DESC_BAR_RTY_TH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value)
#define SET_TX_DESC_DATA_RC_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
#define SET_TX_DESC_EN_HWEXSEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 14, 1, __Value)
#define SET_TX_DESC_HWSEQ_EN_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
#if defined(CONFIG_PCI_HCI)|| defined(CONFIG_USB_HCI)
#define SET_TX_DESC_NEXT_HEAD_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
#endif
#ifdef CONFIG_SDIO_HCI
#define SET_TX_DESC_SDIO_SEQ_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) /* 20130415 KaiYuan add for 8814AS */
#endif
#define SET_TX_DESC_TAIL_PAGE_L_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
/* Dword 9 */
#define SET_TX_DESC_PADDING_LENGTH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value)
#define SET_TX_DESC_TXBF_PATH_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value)
#define SET_TX_DESC_SEQ_8814A(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
#define SET_TX_DESC_NEXT_HEAD_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 4, __Value)
#define SET_TX_DESC_TAIL_PAGE_H_8814A(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 28, 4, __Value)
#define SET_EARLYMODE_PKTNUM_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
#define SET_EARLYMODE_LEN0_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
#define SET_EARLYMODE_LEN1_1_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
#define SET_EARLYMODE_LEN1_2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
#define SET_EARLYMODE_LEN2_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value)
#define SET_EARLYMODE_LEN3_8814A(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc);
void rtl8814a_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc);
void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc);
void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc);
void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
#ifdef CONFIG_USB_HCI
s32 rtl8814au_init_xmit_priv(PADAPTER padapter);
void rtl8814au_free_xmit_priv(PADAPTER padapter);
s32 rtl8814au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8814au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
#ifdef CONFIG_RTW_MGMT_QUEUE
s32 rtl8814au_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
#endif
s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtl8814au_xmit_buf_handler(PADAPTER padapter);
void rtl8814au_xmit_tasklet(void *priv);
s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_PCI_HCI
s32 rtl8814ae_init_xmit_priv(PADAPTER padapter);
void rtl8814ae_free_xmit_priv(PADAPTER padapter);
struct xmit_buf *rtl8814ae_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8814ae_xmitframe_resume(_adapter *padapter);
s32 rtl8814ae_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8814ae_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
#ifdef CONFIG_RTW_MGMT_QUEUE
s32 rtl8814ae_hal_mgmt_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
#endif
s32 rtl8814ae_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
void rtl8814ae_xmit_tasklet(void *priv);
#ifdef CONFIG_XMIT_THREAD_MODE
s32 rtl8814ae_xmit_buf_handler(_adapter *padapter);
#endif
#endif
void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc);
u8
SCMapping_8814(
PADAPTER Adapter,
struct pkt_attrib *pattrib
);
u8
BWMapping_8814(
PADAPTER Adapter,
struct pkt_attrib *pattrib
);
#endif /* __RTL8814_XMIT_H__ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8814B_HAL_H_
#define _RTL8814B_HAL_H_
#include <osdep_service.h> /* BIT(x) */
#include <drv_types.h> /* PADAPTER */
#include "../hal/halmac/halmac_api.h" /* MAC REG definition */
#ifdef CONFIG_SUPPORT_TRX_SHARED
#define MAX_RECVBUF_SZ 46080 /* 45KB, TX: (256-64)KB */
#else /* !CONFIG_SUPPORT_TRX_SHARED */
#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */
#endif /* !CONFIG_SUPPORT_TRX_SHARED */
#if 0
/*
* MAC Register definition
*/
#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8814B /* hal_com.c & phydm */
#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8814B /* hal_com.c & phydm */
#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8814B /* phydm only */
#endif
#define REG_LEDCFG0 REG_LED_CFG_8814B /* rtw_mp.c */
#if 0
#define MSR (REG_CR_8814B + 2) /* rtw_mp.c & hal_com.c */
#define MSR1 REG_CR_EXT_8814B /* rtw_mp.c & hal_com.c */
#endif
#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */
#if 0
#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */
#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8814B /* hal_com.c */
#endif
#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD_8814B /* hal_com.c: WOWLAN */
#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c: WOWLAN */
#define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL_8814B + 2) /* hal_com.c: WOWLAN */
#define REG_RXPKT_NUM REG_RXDMA_CTRL_8814B /* hal_com.c: WOWLAN */
/* RXERR_RPT, for rtw_mp.c */
#define RXERR_TYPE_OFDM_PPDU 0
#define RXERR_TYPE_OFDM_FALSE_ALARM 2
#define RXERR_TYPE_OFDM_MPDU_OK 0
#define RXERR_TYPE_OFDM_MPDU_FAIL 1
#define RXERR_TYPE_CCK_PPDU 3
#define RXERR_TYPE_CCK_FALSE_ALARM 5
#define RXERR_TYPE_CCK_MPDU_OK 3
#define RXERR_TYPE_CCK_MPDU_FAIL 4
#define RXERR_TYPE_HT_PPDU 8
#define RXERR_TYPE_HT_FALSE_ALARM 9
#define RXERR_TYPE_HT_MPDU_TOTAL 6
#define RXERR_TYPE_HT_MPDU_OK 6
#define RXERR_TYPE_HT_MPDU_FAIL 7
#define RXERR_TYPE_RX_FULL_DROP 10
#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8814B
#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8814B
#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8814B(type) \
| ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8814B : 0))
/* hal_com.c:rtw_lps_state_chk() */
#define BIT_PWRBIT_OW_EN BIT_WMAC_TCRPWRMGT_HWDATA_EN_8814B
/*
* BB Register definition
*/
#define rPMAC_Reset 0x100 /* hal_mp.c */
#define rFPGA0_RFMOD 0x800
#define rFPGA0_TxInfo 0x804
#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */
#define rFPGA0_TxGainStage 0x80C /* phydm only */
#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */
#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */
#define rTxAGC_B_Rate18_06 0x830
#define rTxAGC_B_Rate54_24 0x834
#define rTxAGC_B_CCK1_55_Mcs32 0x838
#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */
#define rTxAGC_B_Mcs03_Mcs00 0x83C
#define rTxAGC_B_Mcs07_Mcs04 0x848
#define rTxAGC_B_Mcs11_Mcs08 0x84C
#define rFPGA0_XA_RFInterfaceOE 0x860
#define rFPGA0_XB_RFInterfaceOE 0x864
#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86C
#define rFPGA0_XAB_RFInterfaceSW 0x870
#define rFPGA0_XAB_RFParameter 0x878
#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */
#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */
#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8814b_phy.c) */
#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */
#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */
#define rFPGA1_TxInfo 0x90C /* hal_mp.c */
#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */
/* TX BeamForming */
#define REG_BB_TX_PATH_SEL_1_8814B 0x93C /* rtl8814b_phy.c */
#define REG_BB_TX_PATH_SEL_2_8814B 0x940 /* rtl8814b_phy.c */
/* TX BeamForming */
#define REG_BB_TXBF_ANT_SET_BF1_8814B 0x19AC /* rtl8814b_phy.c */
#define REG_BB_TXBF_ANT_SET_BF0_8814B 0x19B4 /* rtl8814b_phy.c */
#define rCCK0_System 0xA00
#define rCCK0_AFESetting 0xA04
#define rCCK0_DSPParameter2 0xA1C
#define rCCK0_TxFilter1 0xA20
#define rCCK0_TxFilter2 0xA24
#define rCCK0_DebugPort 0xA28
#define rCCK0_FalseAlarmReport 0xA2C
#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */
#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */
#define rOFDM0_TRxPathEnable 0xC04
#define rOFDM0_TRMuxPar 0xC08
#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */
#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */
#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */
#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */
#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */
#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */
#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */
#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8814b_phy.c) */
#define rOFDM1_LSTF 0xD00
#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */
#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8814b_phy.c) */
#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8814b_phy.c) */
#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8814b_phy.c) */
#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8814b_phy.c) */
#define rTxAGC_A_Rate18_06 0xE00
#define rTxAGC_A_Rate54_24 0xE04
#define rTxAGC_A_CCK1_Mcs32 0xE08
#define rTxAGC_A_Mcs03_Mcs00 0xE10
#define rTxAGC_A_Mcs07_Mcs04 0xE14
#define rTxAGC_A_Mcs11_Mcs08 0xE18
#define rTxAGC_A_Mcs15_Mcs12 0xE1C
#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */
#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */
#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8814b_phy.c) */
/* RFE */
#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */
#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */
#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */
#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */
#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */
#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */
#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */
#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */
#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */
#define bMask_RFEInv_Jaguar 0x3FF00000
#define bMask_AntselPathFollow_Jaguar 0x00030000
#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/
#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/
#define rA_RFE_Sel_Jaguar2 0x1990
/* Page1(0x100) */
#define bBBResetB 0x100
/* Page8(0x800) */
#define bCCKEn 0x1000000
#define bOFDMEn 0x2000000
/* Reg 0x80C rFPGA0_TxGainStage */
#define bXBTxAGC 0xF00
#define bXCTxAGC 0xF000
#define bXDTxAGC 0xF0000
/* PageA(0xA00) */
#define bCCKBBMode 0x3
#define bCCKScramble 0x8
#define bCCKTxRate 0x3000
/* General */
#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */
#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */
#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */
#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */
#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */
#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */
#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */
#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */
#define bDisable 0x0 /* rtw_mp.c */
#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */
#define Rx_Smooth_Factor 20 /* phydm only */
/*
* RF Register definition
*/
#define RF_AC 0x00
#define RF_AC_Jaguar 0x00 /* hal_mp.c */
#define RF_CHNLBW 0x18 /* rtl8814b_phy.c */
#define RF_ModeTableAddr 0x30 /* rtl8814b_phy.c */
#define RF_ModeTableData0 0x31 /* rtl8814b_phy.c */
#define RF_ModeTableData1 0x32 /* rtl8814b_phy.c */
#define RF_0x52 0x52
#define RF_WeLut_Jaguar 0xEF /* rtl8814b_phy.c */
/* General Functions */
void rtl8814b_init_hal_spec(PADAPTER); /* hal/hal_com.c */
#ifdef CONFIG_MP_INCLUDED
/* MP Functions */
#include <rtw_mp.h> /* struct mp_priv */
void rtl8814b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */
void rtl8814b_mp_config_rfpath(PADAPTER); /* hal_mp.c */
#endif
void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
#ifdef CONFIG_USB_HCI
#include <rtl8814bu_hal.h>
#elif defined(CONFIG_PCI_HCI)
#include <rtl8814be_hal.h>
#endif
#endif /* _RTL8814B_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8814BE_HAL_H_
#define _RTL8814BE_HAL_H_
#include <drv_types.h> /* PADAPTER */
#define RT_BCN_INT_MASKS (BIT_BCNDMAINT0_MSK_8814B | \
BIT_TXBCN0OK_MSK_8814B | \
BIT_TXBCN0ERR_MSK_8814B | \
BIT_BCNDERR0_MSK_8814B)
/* rtl8814be_ops.c */
void UpdateInterruptMask8814BE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
u16 get_txbd_rw_reg(u16 q_idx);
#endif /* _RTL8814BE_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8814BU_HAL_H_
#define _RTL8814BU_HAL_H_
#ifdef CONFIG_USB_HCI
#include <drv_types.h> /* PADAPTER */
#ifdef CONFIG_USB_HCI
#ifdef USB_PACKET_OFFSET_SZ
#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
#else
#define PACKET_OFFSET_SZ (8)
#endif
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
/* undefine MAX_RECVBUF_SZ from rtl8822c_hal.h */
#ifdef MAX_RECVBUF_SZ
#undef MAX_RECVBUF_SZ
#endif
/* recv_buffer must be large than usb agg size */
#ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
#define MAX_RECVBUF_SZ (15360) /* 15k */
#elif defined(CONFIG_PLATFORM_HISILICON)
/* use 16k to workaround for HISILICON platform */
#define MAX_RECVBUF_SZ (16384)
#else
#define MAX_RECVBUF_SZ (32768)
#endif
#else
#define MAX_RECVBUF_SZ (4000)
#endif
#endif /* !MAX_RECVBUF_SZ */
/* rtl8814bu_ops.c */
void rtl8814bu_set_hal_ops(PADAPTER padapter);
void rtl8814bu_set_hw_type(struct dvobj_priv *pdvobj);
/* rtl8814bu_io.c */
void rtl8814bu_set_intf_ops(struct _io_ops *pops);
#endif /* CONFIG_USB_HCI */
#endif /* _RTL8814BU_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8821A_SPEC_H__
#define __RTL8821A_SPEC_H__
#include <drv_conf.h>
/* This file should based on "hal_com_reg.h" */
#include <hal_com_reg.h>
/* Because 8812a and 8821a is the same serial,
* most of 8821a register definitions are the same as 8812a. */
#include <rtl8812a_spec.h>
/* ************************************************************
* 8821A Regsiter offset definition
* ************************************************************ */
/* ************************************************************
* MAC register
* ************************************************************ */
/* -----------------------------------------------------
* 0x0000h ~ 0x00FFh System Configuration
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0100h ~ 0x01FFh MACTOP General Configuration
* ----------------------------------------------------- */
#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN
/* -----------------------------------------------------
* 0x0200h ~ 0x027Fh TXDMA Configuration
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0280h ~ 0x02FFh RXDMA Configuration
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0300h ~ 0x03FFh PCIe
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0400h ~ 0x047Fh Protocol Configuration
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0500h ~ 0x05FFh EDCA Configuration
* ----------------------------------------------------- */
/* -----------------------------------------------------
* 0x0600h ~ 0x07FFh WMAC Configuration
* ----------------------------------------------------- */
/* ************************************************************
* SDIO Bus Specification
* ************************************************************ */
/* -----------------------------------------------------
* SDIO CMD Address Mapping
* ----------------------------------------------------- */
/* -----------------------------------------------------
* I/O bus domain (Host)
* ----------------------------------------------------- */
/* -----------------------------------------------------
* SDIO register
* ----------------------------------------------------- */
#define SDIO_REG_FREE_TXPG2 0x024
#define SDIO_REG_HCPWM1_8821A 0x025
/* ************************************************************
* Regsiter Bit and Content definition
* ************************************************************ */
#endif /* __RTL8821A_SPEC_H__ */

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8821A_XMIT_H__
#define __RTL8821A_XMIT_H__
#include <drv_types.h>
typedef struct txdescriptor_8821a {
/* Offset 0 */
u32 pktlen:16;
u32 offset:8;
u32 bmc:1;
u32 htc:1;
u32 rsvd0026:1;
u32 rsvd0027:1;
u32 linip:1;
u32 noacm:1;
u32 gf:1;
u32 rsvd0031:1;
/* Offset 4 */
u32 macid:7;
u32 rsvd0407:1;
u32 qsel:5;
u32 rdg_nav_ext:1;
u32 lsig_txop_en:1;
u32 pifs:1;
u32 rate_id:5;
u32 en_desc_id:1;
u32 sectype:2;
u32 pkt_offset:5; /* unit: 8 bytes */
u32 moredata:1;
u32 txop_ps_cap:1;
u32 txop_ps_mode:1;
/* Offset 8 */
u32 p_aid:9;
u32 rsvd0809:1;
u32 cca_rts:2;
u32 agg_en:1;
u32 rdg_en:1;
u32 null_0:1;
u32 null_1:1;
u32 bk:1;
u32 morefrag:1;
u32 raw:1;
u32 spe_rpt:1;
u32 ampdu_density:3;
u32 bt_null:1;
u32 g_id:6;
u32 rsvd0830:2;
/* Offset 12 */
u32 wheader_len:4;
u32 chk_en:1;
u32 early_rate:1;
u32 hw_ssn_sel:2;
u32 userate:1;
u32 disrtsfb:1;
u32 disdatafb:1;
u32 cts2self:1;
u32 rtsen:1;
u32 hw_rts_en:1;
u32 port_id:1;
u32 navusehdr:1;
u32 use_max_len:1;
u32 max_agg_num:5;
u32 ndpa:2;
u32 ampdu_max_time:8;
/* Offset 16 */
u32 datarate:7;
u32 try_rate:1;
u32 data_ratefb_lmt:5;
u32 rts_ratefb_lmt:4;
u32 rty_lmt_en:1;
u32 data_rt_lmt:6;
u32 rtsrate:5;
u32 pcts_en:1;
u32 pcts_mask_idx:2;
/* Offset 20 */
u32 data_sc:4;
u32 data_short:1;
u32 data_bw:2;
u32 data_ldpc:1;
u32 data_stbc:2;
u32 vcs_stbc:2;
u32 rts_short:1;
u32 rts_sc:4;
u32 rsvd2016:7;
u32 tx_ant:4;
u32 txpwr_offset:3;
u32 rsvd2031:1;
/* Offset 24 */
u32 sw_define:12;
u32 mbssid:4;
u32 antsel_A:3;
u32 antsel_B:3;
u32 antsel_C:3;
u32 antsel_D:3;
u32 rsvd2428:4;
/* Offset 28 */
u32 checksum:16;
u32 rsvd2816:8;
u32 usb_txagg_num:8;
/* Offset 32 */
u32 rts_rc:6;
u32 bar_rty_th:2;
u32 data_rc:6;
u32 rsvd3214:1;
u32 en_hwseq:1;
u32 nextneadpage:8;
u32 tailpage:8;
/* Offset 36 */
u32 padding_len:11;
u32 txbf_path:1;
u32 seq:12;
u32 final_data_rate:8;
} TXDESC_8821A, *PTXDESC_8821A;
#ifdef CONFIG_SDIO_HCI
s32 InitXmitPriv8821AS(PADAPTER padapter);
void FreeXmitPriv8821AS(PADAPTER padapter);
s32 XmitBufHandler8821AS(PADAPTER padapter);
s32 MgntXmit8821AS(PADAPTER padapter, struct xmit_frame *pmgntframe);
#ifdef CONFIG_RTW_MGMT_QUEUE
s32 rtl8821as_hal_mgmt_xmit_enqueue(PADAPTER adapter, struct xmit_frame *pxmitframe);
#endif
s32 HalXmitNoLock8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 HalXmit8821AS(PADAPTER padapter, struct xmit_frame *pxmitframe);
#ifndef CONFIG_SDIO_TX_TASKLET
thread_return XmitThread8821AS(thread_context context);
#endif /* !CONFIG_SDIO_TX_TASKLET */
#endif /* CONFIG_SDIO_HCI */
#if 0
#ifdef CONFIG_USB_HCI
s32 rtl8821au_init_xmit_priv(PADAPTER padapter);
void rtl8821au_free_xmit_priv(PADAPTER padapter);
s32 rtl8821au_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8821au_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
s32 rtl8821au_hal_xmitframe_enqueue(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8821au_xmit_buf_handler(PADAPTER padapter);
void rtl8821au_xmit_tasklet(void *priv);
s32 rtl8821au_xmitframe_complete(PADAPTER padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_PCI_HCI
s32 rtl8821e_init_xmit_priv(PADAPTER padapter);
void rtl8821e_free_xmit_priv(PADAPTER padapter);
struct xmit_buf *rtl8821e_dequeue_xmitbuf(struct rtw_tx_ring *ring);
void rtl8821e_xmitframe_resume(PADAPTER padapter);
s32 rtl8821e_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8821e_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
void rtl8821e_xmit_tasklet(void *priv);
#endif /* CONFIG_PCI_HCI */
#endif
#endif /* __RTL8821_XMIT_H__ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8812C_DM_H__
#define __RTL8812C_DM_H__
void rtl8821c_phy_init_dm_priv(PADAPTER);
void rtl8821c_phy_deinit_dm_priv(PADAPTER);
void rtl8821c_phy_init_haldm(PADAPTER);
void rtl8821c_phy_haldm_watchdog(PADAPTER);
#endif

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8821C_HAL_H_
#define _RTL8821C_HAL_H_
#include <osdep_service.h> /* BIT(x) */
#include "../hal/halmac/halmac_api.h" /* MAC REG definition */
#include "hal_data.h"
#include "rtl8821c_spec.h"
#include "../hal/rtl8821c/hal8821c_fw.h"
#ifdef CONFIG_USB_HCI
#include <rtl8821cu_hal.h>
#endif
#ifdef CONFIG_SDIO_HCI
#include <rtl8821cs_hal.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <rtl8821ce_hal.h>
#endif
#ifdef CONFIG_SUPPORT_TRX_SHARED
#define FIFO_BLOCK_SIZE 32768 /*@Block size = 32K*/
#define RX_FIFO_EXPANDING (1 * FIFO_BLOCK_SIZE)
#else
#define RX_FIFO_EXPANDING 0
#endif
#if defined(CONFIG_USB_HCI)
#ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
/* 8821C - RX FIFO :16K ,for RX agg DMA mode = 16K, Rx agg USB mode could large than 16k*/
/* #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)*/
/* For Max throughput issue , need to use USB AGG mode to replace DMA AGG mode*/
#define MAX_RECVBUF_SZ (32768)
/*#define MAX_RECVBUF_SZ_8821C (24576)*/ /* 24k*/
/*#define MAX_RECVBUF_SZ_8821C (20480)*/ /*20K*/
/*#define MAX_RECVBUF_SZ_8821C (10240) */ /*10K*/
/*#define MAX_RECVBUF_SZ_8821C (15360)*/ /*15k < 16k*/
/*#define MAX_RECVBUF_SZ_8821C (8192+1024)*/ /* 8K+1k*/
#else
#define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */
#endif
#endif/* !MAX_RECVBUF_SZ*/
#elif defined(CONFIG_PCI_HCI)
/*#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#define MAX_RECVBUF_SZ (9100)
#else*/
#define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */
/*#endif*/
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)
#endif
void init_hal_spec_rtl8821c(PADAPTER);
/* MP Functions */
#ifdef CONFIG_MP_INCLUDED
void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */
void rtl8821c_mp_config_rfpath(PADAPTER); /* hal_mp.c */
#endif
void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
#ifdef CONFIG_PCI_HCI
u16 get_txbd_rw_reg(u16 q_idx);
#endif
#endif /* _RTL8821C_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTL8821C_SPEC_H__
#define __RTL8821C_SPEC_H__
#define EFUSE_MAP_SIZE HALMAC_EFUSE_SIZE_8821C
/*
* MAC Register definition
*/
#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8821C /* hal_com.c & phydm */
#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8821C /* hal_com.c & phydm */
#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8821C /* phydm only */
#define REG_LEDCFG0 REG_LED_CFG_8821C /* rtw_mp.c */
#define MSR (REG_CR_8821C + 2) /* rtw_mp.c */
#define MSR1 REG_CR_EXT_8821C /* rtw_mp.c & hal_com.c */
#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */
#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */
#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */
#define REG_WOWLAN_WAKE_REASON 0x01C7
#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8821C
/* RXERR_RPT, for rtw_mp.c */
#define RXERR_TYPE_OFDM_PPDU 0
#define RXERR_TYPE_OFDM_FALSE_ALARM 2
#define RXERR_TYPE_OFDM_MPDU_OK 0
#define RXERR_TYPE_OFDM_MPDU_FAIL 1
#define RXERR_TYPE_CCK_PPDU 3
#define RXERR_TYPE_CCK_FALSE_ALARM 5
#define RXERR_TYPE_CCK_MPDU_OK 3
#define RXERR_TYPE_CCK_MPDU_FAIL 4
#define RXERR_TYPE_HT_PPDU 8
#define RXERR_TYPE_HT_FALSE_ALARM 9
#define RXERR_TYPE_HT_MPDU_TOTAL 6
#define RXERR_TYPE_HT_MPDU_OK 6
#define RXERR_TYPE_HT_MPDU_FAIL 7
#define RXERR_TYPE_RX_FULL_DROP 10
#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8821C
#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8821C
#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8821C(type) \
| ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8821C : 0))
/*
* BB Register definition
*/
#define rPMAC_Reset 0x100 /* hal_mp.c */
#define rFPGA0_RFMOD 0x800
#define rFPGA0_TxInfo 0x804
#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */
#define rFPGA0_TxGainStage 0x80C /* phydm only */
#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */
#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */
#define rTxAGC_B_Rate18_06 0x830
#define rTxAGC_B_Rate54_24 0x834
#define rTxAGC_B_CCK1_55_Mcs32 0x838
#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */
#define rTxAGC_B_Mcs03_Mcs00 0x83C
#define rTxAGC_B_Mcs07_Mcs04 0x848
#define rTxAGC_B_Mcs11_Mcs08 0x84C
#define rFPGA0_XA_RFInterfaceOE 0x860
#define rFPGA0_XB_RFInterfaceOE 0x864
#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86C
#define rFPGA0_XAB_RFInterfaceSW 0x870
#define rFPGA0_XAB_RFParameter 0x878
#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */
#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */
#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8821c_phy.c) */
#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */
#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */
#define rFPGA1_TxInfo 0x90C /* hal_mp.c */
#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */
#define rCCK0_System 0xA00
#define rCCK0_AFESetting 0xA04
#define rCCK0_DSPParameter2 0xA1C
#define rCCK0_TxFilter1 0xA20
#define rCCK0_TxFilter2 0xA24
#define rCCK0_DebugPort 0xA28
#define rCCK0_FalseAlarmReport 0xA2C
#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */
#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */
#define rOFDM0_TRxPathEnable 0xC04
#define rOFDM0_TRMuxPar 0xC08
#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */
#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */
#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */
#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */
#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */
#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */
#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */
#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
/* RFE */
#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */
#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */
#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */
#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */
#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */
#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */
#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */
#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */
#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */
#define bMask_RFEInv_Jaguar 0x3FF00000
#define bMask_AntselPathFollow_Jaguar 0x00030000
#define rOFDM1_LSTF 0xD00
#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */
#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8821c_phy.c) */
#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8821c_phy.c) */
#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8821c_phy.c) */
#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8821c_phy.c) */
#define rTxAGC_A_Rate18_06 0xE00
#define rTxAGC_A_Rate54_24 0xE04
#define rTxAGC_A_CCK1_Mcs32 0xE08
#define rTxAGC_A_Mcs03_Mcs00 0xE10
#define rTxAGC_A_Mcs07_Mcs04 0xE14
#define rTxAGC_A_Mcs11_Mcs08 0xE18
#define rTxAGC_A_Mcs15_Mcs12 0xE1C
#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */
#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */
#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */
/* Page1(0x100) */
#define bBBResetB 0x100
/* Page8(0x800) */
#define bCCKEn 0x1000000
#define bOFDMEn 0x2000000
/* Reg 0x80C rFPGA0_TxGainStage */
#define bXBTxAGC 0xF00
#define bXCTxAGC 0xF000
#define bXDTxAGC 0xF0000
/* PageA(0xA00) */
#define bCCKBBMode 0x3
#define bCCKScramble 0x8
#define bCCKTxRate 0x3000
/* General */
#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */
#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */
#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */
#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */
#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */
#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */
#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */
#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */
#define bDisable 0x0 /* rtw_mp.c */
#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */
#define Rx_Smooth_Factor 20 /* phydm only */
/*
* RF Register definition
*/
#define RF_AC 0x00
#define RF_AC_Jaguar 0x00 /* hal_mp.c */
#define RF_CHNLBW 0x18 /* rtl8821c_phy.c */
#define RF_0x52 0x52
struct hw_port_reg {
u32 net_type; /*reg_offset*/
u8 net_type_shift;
u32 macaddr; /*reg_offset*/
u32 bssid; /*reg_offset*/
u32 bcn_ctl; /*reg_offset*/
u32 tsf_rst; /*reg_offset*/
u8 tsf_rst_bit;
u32 bcn_space; /*reg_offset*/
u8 bcn_space_shift;
u16 bcn_space_mask;
u32 ps_aid; /*reg_offset*/
u32 ta; /*reg_offset*/
};
#endif /* __RTL8192E_SPEC_H__ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8821CE_HAL_H_
#define _RTL8821CE_HAL_H_
#include <drv_types.h> /* PADAPTER */
/* rtl8821ce_ops.c */
void rtl8821ce_set_hal_ops(PADAPTER);
#endif /* _RTL8821CE_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8821CS_HAL_H_
#define _RTL8821CS_HAL_H_
#include <drv_types.h> /* PADAPTER */
/* rtl8821cs_ops.c */
u8 rtl8821cs_set_hal_ops(PADAPTER);
#endif /* _RTL8821CS_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8821CU_HAL_H_
#define _RTL8821CU_HAL_H_
#include <drv_types.h> /* PADAPTER */
/* rtl8821cu_ops.c */
u8 rtl8821cu_set_hal_ops(PADAPTER);
void rtl8821cu_set_hw_type(struct dvobj_priv *pdvobj);
#endif /* _RTL8821CU_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822B_HAL_H_
#define _RTL8822B_HAL_H_
#include <osdep_service.h> /* BIT(x) */
#include <drv_types.h> /* PADAPTER */
#include "../hal/halmac/halmac_api.h" /* MAC REG definition */
#ifdef CONFIG_SUPPORT_TRX_SHARED
#define MAX_RECVBUF_SZ 46080 /* 45KB, TX: (256-64)KB */
#else /* !CONFIG_SUPPORT_TRX_SHARED */
#ifdef CONFIG_PCI_HCI
#define MAX_RECVBUF_SZ 12288 /* 12KB */
#else
#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */
#endif /* !CONFIG_PCI_HCI */
#endif /* !CONFIG_SUPPORT_TRX_SHARED */
/*
* MAC Register definition
*/
#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822B /* hal_com.c & phydm */
#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8822B /* hal_com.c & phydm */
#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8822B /* phydm only */
#define REG_LEDCFG0 REG_LED_CFG_8822B /* rtw_mp.c */
#define MSR (REG_CR_8822B + 2) /* rtw_mp.c & hal_com.c */
#define MSR1 REG_CR_EXT_8822B /* rtw_mp.c & hal_com.c */
#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */
#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */
#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822B /* hal_com.c */
#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */
#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822B /* hal_com.c */
/* RXERR_RPT, for rtw_mp.c */
#define RXERR_TYPE_OFDM_PPDU 0
#define RXERR_TYPE_OFDM_FALSE_ALARM 2
#define RXERR_TYPE_OFDM_MPDU_OK 0
#define RXERR_TYPE_OFDM_MPDU_FAIL 1
#define RXERR_TYPE_CCK_PPDU 3
#define RXERR_TYPE_CCK_FALSE_ALARM 5
#define RXERR_TYPE_CCK_MPDU_OK 3
#define RXERR_TYPE_CCK_MPDU_FAIL 4
#define RXERR_TYPE_HT_PPDU 8
#define RXERR_TYPE_HT_FALSE_ALARM 9
#define RXERR_TYPE_HT_MPDU_TOTAL 6
#define RXERR_TYPE_HT_MPDU_OK 6
#define RXERR_TYPE_HT_MPDU_FAIL 7
#define RXERR_TYPE_RX_FULL_DROP 10
#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822B
#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822B
#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822B(type) \
| ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822B : 0))
/*
* BB Register definition
*/
#define rPMAC_Reset 0x100 /* hal_mp.c */
#define rFPGA0_RFMOD 0x800
#define rFPGA0_TxInfo 0x804
#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */
#define rFPGA0_TxGainStage 0x80C /* phydm only */
#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */
#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */
#define rTxAGC_B_Rate18_06 0x830
#define rTxAGC_B_Rate54_24 0x834
#define rTxAGC_B_CCK1_55_Mcs32 0x838
#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */
#define rTxAGC_B_Mcs03_Mcs00 0x83C
#define rTxAGC_B_Mcs07_Mcs04 0x848
#define rTxAGC_B_Mcs11_Mcs08 0x84C
#define rFPGA0_XA_RFInterfaceOE 0x860
#define rFPGA0_XB_RFInterfaceOE 0x864
#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86C
#define rFPGA0_XAB_RFInterfaceSW 0x870
#define rFPGA0_XAB_RFParameter 0x878
#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */
#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */
#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822b_phy.c) */
#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */
#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */
#define rFPGA1_TxInfo 0x90C /* hal_mp.c */
#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */
/* TX BeamForming */
#define REG_BB_TX_PATH_SEL_1_8822B 0x93C /* rtl8822b_phy.c */
#define REG_BB_TX_PATH_SEL_2_8822B 0x940 /* rtl8822b_phy.c */
/* TX BeamForming */
#define REG_BB_TXBF_ANT_SET_BF1_8822B 0x19AC /* rtl8822b_phy.c */
#define REG_BB_TXBF_ANT_SET_BF0_8822B 0x19B4 /* rtl8822b_phy.c */
#define rCCK0_System 0xA00
#define rCCK0_AFESetting 0xA04
#define rCCK0_DSPParameter2 0xA1C
#define rCCK0_TxFilter1 0xA20
#define rCCK0_TxFilter2 0xA24
#define rCCK0_DebugPort 0xA28
#define rCCK0_FalseAlarmReport 0xA2C
#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */
#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */
#define rOFDM0_TRxPathEnable 0xC04
#define rOFDM0_TRMuxPar 0xC08
#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */
#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */
#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */
#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */
#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */
#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */
#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */
#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
#define rOFDM1_LSTF 0xD00
#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */
#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822b_phy.c) */
#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822b_phy.c) */
#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822b_phy.c) */
#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822b_phy.c) */
#define rTxAGC_A_Rate18_06 0xE00
#define rTxAGC_A_Rate54_24 0xE04
#define rTxAGC_A_CCK1_Mcs32 0xE08
#define rTxAGC_A_Mcs03_Mcs00 0xE10
#define rTxAGC_A_Mcs07_Mcs04 0xE14
#define rTxAGC_A_Mcs11_Mcs08 0xE18
#define rTxAGC_A_Mcs15_Mcs12 0xE1C
#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */
#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */
#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
/* RFE */
#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */
#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */
#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */
#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */
#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */
#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */
#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */
#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */
#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */
#define bMask_RFEInv_Jaguar 0x3FF00000
#define bMask_AntselPathFollow_Jaguar 0x00030000
#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/
#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/
#define rA_RFE_Sel_Jaguar2 0x1990
/* Page1(0x100) */
#define bBBResetB 0x100
/* Page8(0x800) */
#define bCCKEn 0x1000000
#define bOFDMEn 0x2000000
/* Reg 0x80C rFPGA0_TxGainStage */
#define bXBTxAGC 0xF00
#define bXCTxAGC 0xF000
#define bXDTxAGC 0xF0000
/* PageA(0xA00) */
#define bCCKBBMode 0x3
#define bCCKScramble 0x8
#define bCCKTxRate 0x3000
/* General */
#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */
#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */
#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */
#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */
#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */
#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */
#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */
#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */
#define bDisable 0x0 /* rtw_mp.c */
#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */
#define Rx_Smooth_Factor 20 /* phydm only */
/*
* RF Register definition
*/
#define RF_AC 0x00
#define RF_AC_Jaguar 0x00 /* hal_mp.c */
#define RF_CHNLBW 0x18 /* rtl8822b_phy.c */
#define RF_ModeTableAddr 0x30 /* rtl8822b_phy.c */
#define RF_ModeTableData0 0x31 /* rtl8822b_phy.c */
#define RF_ModeTableData1 0x32 /* rtl8822b_phy.c */
#define RF_0x52 0x52
#define RF_WeLut_Jaguar 0xEF /* rtl8822b_phy.c */
/* General Functions */
void rtl8822b_init_hal_spec(PADAPTER); /* hal/hal_com.c */
#ifdef CONFIG_MP_INCLUDED
/* MP Functions */
#include <rtw_mp.h> /* struct mp_priv */
void rtl8822b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */
void rtl8822b_mp_config_rfpath(PADAPTER); /* hal_mp.c */
#endif
void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
#ifdef CONFIG_USB_HCI
#include <rtl8822bu_hal.h>
#elif defined(CONFIG_SDIO_HCI)
#include <rtl8822bs_hal.h>
#elif defined(CONFIG_PCI_HCI)
#include <rtl8822be_hal.h>
#endif
#endif /* _RTL8822B_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822BE_HAL_H_
#define _RTL8822BE_HAL_H_
#include <drv_types.h> /* PADAPTER */
#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16)
/* rtl8822be_ops.c */
void UpdateInterruptMask8822BE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
u16 get_txbd_rw_reg(u16 q_idx);
#endif /* _RTL8822BE_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822BS_HAL_H_
#define _RTL8822BS_HAL_H_
#include <drv_types.h> /* PADAPTER */
/* rtl8822bs_ops.c */
void rtl8822bs_set_hal_ops(PADAPTER);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void rtl8822bs_disable_interrupt_but_cpwm2(PADAPTER adapter);
#endif
/* rtl8822bs_xmit.c */
s32 rtl8822bs_dequeue_writeport(PADAPTER);
#define _dequeue_writeport(a) rtl8822bs_dequeue_writeport(a)
#endif /* _RTL8822BS_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822BU_HAL_H_
#define _RTL8822BU_HAL_H_
#ifdef CONFIG_USB_HCI
#include <drv_types.h> /* PADAPTER */
#ifdef CONFIG_USB_HCI
#ifdef USB_PACKET_OFFSET_SZ
#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
#else
#define PACKET_OFFSET_SZ (8)
#endif
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
/* undefine MAX_RECVBUF_SZ from rtl8822b_hal.h */
#ifdef MAX_RECVBUF_SZ
#undef MAX_RECVBUF_SZ
#endif
/* recv_buffer must be large than usb agg size */
#ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
#define MAX_RECVBUF_SZ (15360) /* 15k */
#elif defined(CONFIG_PLATFORM_HISILICON) || defined(CONFIG_PLATFORM_ARM_RTD299X)
/* use 16k to workaround for HISILICON and RTK TV platform */
#define MAX_RECVBUF_SZ (16384)
#else
#define MAX_RECVBUF_SZ (32768)
#endif
#else
#define MAX_RECVBUF_SZ (4000)
#endif
#endif /* !MAX_RECVBUF_SZ */
/* rtl8822bu_ops.c */
void rtl8822bu_set_hal_ops(PADAPTER padapter);
void rtl8822bu_set_hw_type(struct dvobj_priv *pdvobj);
/* rtl8822bu_io.c */
void rtl8822bu_set_intf_ops(struct _io_ops *pops);
#endif /* CONFIG_USB_HCI */
#endif /* _RTL8822BU_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822C_HAL_H_
#define _RTL8822C_HAL_H_
#include <osdep_service.h> /* BIT(x) */
#include <drv_types.h> /* PADAPTER */
#include "../hal/halmac/halmac_api.h" /* MAC REG definition */
#ifdef CONFIG_SUPPORT_TRX_SHARED
#define DEF_RECVBUF_SZ 24576 /* RX 24K */
#if (DFT_TRX_SHARE_MODE == 1)
#define RX_FIFO_EXPANDING 40960 /* RX= 24K+40K=64K , TX=256K-40K=216K */
#elif (DFT_TRX_SHARE_MODE == 2)
#define RX_FIFO_EXPANDING 65536 /* RX= 24K+40K+24=88K , TX=256K-40K-24K=192K */
#elif (DFT_TRX_SHARE_MODE ==3)
#define RX_FIFO_EXPANDING 106496 /* RX= 24K+40K+24+40K=128K , TX=256K-40K-24K-40K=152K */
#elif (DFT_TRX_SHARE_MODE ==4)
#define RX_FIFO_EXPANDING 131072 /* RX= 24K+40K+24+40K+24K=128K , TX=256K-40K-24K-40K-24K=128K */
#else
#define RX_FIFO_EXPANDING 0
#endif
#define MAX_RECVBUF_SZ (DEF_RECVBUF_SZ + RX_FIFO_EXPANDING)
#else /* !CONFIG_SUPPORT_TRX_SHARED */
#ifdef CONFIG_PCI_HCI
#define MAX_RECVBUF_SZ 12288 /* 12KB */
#else
#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */
#endif /* !CONFIG_PCI_HCI */
#endif /* !CONFIG_SUPPORT_TRX_SHARED */
/*
* MAC Register definition
*/
#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822C /* hal_com.c & phydm */
#define REG_LEDCFG0 REG_LED_CFG_8822C /* rtw_mp.c */
#define MSR (REG_CR_8822C + 2) /* rtw_mp.c & hal_com.c */
#define MSR1 REG_CR_EXT_8822C /* rtw_mp.c & hal_com.c */
#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */
#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */
#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822C /* hal_com.c */
#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */
#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822C /* hal_com.c */
/* RXERR_RPT, for rtw_mp.c */
#define RXERR_TYPE_OFDM_PPDU 0
#define RXERR_TYPE_OFDM_FALSE_ALARM 2
#define RXERR_TYPE_OFDM_MPDU_OK 0
#define RXERR_TYPE_OFDM_MPDU_FAIL 1
#define RXERR_TYPE_CCK_PPDU 3
#define RXERR_TYPE_CCK_FALSE_ALARM 5
#define RXERR_TYPE_CCK_MPDU_OK 3
#define RXERR_TYPE_CCK_MPDU_FAIL 4
#define RXERR_TYPE_HT_PPDU 8
#define RXERR_TYPE_HT_FALSE_ALARM 9
#define RXERR_TYPE_HT_MPDU_TOTAL 6
#define RXERR_TYPE_HT_MPDU_OK 6
#define RXERR_TYPE_HT_MPDU_FAIL 7
#define RXERR_TYPE_RX_FULL_DROP 10
#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822C
#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822C
#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822C(type) \
| ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822C : 0))
/*
* BB Register definition
*/
#define rPMAC_Reset 0x100 /* hal_mp.c */
#define rFPGA0_RFMOD 0x800
#define rFPGA0_TxInfo 0x804
#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */
#define rFPGA0_TxGainStage 0x80C /* phydm only */
#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */
#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */
#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */
#define rTxAGC_B_Rate18_06 0x830
#define rTxAGC_B_Rate54_24 0x834
#define rTxAGC_B_CCK1_55_Mcs32 0x838
#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */
#define rTxAGC_B_Mcs03_Mcs00 0x83C
#define rTxAGC_B_Mcs07_Mcs04 0x848
#define rTxAGC_B_Mcs11_Mcs08 0x84C
#define rFPGA0_XA_RFInterfaceOE 0x860
#define rFPGA0_XB_RFInterfaceOE 0x864
#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86C
#define rFPGA0_XAB_RFInterfaceSW 0x870
#define rFPGA0_XAB_RFParameter 0x878
#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */
#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */
#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822c_phy.c) */
#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */
#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */
#define rFPGA1_TxInfo 0x90C /* hal_mp.c */
#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */
/* TX BeamForming */
#define REG_BB_TX_PATH_SEL_1_8822C 0x93C /* rtl8822c_phy.c */
#define REG_BB_TX_PATH_SEL_2_8822C 0x940 /* rtl8822c_phy.c */
/* TX BeamForming */
#define REG_BB_TXBF_ANT_SET_BF1_8822C 0x19AC /* rtl8822c_phy.c */
#define REG_BB_TXBF_ANT_SET_BF0_8822C 0x19B4 /* rtl8822c_phy.c */
#define rCCK0_System 0xA00
#define rCCK0_AFESetting 0xA04
#define rCCK0_DSPParameter2 0xA1C
#define rCCK0_TxFilter1 0xA20
#define rCCK0_TxFilter2 0xA24
#define rCCK0_DebugPort 0xA28
#define rCCK0_FalseAlarmReport 0xA2C
#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */
#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */
#define rOFDM0_TRxPathEnable 0xC04
#define rOFDM0_TRMuxPar 0xC08
#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */
#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */
#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */
#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */
#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */
#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */
#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */
#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
#define rOFDM1_LSTF 0xD00
#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */
#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822c_phy.c) */
#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822c_phy.c) */
#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822c_phy.c) */
#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822c_phy.c) */
#define rTxAGC_A_Rate18_06 0xE00
#define rTxAGC_A_Rate54_24 0xE04
#define rTxAGC_A_CCK1_Mcs32 0xE08
#define rTxAGC_A_Mcs03_Mcs00 0xE10
#define rTxAGC_A_Mcs07_Mcs04 0xE14
#define rTxAGC_A_Mcs11_Mcs08 0xE18
#define rTxAGC_A_Mcs15_Mcs12 0xE1C
#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */
#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */
#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */
/* RFE */
#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */
#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */
#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */
#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */
#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */
#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */
#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */
#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */
#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */
#define bMask_RFEInv_Jaguar 0x3FF00000
#define bMask_AntselPathFollow_Jaguar 0x00030000
#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/
#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/
#define rA_RFE_Sel_Jaguar2 0x1990
/* Page1(0x100) */
#define bBBResetB 0x100
/* Page8(0x800) */
#define bCCKEn 0x1000000
#define bOFDMEn 0x2000000
/* Reg 0x80C rFPGA0_TxGainStage */
#define bXBTxAGC 0xF00
#define bXCTxAGC 0xF000
#define bXDTxAGC 0xF0000
/* PageA(0xA00) */
#define bCCKBBMode 0x3
#define bCCKScramble 0x8
#define bCCKTxRate 0x3000
/* General */
#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */
#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */
#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */
#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */
#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */
#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */
#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */
#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */
#define bDisable 0x0 /* rtw_mp.c */
#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */
#define Rx_Smooth_Factor 20 /* phydm only */
/*
* RF Register definition
*/
#define RF_AC 0x00
#define RF_AC_Jaguar 0x00 /* hal_mp.c */
#define RF_CHNLBW 0x18 /* rtl8822c_phy.c */
#define RF_ModeTableAddr 0x30 /* rtl8822c_phy.c */
#define RF_ModeTableData0 0x31 /* rtl8822c_phy.c */
#define RF_ModeTableData1 0x32 /* rtl8822c_phy.c */
#define RF_0x52 0x52
#define RF_WeLut_Jaguar 0xEF /* rtl8822c_phy.c */
/* rtw_lps_state_chk()@hal_com.c */
#define BIT_PWRBIT_OW_EN BIT_WMAC_TCRPWRMGT_HWDATA_EN_8822C
/* General Functions */
void rtl8822c_init_hal_spec(PADAPTER); /* hal/hal_com.c */
#ifdef CONFIG_MP_INCLUDED
/* MP Functions */
#include <rtw_mp.h> /* struct mp_priv */
void rtl8822c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */
void rtl8822c_mp_config_rfpath(PADAPTER); /* hal_mp.c */
#endif
void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus);
#ifdef CONFIG_USB_HCI
#include <rtl8822cu_hal.h>
#elif defined(CONFIG_SDIO_HCI)
#include <rtl8822cs_hal.h>
#elif defined(CONFIG_PCI_HCI)
#include <rtl8822ce_hal.h>
#endif
#endif /* _RTL8822C_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822CE_HAL_H_
#define _RTL8822CE_HAL_H_
#include <drv_types.h> /* PADAPTER */
#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16)
/* rtl8822ce_ops.c */
void UpdateInterruptMask8822CE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
u16 get_txbd_rw_reg(u16 q_idx);
#endif /* _RTL8822CE_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822CS_HAL_H_
#define _RTL8822CS_HAL_H_
#include <drv_types.h> /* PADAPTER */
/* rtl8822cs_ops.c */
void rtl8822cs_set_hal_ops(PADAPTER);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void rtl8822cs_disable_interrupt_but_cpwm2(PADAPTER adapter);
#endif
/* rtl8822cs_xmit.c */
s32 rtl8822cs_dequeue_writeport(PADAPTER);
#define _dequeue_writeport(a) rtl8822cs_dequeue_writeport(a)
#endif /* _RTL8822CS_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL8822CU_HAL_H_
#define _RTL8822CU_HAL_H_
#ifdef CONFIG_USB_HCI
#include <drv_types.h> /* PADAPTER */
#ifdef CONFIG_USB_HCI
#ifdef USB_PACKET_OFFSET_SZ
#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
#else
#define PACKET_OFFSET_SZ (8)
#endif
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
/* undefine MAX_RECVBUF_SZ from rtl8822c_hal.h */
#ifdef MAX_RECVBUF_SZ
#undef MAX_RECVBUF_SZ
#endif
/* recv_buffer must be large than usb agg size */
#ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#ifdef CONFIG_PLATFORM_NOVATEK_NT72668
#define MAX_RECVBUF_SZ (15360) /* 15k */
#elif defined(CONFIG_PLATFORM_HISILICON) || defined(CONFIG_PLATFORM_ARM_RTD299X)
/* use 16k to workaround for HISILICON and RTK TV platform */
#define MAX_RECVBUF_SZ (16384)
#else
#define MAX_RECVBUF_SZ (32768)
#endif
#else
#define MAX_RECVBUF_SZ (4000)
#endif
#endif /* !MAX_RECVBUF_SZ */
/* rtl8822cu_ops.c */
void rtl8822cu_set_hal_ops(PADAPTER padapter);
void rtl8822cu_set_hw_type(struct dvobj_priv *pdvobj);
/* rtl8822cu_io.c */
void rtl8822cu_set_intf_ops(struct _io_ops *pops);
#endif /* CONFIG_USB_HCI */
#endif /* _RTL8822CU_HAL_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_ANDROID_H__
#define __RTW_ANDROID_H__
enum ANDROID_WIFI_CMD {
ANDROID_WIFI_CMD_START,
ANDROID_WIFI_CMD_STOP,
ANDROID_WIFI_CMD_SCAN_ACTIVE,
ANDROID_WIFI_CMD_SCAN_PASSIVE,
ANDROID_WIFI_CMD_RSSI,
ANDROID_WIFI_CMD_LINKSPEED,
ANDROID_WIFI_CMD_RXFILTER_START,
ANDROID_WIFI_CMD_RXFILTER_STOP,
ANDROID_WIFI_CMD_RXFILTER_ADD,
ANDROID_WIFI_CMD_RXFILTER_REMOVE,
ANDROID_WIFI_CMD_BTCOEXSCAN_START,
ANDROID_WIFI_CMD_BTCOEXSCAN_STOP,
ANDROID_WIFI_CMD_BTCOEXMODE,
ANDROID_WIFI_CMD_SETSUSPENDMODE,
ANDROID_WIFI_CMD_SETSUSPENDOPT,
ANDROID_WIFI_CMD_P2P_DEV_ADDR,
ANDROID_WIFI_CMD_SETFWPATH,
ANDROID_WIFI_CMD_SETBAND,
ANDROID_WIFI_CMD_GETBAND,
ANDROID_WIFI_CMD_COUNTRY,
ANDROID_WIFI_CMD_P2P_SET_NOA,
ANDROID_WIFI_CMD_P2P_GET_NOA,
ANDROID_WIFI_CMD_P2P_SET_PS,
ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE,
ANDROID_WIFI_CMD_MIRACAST,
#ifdef CONFIG_PNO_SUPPORT
ANDROID_WIFI_CMD_PNOSSIDCLR_SET,
ANDROID_WIFI_CMD_PNOSETUP_SET,
ANDROID_WIFI_CMD_PNOENABLE_SET,
ANDROID_WIFI_CMD_PNODEBUG_SET,
#endif
ANDROID_WIFI_CMD_MACADDR,
ANDROID_WIFI_CMD_BLOCK_SCAN,
ANDROID_WIFI_CMD_BLOCK,
ANDROID_WIFI_CMD_WFD_ENABLE,
ANDROID_WIFI_CMD_WFD_DISABLE,
ANDROID_WIFI_CMD_WFD_SET_TCPPORT,
ANDROID_WIFI_CMD_WFD_SET_MAX_TPUT,
ANDROID_WIFI_CMD_WFD_SET_DEVTYPE,
ANDROID_WIFI_CMD_CHANGE_DTIM,
ANDROID_WIFI_CMD_HOSTAPD_SET_MACADDR_ACL,
ANDROID_WIFI_CMD_HOSTAPD_ACL_ADD_STA,
ANDROID_WIFI_CMD_HOSTAPD_ACL_REMOVE_STA,
#if defined(CONFIG_GTK_OL) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 1, 0))
ANDROID_WIFI_CMD_GTK_REKEY_OFFLOAD,
#endif /* CONFIG_GTK_OL */
ANDROID_WIFI_CMD_P2P_DISABLE,
ANDROID_WIFI_CMD_SET_AEK,
ANDROID_WIFI_CMD_EXT_AUTH_STATUS,
ANDROID_WIFI_CMD_DRIVERVERSION,
ANDROID_WIFI_CMD_MAX
};
int rtw_android_cmdstr_to_num(char *cmdstr);
int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd);
#if defined(CONFIG_PNO_SUPPORT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
int rtw_android_pno_enable(struct net_device *net, int pno_enable);
int rtw_android_cfg80211_pno_setup(struct net_device *net,
struct cfg80211_ssid *ssid, int n_ssids, int interval);
#endif
#if defined(RTW_ENABLE_WIFI_CONTROL_FUNC)
int rtw_android_wifictrl_func_add(void);
void rtw_android_wifictrl_func_del(void);
void *wl_android_prealloc(int section, unsigned long size);
int wifi_get_irq_number(unsigned long *irq_flags_ptr);
int wifi_set_power(int on, unsigned long msec);
int wifi_get_mac_addr(unsigned char *buf);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0))
void *wifi_get_country_code(char *ccode, u32 flags);
#else /* Linux kernel < 3.18 */
void *wifi_get_country_code(char *ccode);
#endif /* Linux kernel < 3.18 */
#else
static inline int rtw_android_wifictrl_func_add(void)
{
return 0;
}
static inline void rtw_android_wifictrl_func_del(void) {}
#endif /* defined(RTW_ENABLE_WIFI_CONTROL_FUNC) */
#ifdef CONFIG_GPIO_WAKEUP
#ifdef CONFIG_PLATFORM_INTEL_BYT
int wifi_configure_gpio(void);
#endif /* CONFIG_PLATFORM_INTEL_BYT */
void wifi_free_gpio(unsigned int gpio);
#endif /* CONFIG_GPIO_WAKEUP */
#endif /* __RTW_ANDROID_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_AP_H_
#define __RTW_AP_H_
#ifdef CONFIG_AP_MODE
/* external function */
extern void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta);
extern void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta);
void init_mlme_ap_info(_adapter *padapter);
void free_mlme_ap_info(_adapter *padapter);
u8 rtw_set_tim_ie(u8 dtim_cnt, u8 dtim_period
, const u8 *tim_bmp, u8 tim_bmp_len, u8 *tim_ie);
/* void update_BCNTIM(_adapter *padapter); */
void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len);
void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index);
void _update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx, u8 flags, const char *tag);
#define update_beacon(adapter, ie_id, oui, tx, flags) _update_beacon((adapter), (ie_id), (oui), (tx), (flags), __func__)
/*update_beacon - (flags) can set to normal enqueue (0) and RTW_CMDF_WAIT_ACK enqueue.
(flags) = RTW_CMDF_DIRECTLY is not currently implemented, it will do normal enqueue.*/
void rtw_ap_update_sta_ra_info(_adapter *padapter, struct sta_info *psta);
void expire_timeout_chk(_adapter *padapter);
void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta);
void rtw_start_bss_hdl_after_chbw_decided(_adapter *adapter);
void start_bss_network(_adapter *padapter, struct createbss_parm *parm);
int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len);
void rtw_ap_restore_network(_adapter *padapter);
#if CONFIG_RTW_MACADDR_ACL
void rtw_macaddr_acl_init(_adapter *adapter, u8 period);
void rtw_macaddr_acl_deinit(_adapter *adapter, u8 period);
void rtw_macaddr_acl_clear(_adapter *adapter, u8 period);
void rtw_set_macaddr_acl(_adapter *adapter, u8 period, int mode);
int rtw_acl_add_sta(_adapter *adapter, u8 period, const u8 *addr);
int rtw_acl_remove_sta(_adapter *adapter, u8 period, const u8 *addr);
#endif /* CONFIG_RTW_MACADDR_ACL */
u8 rtw_ap_set_sta_key(_adapter *adapter, const u8 *addr, u8 alg, const u8 *key, u8 keyid, u8 gk);
u8 rtw_ap_set_pairwise_key(_adapter *padapter, struct sta_info *psta);
int rtw_ap_set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid);
int rtw_ap_set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid, u8 set_tx);
#ifdef CONFIG_NATIVEAP_MLME
void associated_clients_update(_adapter *padapter, u8 updated, u32 sta_info_type);
void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta);
u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta);
void sta_info_update(_adapter *padapter, struct sta_info *psta);
void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta);
u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason, bool enqueue);
int rtw_sta_flush(_adapter *padapter, bool enqueue);
int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset);
void start_ap_mode(_adapter *padapter);
void stop_ap_mode(_adapter *padapter);
#endif
void rtw_ap_update_bss_chbw(_adapter *adapter, WLAN_BSSID_EX *bss, u8 ch, u8 bw, u8 offset);
u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp
, s16 req_ch, s8 req_bw, s8 req_offset, u8 *ch, u8 *bw, u8 *offset, u8 *chbw_allow, bool *set_u_ch);
#ifdef CONFIG_AUTO_AP_MODE
void rtw_auto_ap_rx_msg_dump(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_pos);
extern void rtw_start_auto_ap(_adapter *adapter);
#endif /* CONFIG_AUTO_AP_MODE */
void rtw_ap_parse_sta_capability(_adapter *adapter, struct sta_info *sta, u8 *cap);
u16 rtw_ap_parse_sta_supported_rates(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len);
u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems);
void rtw_ap_parse_sta_wmm_ie(_adapter *adapter, struct sta_info *sta, u8 *tlv_ies, u16 tlv_ies_len);
void rtw_ap_parse_sta_ht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems);
void rtw_ap_parse_sta_vht_ie(_adapter *adapter, struct sta_info *sta, struct rtw_ieee802_11_elems *elems);
void rtw_ap_parse_sta_multi_ap_ie(_adapter *adapter, struct sta_info *sta, u8 *ies, int ies_len);
/* b2u flags */
#define RTW_AP_B2U_ALL BIT0
#define RTW_AP_B2U_GA_UCAST BIT1 /* WDS group addressed unicast frame, forward only */
#define RTW_AP_B2U_BCAST BIT2
#define RTW_AP_B2U_IP_MCAST BIT3
#define rtw_ap_src_b2u_policy_chk(flags, da) ( \
(flags & RTW_AP_B2U_ALL) \
|| ((flags & RTW_AP_B2U_BCAST) && is_broadcast_mac_addr(da)) \
|| ((flags & RTW_AP_B2U_IP_MCAST) && (IP_MCAST_MAC(da) || ICMPV6_MCAST_MAC(da))) \
)
#define rtw_ap_fwd_b2u_policy_chk(flags, da, gaucst) ( \
(flags & RTW_AP_B2U_ALL) \
|| ((flags & RTW_AP_B2U_GA_UCAST) && gaucst) \
|| ((flags & RTW_AP_B2U_BCAST) && is_broadcast_mac_addr(da)) \
|| ((flags & RTW_AP_B2U_IP_MCAST) && (IP_MCAST_MAC(da) || ICMPV6_MCAST_MAC(da))) \
)
void dump_ap_b2u_flags(void *sel, _adapter *adapter);
int rtw_ap_addr_resolve(_adapter *adapter, u16 os_qid, struct xmit_frame *xframe, _pkt *pkt, _list *b2u_list);
int rtw_ap_rx_data_validate_hdr(_adapter *adapter, union recv_frame *rframe, struct sta_info **sta);
int rtw_ap_rx_msdu_act_check(union recv_frame *rframe
, const u8 *da, const u8 *sa
, u8 *msdu, enum rtw_rx_llc_hdl llc_hdl
, struct xmit_frame **fwd_frame, _list *b2u_list);
void update_bmc_sta(_adapter *padapter);
#ifdef CONFIG_BMC_TX_RATE_SELECT
void rtw_update_bmc_sta_tx_rate(_adapter *adapter);
#endif
void rtw_process_ht_action_smps(_adapter *padapter, u8 *ta, u8 ctrl_field);
void rtw_process_public_act_bsscoex(_adapter *padapter, u8 *pframe, uint frame_len);
#ifdef CONFIG_80211N_HT
int rtw_ht_operation_update(_adapter *padapter);
#endif /* CONFIG_80211N_HT */
u8 rtw_ap_sta_states_check(_adapter *adapter);
#ifdef CONFIG_FW_HANDLE_TXBCN
#define rtw_ap_get_nums(adapter) (adapter_to_dvobj(adapter)->nr_ap_if)
bool rtw_ap_nums_check(_adapter *adapter);
#endif
#ifdef CONFIG_SWTIMER_BASED_TXBCN
void tx_beacon_handlder(struct dvobj_priv *pdvobj);
void tx_beacon_timer_handlder(void *ctx);
#endif /*CONFIG_SWTIMER_BASED_TXBCN*/
#endif /* end of CONFIG_AP_MODE */
#endif /*__RTW_AP_H_*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_BEAMFORMING_H_
#define __RTW_BEAMFORMING_H_
#ifdef CONFIG_BEAMFORMING
#ifdef RTW_BEAMFORMING_VERSION_2
#define MAX_NUM_BEAMFORMEE_SU 2
#define MAX_NUM_BEAMFORMER_SU 2
#define MAX_NUM_BEAMFORMEE_MU 6
#define MAX_NUM_BEAMFORMER_MU 1
#define MAX_BEAMFORMEE_ENTRY_NUM (MAX_NUM_BEAMFORMEE_SU + MAX_NUM_BEAMFORMEE_MU)
#define MAX_BEAMFORMER_ENTRY_NUM (MAX_NUM_BEAMFORMER_SU + MAX_NUM_BEAMFORMER_MU)
/* <Note> Need to be defined by IC */
#define SU_SOUNDING_TIMEOUT 5 /* unit: ms */
#define MU_SOUNDING_TIMEOUT 8 /* unit: ms */
#define GET_BEAMFORM_INFO(adapter) (&GET_HAL_DATA(adapter)->beamforming_info)
#define GetInitSoundCnt(_SoundPeriod, _MinSoundPeriod) ((_SoundPeriod)/(_MinSoundPeriod))
enum BEAMFORMING_CTRL_TYPE {
BEAMFORMING_CTRL_ENTER = 0,
BEAMFORMING_CTRL_LEAVE = 1,
BEAMFORMING_CTRL_START_PERIOD = 2,
BEAMFORMING_CTRL_END_PERIOD = 3,
BEAMFORMING_CTRL_SOUNDING_FAIL = 4,
BEAMFORMING_CTRL_SOUNDING_CLK = 5,
BEAMFORMING_CTRL_SET_GID_TABLE = 6,
BEAMFORMING_CTRL_SET_CSI_REPORT = 7,
};
enum _BEAMFORMING_STATE {
BEAMFORMING_STATE_IDLE,
BEAMFORMING_STATE_START,
BEAMFORMING_STATE_END,
};
/*
* typedef BEAMFORMING_CAP for phydm
*/
typedef enum beamforming_cap {
BEAMFORMING_CAP_NONE = 0x0,
BEAMFORMER_CAP_HT_EXPLICIT = 0x1,
BEAMFORMEE_CAP_HT_EXPLICIT = 0x2,
BEAMFORMER_CAP_VHT_SU = 0x4, /* Self has er Cap, because Reg er & peer ee */
BEAMFORMEE_CAP_VHT_SU = 0x8, /* Self has ee Cap, because Reg ee & peer er */
BEAMFORMER_CAP_VHT_MU = 0x10, /* Self has er Cap, because Reg er & peer ee */
BEAMFORMEE_CAP_VHT_MU = 0x20, /* Self has ee Cap, because Reg ee & peer er */
BEAMFORMER_CAP = 0x40,
BEAMFORMEE_CAP = 0x80,
} BEAMFORMING_CAP;
enum _BEAMFORM_ENTRY_HW_STATE {
BEAMFORM_ENTRY_HW_STATE_NONE,
BEAMFORM_ENTRY_HW_STATE_ADD_INIT,
BEAMFORM_ENTRY_HW_STATE_ADDING,
BEAMFORM_ENTRY_HW_STATE_ADDED,
BEAMFORM_ENTRY_HW_STATE_DELETE_INIT,
BEAMFORM_ENTRY_HW_STATE_DELETING,
BEAMFORM_ENTRY_HW_STATE_MAX
};
/* The sounding state is recorded by BFer. */
enum _SOUNDING_STATE {
SOUNDING_STATE_NONE = 0,
SOUNDING_STATE_INIT = 1,
SOUNDING_STATE_SU_START = 2,
SOUNDING_STATE_SU_SOUNDDOWN = 3,
SOUNDING_STATE_MU_START = 4,
SOUNDING_STATE_MU_SOUNDDOWN = 5,
SOUNDING_STATE_SOUNDING_TIMEOUT = 6,
SOUNDING_STATE_MAX
};
struct beamformee_entry {
u8 used; /* _TRUE/_FALSE */
u8 txbf;
u8 sounding;
/* Used to construct AID field of NDPA packet */
u16 aid;
/* Used to Set Reg42C in IBSS mode */
u16 mac_id;
/* Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC */
u16 p_aid;
u8 g_id;
/* Used to fill Reg6E4 to fill Mac address of CSI report frame */
u8 mac_addr[ETH_ALEN];
/* Sounding BandWidth */
enum channel_width sound_bw;
u16 sound_period;
enum beamforming_cap cap;
enum _BEAMFORM_ENTRY_HW_STATE state;
/* The BFee need to be sounded when count to zero */
u8 SoundCnt;
u8 bCandidateSoundingPeer;
u8 bSoundingTimeout;
u8 bDeleteSounding;
/* Get the result through throughput and Tx rate from BB API */
u8 bApplySounding;
/* information for sounding judgement */
systime tx_timestamp;
u64 tx_bytes;
u16 LogStatusFailCnt:5; /* 0~21 */
u16 DefaultCSICnt:5; /* 0~21 */
u8 CSIMatrix[327];
u16 CSIMatrixLen;
u8 NumofSoundingDim;
u8 comp_steering_num_of_bfer;
/* SU-MIMO */
u8 su_reg_index;
/* MU-MIMO */
u8 mu_reg_index;
u8 gid_valid[8];
u8 user_position[16];
/* For 8822B C-cut workaround */
/* If the flag set to _TRUE, do not sound this STA */
u8 bSuspendSUCap;
};
struct beamformer_entry {
u8 used;
/* p_aid of BFer entry is probably not used */
/* Used to fill Reg42C & Reg714 to compare with p_aid of Tx DESC */
u16 p_aid;
u8 g_id;
u8 mac_addr[ETH_ALEN];
enum beamforming_cap cap;
enum _BEAMFORM_ENTRY_HW_STATE state;
u8 NumofSoundingDim;
/* SU-MIMO */
u8 su_reg_index;
/* MU-MIMO */
u8 gid_valid[8];
u8 user_position[16];
u16 aid;
};
struct sounding_info {
u8 su_sounding_list[MAX_NUM_BEAMFORMEE_SU];
u8 mu_sounding_list[MAX_NUM_BEAMFORMEE_MU];
enum _SOUNDING_STATE state;
/*
* su_bfee_curidx is index for beamforming_info.bfee_entry[]
* range: 0~MAX_BEAMFORMEE_ENTRY_NUM
*/
u8 su_bfee_curidx;
u8 candidate_mu_bfee_cnt;
/* For sounding schedule maintenance */
u16 min_sounding_period;
/* Get from sounding list */
/* Ex: SU STA1, SU STA2, MU STA(1~n) => the value will be 2+1=3 */
u8 sound_remain_cnt_per_period;
};
struct _RT_CSI_INFO{
u8 Nc;
u8 Nr;
u8 Ng;
u8 CodeBook;
u8 ChnlWidth;
u8 bVHT;
};
struct beamforming_info {
enum beamforming_cap beamforming_cap;
enum _BEAMFORMING_STATE beamforming_state;
struct beamformee_entry bfee_entry[MAX_BEAMFORMEE_ENTRY_NUM];
struct beamformer_entry bfer_entry[MAX_BEAMFORMER_ENTRY_NUM];
u8 sounding_sequence;
u8 beamformee_su_cnt;
u8 beamformer_su_cnt;
u32 beamformee_su_reg_maping;
u32 beamformer_su_reg_maping;
/* For MU-MINO */
u8 beamformee_mu_cnt;
u8 beamformer_mu_cnt;
u32 beamformee_mu_reg_maping;
u8 first_mu_bfee_index;
u8 mu_bfer_curidx;
u8 cur_csi_rpt_rate;
struct sounding_info sounding_info;
/* schedule regular timer for sounding */
_timer sounding_timer;
/* moniter if soudning too long */
_timer sounding_timeout_timer;
/* For HW configuration */
u8 SetHalBFEnterOnDemandCnt;
u8 SetHalBFLeaveOnDemandCnt;
u8 SetHalSoundownOnDemandCnt;
u8 bSetBFHwConfigInProgess;
/*
* Target CSI report info.
* Keep the first SU CSI report info for 8822B HW bug workaround.
*/
u8 bEnableSUTxBFWorkAround;
struct _RT_CSI_INFO TargetCSIInfo;
/* Only peform sounding to the first SU BFee */
struct beamformee_entry *TargetSUBFee;
/* For debug */
s8 sounding_running;
};
enum beamforming_cap rtw_bf_bfee_get_entry_cap_by_macid(void *mlmepriv, u8 mac_id);
struct beamformer_entry *rtw_bf_bfer_get_entry_by_addr(PADAPTER, u8 *ra);
struct beamformee_entry *rtw_bf_bfee_get_entry_by_addr(PADAPTER, u8 *ra);
void rtw_bf_get_ndpa_packet(PADAPTER, union recv_frame *);
u32 rtw_bf_get_report_packet(PADAPTER, union recv_frame *);
u8 rtw_bf_send_vht_gid_mgnt_packet(PADAPTER, u8 *ra, u8 *gid, u8 *position);
void rtw_bf_get_vht_gid_mgnt_packet(PADAPTER, union recv_frame *);
void rtw_bf_init(PADAPTER);
void rtw_bf_cmd_hdl(PADAPTER, u8 type, u8 *pbuf);
u8 rtw_bf_cmd(PADAPTER, s32 type, u8 *pbuf, s32 size, u8 enqueue);
void rtw_bf_update_attrib(PADAPTER, struct pkt_attrib *, struct sta_info *);
void rtw_bf_c2h_handler(PADAPTER, u8 id, u8 *buf, u8 buf_len);
void rtw_bf_update_traffic(PADAPTER);
/* Compatible with old function name, only for using outside rtw_beamforming.c */
#define beamforming_get_entry_beam_cap_by_mac_id rtw_bf_bfee_get_entry_cap_by_macid
#define rtw_beamforming_get_ndpa_frame rtw_bf_get_ndpa_packet
#define rtw_beamforming_get_report_frame rtw_bf_get_report_packet
#define rtw_beamforming_get_vht_gid_mgnt_frame rtw_bf_get_vht_gid_mgnt_packet
#define beamforming_wk_hdl rtw_bf_cmd_hdl
#define beamforming_wk_cmd rtw_bf_cmd
#define update_attrib_txbf_info rtw_bf_update_attrib
#define HT_BF_CAP(adapter) ((adapter)->mlmepriv.htpriv.beamform_cap)
#define VHT_BF_CAP(adapter) ((adapter)->mlmepriv.vhtpriv.beamform_cap)
#define IS_HT_BEAMFORMEE(adapter) \
(HT_BF_CAP(adapter) & \
(BEAMFORMING_HT_BEAMFORMEE_ENABLE))
#define IS_VHT_BEAMFORMEE(adapter) \
(VHT_BF_CAP(adapter) & \
(BEAMFORMING_VHT_BEAMFORMEE_ENABLE | \
BEAMFORMING_VHT_MU_MIMO_STA_ENABLE))
#define IS_BEAMFORMEE(adapter) (IS_HT_BEAMFORMEE(adapter) | \
IS_VHT_BEAMFORMEE(adapter))
#else /* !RTW_BEAMFORMING_VERSION_2 */
/*PHYDM_BF - (BEAMFORMING_SUPPORT == 1)*/
enum BEAMFORMING_CTRL_TYPE {
BEAMFORMING_CTRL_ENTER = 0,
BEAMFORMING_CTRL_LEAVE = 1,
BEAMFORMING_CTRL_START_PERIOD = 2,
BEAMFORMING_CTRL_END_PERIOD = 3,
BEAMFORMING_CTRL_SOUNDING_FAIL = 4,
BEAMFORMING_CTRL_SOUNDING_CLK = 5,
};
u32 rtw_beamforming_get_report_frame(PADAPTER Adapter, union recv_frame *precv_frame);
void rtw_beamforming_get_ndpa_frame(PADAPTER Adapter, union recv_frame *precv_frame);
void beamforming_wk_hdl(_adapter *padapter, u8 type, u8 *pbuf);
u8 beamforming_wk_cmd(_adapter *padapter, s32 type, u8 *pbuf, s32 size, u8 enqueue);
void update_attrib_txbf_info(_adapter *padapter, struct pkt_attrib *pattrib, struct sta_info *psta);
#endif /* !RTW_BEAMFORMING_VERSION_2 */
#endif /*#ifdef CONFIG_BEAMFORMING */
#endif /*__RTW_BEAMFORMING_H_*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_BR_EXT_H_
#define _RTW_BR_EXT_H_
#if 1 /* rtw_wifi_driver */
#define CL_IPV6_PASS 1
#define MACADDRLEN 6
#define _DEBUG_ERR RTW_INFO
#define _DEBUG_INFO /* RTW_INFO */
#define DEBUG_WARN RTW_INFO
#define DEBUG_INFO /* RTW_INFO */
#define DEBUG_ERR RTW_INFO
/* #define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) */
#define GET_MY_HWADDR(padapter) (adapter_mac_addr(padapter))
#endif /* rtw_wifi_driver */
#define NAT25_HASH_BITS 4
#define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS)
#define NAT25_AGEING_TIME 300
#ifdef CL_IPV6_PASS
#define MAX_NETWORK_ADDR_LEN 17
#else
#define MAX_NETWORK_ADDR_LEN 11
#endif
struct nat25_network_db_entry {
struct nat25_network_db_entry *next_hash;
struct nat25_network_db_entry **pprev_hash;
atomic_t use_count;
unsigned char macAddr[6];
unsigned long ageing_timer;
unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
};
enum NAT25_METHOD {
NAT25_MIN,
NAT25_CHECK,
NAT25_INSERT,
NAT25_LOOKUP,
NAT25_PARSE,
NAT25_MAX
};
struct br_ext_info {
unsigned int nat25_disable;
unsigned int macclone_enable;
unsigned int dhcp_bcst_disable;
int addPPPoETag; /* 1: Add PPPoE relay-SID, 0: disable */
unsigned char nat25_dmzMac[MACADDRLEN];
unsigned int nat25sc_disable;
};
void nat25_db_cleanup(_adapter *priv);
#endif /* _RTW_BR_EXT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_BT_MP_H
#define __RTW_BT_MP_H
#if (MP_DRIVER == 1)
#pragma pack(1)
/* definition for BT_UP_OP_BT_READY */
#define MP_BT_NOT_READY 0
#define MP_BT_READY 1
/* definition for BT_UP_OP_BT_SET_MODE */
typedef enum _MP_BT_MODE {
MP_BT_MODE_RF_TXRX_TEST_MODE = 0,
MP_BT_MODE_BT20_DUT_TEST_MODE = 1,
MP_BT_MODE_BT40_DIRECT_TEST_MODE = 2,
MP_BT_MODE_CONNECT_TEST_MODE = 3,
MP_BT_MODE_MAX
} MP_BT_MODE, *PMP_BT_MODE;
/* definition for BT_UP_OP_BT_SET_TX_RX_PARAMETER */
typedef struct _BT_TXRX_PARAMETERS {
u8 txrxChannel;
u32 txrxTxPktCnt;
u8 txrxTxPktInterval;
u8 txrxPayloadType;
u8 txrxPktType;
u16 txrxPayloadLen;
u32 txrxPktHeader;
u8 txrxWhitenCoeff;
u8 txrxBdaddr[6];
u8 txrxTxGainIndex;
} BT_TXRX_PARAMETERS, *PBT_TXRX_PARAMETERS;
/* txrxPktType */
typedef enum _MP_BT_PKT_TYPE {
MP_BT_PKT_DH1 = 0,
MP_BT_PKT_DH3 = 1,
MP_BT_PKT_DH5 = 2,
MP_BT_PKT_2DH1 = 3,
MP_BT_PKT_2DH3 = 4,
MP_BT_PKT_2DH5 = 5,
MP_BT_PKT_3DH1 = 6,
MP_BT_PKT_3DH3 = 7,
MP_BT_PKT_3DH5 = 8,
MP_BT_PKT_LE = 9,
MP_BT_PKT_MAX
} MP_BT_PKT_TYPE, *PMP_BT_PKT_TYPE;
/* txrxPayloadType */
typedef enum _MP_BT_PAYLOAD_TYPE {
MP_BT_PAYLOAD_01010101 = 0,
MP_BT_PAYLOAD_ALL_1 = 1,
MP_BT_PAYLOAD_ALL_0 = 2,
MP_BT_PAYLOAD_11110000 = 3,
MP_BT_PAYLOAD_PRBS9 = 4,
MP_BT_PAYLOAD_MAX = 8,
} MP_BT_PAYLOAD_TYPE, *PMP_BT_PAYLOAD_TYPE;
/* definition for BT_UP_OP_BT_TEST_CTRL */
typedef enum _MP_BT_TEST_CTRL {
MP_BT_TEST_STOP_ALL_TESTS = 0,
MP_BT_TEST_START_RX_TEST = 1,
MP_BT_TEST_START_PACKET_TX_TEST = 2,
MP_BT_TEST_START_CONTINUOUS_TX_TEST = 3,
MP_BT_TEST_START_INQUIRY_SCAN_TEST = 4,
MP_BT_TEST_START_PAGE_SCAN_TEST = 5,
MP_BT_TEST_START_INQUIRY_PAGE_SCAN_TEST = 6,
MP_BT_TEST_START_LEGACY_CONNECT_TEST = 7,
MP_BT_TEST_START_LE_CONNECT_TEST_INITIATOR = 8,
MP_BT_TEST_START_LE_CONNECT_TEST_ADVERTISER = 9,
MP_BT_TEST_MAX
} MP_BT_TEST_CTRL, *PMP_BT_TEST_CTRL;
typedef enum _RTL_EXT_C2H_EVT {
EXT_C2H_WIFI_FW_ACTIVE_RSP = 0,
EXT_C2H_TRIG_BY_BT_FW = 1,
MAX_EXT_C2HEVENT
} RTL_EXT_C2H_EVT;
/* OP codes definition between the user layer and driver */
typedef enum _BT_CTRL_OPCODE_UPPER {
BT_UP_OP_BT_READY = 0x00,
BT_UP_OP_BT_SET_MODE = 0x01,
BT_UP_OP_BT_SET_TX_RX_PARAMETER = 0x02,
BT_UP_OP_BT_SET_GENERAL = 0x03,
BT_UP_OP_BT_GET_GENERAL = 0x04,
BT_UP_OP_BT_TEST_CTRL = 0x05,
BT_UP_OP_TEST_BT = 0x06,
BT_UP_OP_MAX
} BT_CTRL_OPCODE_UPPER, *PBT_CTRL_OPCODE_UPPER;
typedef enum _BT_SET_GENERAL {
BT_GSET_REG = 0x00,
BT_GSET_RESET = 0x01,
BT_GSET_TARGET_BD_ADDR = 0x02,
BT_GSET_TX_PWR_FINETUNE = 0x03,
BT_SET_TRACKING_INTERVAL = 0x04,
BT_SET_THERMAL_METER = 0x05,
BT_ENABLE_CFO_TRACKING = 0x06,
BT_GSET_UPDATE_BT_PATCH = 0x07,
BT_GSET_MAX
} BT_SET_GENERAL, *PBT_SET_GENERAL;
typedef enum _BT_GET_GENERAL {
BT_GGET_REG = 0x00,
BT_GGET_STATUS = 0x01,
BT_GGET_REPORT = 0x02,
BT_GGET_AFH_MAP = 0x03,
BT_GGET_AFH_STATUS = 0x04,
BT_GGET_MAX
} BT_GET_GENERAL, *PBT_GET_GENERAL;
/* definition for BT_UP_OP_BT_SET_GENERAL */
typedef enum _BT_REG_TYPE {
BT_REG_RF = 0,
BT_REG_MODEM = 1,
BT_REG_BLUEWIZE = 2,
BT_REG_VENDOR = 3,
BT_REG_LE = 4,
BT_REG_MAX
} BT_REG_TYPE, *PBT_REG_TYPE;
/* definition for BT_LO_OP_GET_AFH_MAP */
typedef enum _BT_AFH_MAP_TYPE {
BT_AFH_MAP_RESULT = 0,
BT_AFH_MAP_WIFI_PSD_ONLY = 1,
BT_AFH_MAP_WIFI_CH_BW_ONLY = 2,
BT_AFH_MAP_BT_PSD_ONLY = 3,
BT_AFH_MAP_HOST_CLASSIFICATION_ONLY = 4,
BT_AFH_MAP_MAX
} BT_AFH_MAP_TYPE, *PBT_AFH_MAP_TYPE;
/* definition for BT_UP_OP_BT_GET_GENERAL */
typedef enum _BT_REPORT_TYPE {
BT_REPORT_RX_PACKET_CNT = 0,
BT_REPORT_RX_ERROR_BITS = 1,
BT_REPORT_RSSI = 2,
BT_REPORT_CFO_HDR_QUALITY = 3,
BT_REPORT_CONNECT_TARGET_BD_ADDR = 4,
BT_REPORT_MAX
} BT_REPORT_TYPE, *PBT_REPORT_TYPE;
void
MPTBT_Test(
PADAPTER Adapter,
u8 opCode,
u8 byte1,
u8 byte2,
u8 byte3
);
uint
MPTBT_SendOidBT(
PADAPTER pAdapter,
void *InformationBuffer,
u32 InformationBufferLength,
u32 *BytesRead,
u32 *BytesNeeded
);
void
MPTBT_FwC2hBtMpCtrl(
PADAPTER Adapter,
u8 *tmpBuf,
u8 length
);
void MPh2c_timeout_handle(void *FunctionContext);
void mptbt_BtControlProcess(
PADAPTER Adapter,
void *pInBuf
);
#define BT_H2C_MAX_RETRY 1
#define BT_MAX_C2H_LEN 20
typedef struct _BT_REQ_CMD {
u8 opCodeVer;
u8 OpCode;
u16 paraLength;
u8 pParamStart[100];
} BT_REQ_CMD, *PBT_REQ_CMD;
typedef struct _BT_RSP_CMD {
u16 status;
u16 paraLength;
u8 pParamStart[100];
} BT_RSP_CMD, *PBT_RSP_CMD;
typedef struct _BT_H2C {
u8 opCodeVer:4;
u8 reqNum:4;
u8 opCode;
u8 buf[100];
} BT_H2C, *PBT_H2C;
typedef struct _BT_EXT_C2H {
u8 extendId;
u8 statusCode:4;
u8 retLen:4;
u8 opCodeVer:4;
u8 reqNum:4;
u8 buf[100];
} BT_EXT_C2H, *PBT_EXT_C2H;
typedef enum _BT_OPCODE_STATUS {
BT_OP_STATUS_SUCCESS = 0x00, /* Success */
BT_OP_STATUS_VERSION_MISMATCH = 0x01,
BT_OP_STATUS_UNKNOWN_OPCODE = 0x02,
BT_OP_STATUS_ERROR_PARAMETER = 0x03,
BT_OP_STATUS_MAX
} BT_OPCODE_STATUS, *PBT_OPCODE_STATUS;
/* OP codes definition between driver and bt fw */
typedef enum _BT_CTRL_OPCODE_LOWER {
BT_LO_OP_GET_BT_VERSION = 0x00,
BT_LO_OP_RESET = 0x01,
BT_LO_OP_TEST_CTRL = 0x02,
BT_LO_OP_SET_BT_MODE = 0x03,
BT_LO_OP_SET_CHNL_TX_GAIN = 0x04,
BT_LO_OP_SET_PKT_TYPE_LEN = 0x05,
BT_LO_OP_SET_PKT_CNT_L_PL_TYPE = 0x06,
BT_LO_OP_SET_PKT_CNT_H_PKT_INTV = 0x07,
BT_LO_OP_SET_PKT_HEADER = 0x08,
BT_LO_OP_SET_WHITENCOEFF = 0x09,
BT_LO_OP_SET_BD_ADDR_L = 0x0a,
BT_LO_OP_SET_BD_ADDR_H = 0x0b,
BT_LO_OP_WRITE_REG_ADDR = 0x0c,
BT_LO_OP_WRITE_REG_VALUE = 0x0d,
BT_LO_OP_GET_BT_STATUS = 0x0e,
BT_LO_OP_GET_BD_ADDR_L = 0x0f,
BT_LO_OP_GET_BD_ADDR_H = 0x10,
BT_LO_OP_READ_REG = 0x11,
BT_LO_OP_SET_TARGET_BD_ADDR_L = 0x12,
BT_LO_OP_SET_TARGET_BD_ADDR_H = 0x13,
BT_LO_OP_SET_TX_POWER_CALIBRATION = 0x14,
BT_LO_OP_GET_RX_PKT_CNT_L = 0x15,
BT_LO_OP_GET_RX_PKT_CNT_H = 0x16,
BT_LO_OP_GET_RX_ERROR_BITS_L = 0x17,
BT_LO_OP_GET_RX_ERROR_BITS_H = 0x18,
BT_LO_OP_GET_RSSI = 0x19,
BT_LO_OP_GET_CFO_HDR_QUALITY_L = 0x1a,
BT_LO_OP_GET_CFO_HDR_QUALITY_H = 0x1b,
BT_LO_OP_GET_TARGET_BD_ADDR_L = 0x1c,
BT_LO_OP_GET_TARGET_BD_ADDR_H = 0x1d,
BT_LO_OP_GET_AFH_MAP_L = 0x1e,
BT_LO_OP_GET_AFH_MAP_M = 0x1f,
BT_LO_OP_GET_AFH_MAP_H = 0x20,
BT_LO_OP_GET_AFH_STATUS = 0x21,
BT_LO_OP_SET_TRACKING_INTERVAL = 0x22,
BT_LO_OP_SET_THERMAL_METER = 0x23,
BT_LO_OP_ENABLE_CFO_TRACKING = 0x24,
BT_LO_OP_MAX
} BT_CTRL_OPCODE_LOWER, *PBT_CTRL_OPCODE_LOWER;
#endif /* #if(MP_DRIVER == 1) */
#endif /* #ifndef __INC_MPT_BT_H */

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifdef CONFIG_BT_COEXIST
#ifndef __RTW_BTCOEX_H__
#define __RTW_BTCOEX_H__
#include <drv_types.h>
/* For H2C: H2C_BT_MP_OPER. Return status definition to the user layer */
typedef enum _BT_CTRL_STATUS {
BT_STATUS_SUCCESS = 0x00, /* Success */
BT_STATUS_BT_OP_SUCCESS = 0x01, /* bt fw op execution success */
BT_STATUS_H2C_SUCCESS = 0x02, /* H2c success */
BT_STATUS_H2C_FAIL = 0x03, /* H2c fail */
BT_STATUS_H2C_LENGTH_EXCEEDED = 0x04, /* H2c command length exceeded */
BT_STATUS_H2C_TIMTOUT = 0x05, /* H2c timeout */
BT_STATUS_H2C_BT_NO_RSP = 0x06, /* H2c sent, bt no rsp */
BT_STATUS_C2H_SUCCESS = 0x07, /* C2h success */
BT_STATUS_C2H_REQNUM_MISMATCH = 0x08, /* bt fw wrong rsp */
BT_STATUS_OPCODE_U_VERSION_MISMATCH = 0x08, /* Upper layer OP code version mismatch. */
BT_STATUS_OPCODE_L_VERSION_MISMATCH = 0x0a, /* Lower layer OP code version mismatch. */
BT_STATUS_UNKNOWN_OPCODE_U = 0x0b, /* Unknown Upper layer OP code */
BT_STATUS_UNKNOWN_OPCODE_L = 0x0c, /* Unknown Lower layer OP code */
BT_STATUS_PARAMETER_FORMAT_ERROR_U = 0x0d, /* Wrong parameters sent by upper layer. */
BT_STATUS_PARAMETER_FORMAT_ERROR_L = 0x0e, /* bt fw parameter format is not consistency */
BT_STATUS_PARAMETER_OUT_OF_RANGE_U = 0x0f, /* uppery layer parameter value is out of range */
BT_STATUS_PARAMETER_OUT_OF_RANGE_L = 0x10, /* bt fw parameter value is out of range */
BT_STATUS_UNKNOWN_STATUS_L = 0x11, /* bt returned an defined status code */
BT_STATUS_UNKNOWN_STATUS_H = 0x12, /* driver need to do error handle or not handle-well. */
BT_STATUS_WRONG_LEVEL = 0x13, /* should be under passive level */
BT_STATUS_NOT_IMPLEMENT = 0x14, /* op code not implemented yet */
BT_STATUS_BT_STACK_OP_SUCCESS = 0x15, /* bt stack op execution success */
BT_STATUS_BT_STACK_NOT_SUPPORT = 0x16, /* stack version not support this. */
BT_STATUS_BT_STACK_SEND_HCI_EVENT_FAIL = 0x17, /* send hci event fail */
BT_STATUS_BT_STACK_NOT_BIND = 0x18, /* stack not bind wifi driver */
BT_STATUS_BT_STACK_NO_RSP = 0x19, /* stack doesn't have any rsp. */
BT_STATUS_MAX
} BT_CTRL_STATUS, *PBT_CTRL_STATUS;
typedef enum _BTCOEX_SUSPEND_STATE {
BTCOEX_SUSPEND_STATE_RESUME = 0x0,
BTCOEX_SUSPEND_STATE_SUSPEND = 0x1,
BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT = 0x2,
BTCOEX_SUSPEND_STATE_MAX
} BTCOEX_SUSPEND_STATE, *PBTCOEX_SUSPEND_STATE;
typedef enum _BTCOEX_POLICY_CONTROL {
BTCOEX_POLICY_CONTROL_AUTO,
BTCOEX_POLICY_CONTROL_FORCE_FREERUN,
BTCOEX_POLICY_CONTROL_FORCE_TDMA
} BTCOEX_POLICY_CONTROL, *PBTCOEX_POLICY_CONTROL;
#define SET_BT_MP_OPER_RET(OpCode, StatusCode) ((OpCode << 8) | StatusCode)
#define GET_OP_CODE_FROM_BT_MP_OPER_RET(RetCode) ((RetCode & 0xF0) >> 8)
#define GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) (RetCode & 0x0F)
#define CHECK_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode, StatusCode) (GET_STATUS_CODE_FROM_BT_MP_OPER_RET(RetCode) == StatusCode)
#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
#define NETLINK_USER 31
#define CONNECT_PORT 30000
#define CONNECT_PORT_BT 30001
#define KERNEL_SOCKET_OK 0x01
#define NETLINK_SOCKET_OK 0x02
#define OTHER 0
#define RX_ATTEND_ACK 1
#define RX_LEAVE_ACK 2
#define RX_BT_LEAVE 3
#define RX_INVITE_REQ 4
#define RX_ATTEND_REQ 5
#define RX_INVITE_RSP 6
#define invite_req "INVITE_REQ"
#define invite_rsp "INVITE_RSP"
#define attend_req "ATTEND_REQ"
#define attend_ack "ATTEND_ACK"
#define wifi_leave "WIFI_LEAVE"
#define leave_ack "LEAVE_ACK"
#define bt_leave "BT_LEAVE"
#define BT_INFO_NOTIFY_CMD 0x0106
#define BT_INFO_LEN 8
typedef struct _HCI_LINK_INFO {
u16 ConnectHandle;
u8 IncomingTrafficMode;
u8 OutgoingTrafficMode;
u8 BTProfile;
u8 BTCoreSpec;
s8 BT_RSSI;
u8 TrafficProfile;
u8 linkRole;
} HCI_LINK_INFO, *PHCI_LINK_INFO;
#define MAX_BT_ACL_LINK_NUM 8
typedef struct _HCI_EXT_CONFIG {
HCI_LINK_INFO aclLink[MAX_BT_ACL_LINK_NUM];
u8 btOperationCode;
u16 CurrentConnectHandle;
u8 CurrentIncomingTrafficMode;
u8 CurrentOutgoingTrafficMode;
u8 NumberOfACL;
u8 NumberOfSCO;
u8 CurrentBTStatus;
u16 HCIExtensionVer;
BOOLEAN bEnableWifiScanNotify;
} HCI_EXT_CONFIG, *PHCI_EXT_CONFIG;
typedef struct _HCI_PHY_LINK_BSS_INFO {
u16 bdCap; /* capability information */
/* Qos related. Added by Annie, 2005-11-01. */
/* BSS_QOS BssQos; */
} HCI_PHY_LINK_BSS_INFO, *PHCI_PHY_LINK_BSS_INFO;
typedef enum _BT_CONNECT_TYPE {
BT_CONNECT_AUTH_REQ = 0x00,
BT_CONNECT_AUTH_RSP = 0x01,
BT_CONNECT_ASOC_REQ = 0x02,
BT_CONNECT_ASOC_RSP = 0x03,
BT_DISCONNECT = 0x04
} BT_CONNECT_TYPE, *PBT_CONNECT_TYPE;
typedef struct _PACKET_IRP_HCIEVENT_DATA {
u8 EventCode;
u8 Length; /* total cmd length = extension event length+1(extension event code length) */
u8 Data[1]; /* byte1 is extension event code */
} rtw_HCI_event;
struct btinfo_8761ATV {
u8 cid;
u8 len;
u8 bConnection:1;
u8 bSCOeSCO:1;
u8 bInQPage:1;
u8 bACLBusy:1;
u8 bSCOBusy:1;
u8 bHID:1;
u8 bA2DP:1;
u8 bFTP:1;
u8 retry_cnt:4;
u8 rsvd_34:1;
u8 bPage:1;
u8 TRxMask:1;
u8 Sniff_attempt:1;
u8 rssi;
u8 A2dp_rate:1;
u8 ReInit:1;
u8 MaxPower:1;
u8 bEnIgnoreWlanAct:1;
u8 TxPowerLow:1;
u8 TxPowerHigh:1;
u8 eSCO_SCO:1;
u8 Master_Slave:1;
u8 ACL_TRx_TP_low;
u8 ACL_TRx_TP_high;
};
#define HCIOPCODE(_OCF, _OGF) ((_OGF)<<10|(_OCF))
#define HCIOPCODELOW(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF) & 0x00ff)
#define HCIOPCODEHIGHT(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)>>8)
#define HCI_OGF(opCode) (unsigned char)((0xFC00 & (opCode)) >> 10)
#define HCI_OCF(opCode) (0x3FF & (opCode))
typedef enum _HCI_STATUS {
HCI_STATUS_SUCCESS = 0x00, /* Success */
HCI_STATUS_UNKNOW_HCI_CMD = 0x01, /* Unknown HCI Command */
HCI_STATUS_UNKNOW_CONNECT_ID = 0X02, /* Unknown Connection Identifier */
HCI_STATUS_HW_FAIL = 0X03, /* Hardware Failure */
HCI_STATUS_PAGE_TIMEOUT = 0X04, /* Page Timeout */
HCI_STATUS_AUTH_FAIL = 0X05, /* Authentication Failure */
HCI_STATUS_PIN_OR_KEY_MISSING = 0X06, /* PIN or Key Missing */
HCI_STATUS_MEM_CAP_EXCEED = 0X07, /* Memory Capacity Exceeded */
HCI_STATUS_CONNECT_TIMEOUT = 0X08, /* Connection Timeout */
HCI_STATUS_CONNECT_LIMIT = 0X09, /* Connection Limit Exceeded */
HCI_STATUS_SYN_CONNECT_LIMIT = 0X0a, /* Synchronous Connection Limit To A Device Exceeded */
HCI_STATUS_ACL_CONNECT_EXISTS = 0X0b, /* ACL Connection Already Exists */
HCI_STATUS_CMD_DISALLOW = 0X0c, /* Command Disallowed */
HCI_STATUS_CONNECT_RJT_LIMIT_RESOURCE = 0X0d, /* Connection Rejected due to Limited Resources */
HCI_STATUS_CONNECT_RJT_SEC_REASON = 0X0e, /* Connection Rejected Due To Security Reasons */
HCI_STATUS_CONNECT_RJT_UNACCEPT_BD_ADDR = 0X0f, /* Connection Rejected due to Unacceptable BD_ADDR */
HCI_STATUS_CONNECT_ACCEPT_TIMEOUT = 0X10, /* Connection Accept Timeout Exceeded */
HCI_STATUS_UNSUPPORT_FEATURE_PARA_VALUE = 0X11, /* Unsupported Feature or Parameter Value */
HCI_STATUS_INVALID_HCI_CMD_PARA_VALUE = 0X12, /* Invalid HCI Command Parameters */
HCI_STATUS_REMOTE_USER_TERMINATE_CONNECT = 0X13, /* Remote User Terminated Connection */
HCI_STATUS_REMOTE_DEV_TERMINATE_LOW_RESOURCE = 0X14, /* Remote Device Terminated Connection due to Low Resources */
HCI_STATUS_REMOTE_DEV_TERMINATE_CONNECT_POWER_OFF = 0X15, /* Remote Device Terminated Connection due to Power Off */
HCI_STATUS_CONNECT_TERMINATE_LOCAL_HOST = 0X16, /* Connection Terminated By Local Host */
HCI_STATUS_REPEATE_ATTEMPT = 0X17, /* Repeated Attempts */
HCI_STATUS_PAIR_NOT_ALLOW = 0X18, /* Pairing Not Allowed */
HCI_STATUS_UNKNOW_LMP_PDU = 0X19, /* Unknown LMP PDU */
HCI_STATUS_UNSUPPORT_REMOTE_LMP_FEATURE = 0X1a, /* Unsupported Remote Feature / Unsupported LMP Feature */
HCI_STATUS_SOC_OFFSET_REJECT = 0X1b, /* SCO Offset Rejected */
HCI_STATUS_SOC_INTERVAL_REJECT = 0X1c, /* SCO Interval Rejected */
HCI_STATUS_SOC_AIR_MODE_REJECT = 0X1d, /* SCO Air Mode Rejected */
HCI_STATUS_INVALID_LMP_PARA = 0X1e, /* Invalid LMP Parameters */
HCI_STATUS_UNSPECIFIC_ERROR = 0X1f, /* Unspecified Error */
HCI_STATUS_UNSUPPORT_LMP_PARA_VALUE = 0X20, /* Unsupported LMP Parameter Value */
HCI_STATUS_ROLE_CHANGE_NOT_ALLOW = 0X21, /* Role Change Not Allowed */
HCI_STATUS_LMP_RESPONSE_TIMEOUT = 0X22, /* LMP Response Timeout */
HCI_STATUS_LMP_ERROR_TRANSACTION_COLLISION = 0X23, /* LMP Error Transaction Collision */
HCI_STATUS_LMP_PDU_NOT_ALLOW = 0X24, /* LMP PDU Not Allowed */
HCI_STATUS_ENCRYPTION_MODE_NOT_ALLOW = 0X25, /* Encryption Mode Not Acceptable */
HCI_STATUS_LINK_KEY_CAN_NOT_CHANGE = 0X26, /* Link Key Can Not be Changed */
HCI_STATUS_REQUEST_QOS_NOT_SUPPORT = 0X27, /* Requested QoS Not Supported */
HCI_STATUS_INSTANT_PASSED = 0X28, /* Instant Passed */
HCI_STATUS_PAIRING_UNIT_KEY_NOT_SUPPORT = 0X29, /* Pairing With Unit Key Not Supported */
HCI_STATUS_DIFFERENT_TRANSACTION_COLLISION = 0X2a, /* Different Transaction Collision */
HCI_STATUS_RESERVE_1 = 0X2b, /* Reserved */
HCI_STATUS_QOS_UNACCEPT_PARA = 0X2c, /* QoS Unacceptable Parameter */
HCI_STATUS_QOS_REJECT = 0X2d, /* QoS Rejected */
HCI_STATUS_CHNL_CLASSIFICATION_NOT_SUPPORT = 0X2e, /* Channel Classification Not Supported */
HCI_STATUS_INSUFFICIENT_SECURITY = 0X2f, /* Insufficient Security */
HCI_STATUS_PARA_OUT_OF_RANGE = 0x30, /* Parameter Out Of Mandatory Range */
HCI_STATUS_RESERVE_2 = 0X31, /* Reserved */
HCI_STATUS_ROLE_SWITCH_PENDING = 0X32, /* Role Switch Pending */
HCI_STATUS_RESERVE_3 = 0X33, /* Reserved */
HCI_STATUS_RESERVE_SOLT_VIOLATION = 0X34, /* Reserved Slot Violation */
HCI_STATUS_ROLE_SWITCH_FAIL = 0X35, /* Role Switch Failed */
HCI_STATUS_EXTEND_INQUIRY_RSP_TOO_LARGE = 0X36, /* Extended Inquiry Response Too Large */
HCI_STATUS_SEC_SIMPLE_PAIRING_NOT_SUPPORT = 0X37, /* Secure Simple Pairing Not Supported By Host. */
HCI_STATUS_HOST_BUSY_PAIRING = 0X38, /* Host Busy - Pairing */
HCI_STATUS_CONNECT_REJ_NOT_SUIT_CHNL_FOUND = 0X39, /* Connection Rejected due to No Suitable Channel Found */
HCI_STATUS_CONTROLLER_BUSY = 0X3a /* CONTROLLER BUSY */
} RTW_HCI_STATUS;
#define HCI_EVENT_COMMAND_COMPLETE 0x0e
#define OGF_EXTENSION 0X3f
typedef enum HCI_EXTENSION_COMMANDS {
HCI_SET_ACL_LINK_DATA_FLOW_MODE = 0x0010,
HCI_SET_ACL_LINK_STATUS = 0x0020,
HCI_SET_SCO_LINK_STATUS = 0x0030,
HCI_SET_RSSI_VALUE = 0x0040,
HCI_SET_CURRENT_BLUETOOTH_STATUS = 0x0041,
/* The following is for RTK8723 */
HCI_EXTENSION_VERSION_NOTIFY = 0x0100,
HCI_LINK_STATUS_NOTIFY = 0x0101,
HCI_BT_OPERATION_NOTIFY = 0x0102,
HCI_ENABLE_WIFI_SCAN_NOTIFY = 0x0103,
HCI_QUERY_RF_STATUS = 0x0104,
HCI_BT_ABNORMAL_NOTIFY = 0x0105,
HCI_BT_INFO_NOTIFY = 0x0106,
HCI_BT_COEX_NOTIFY = 0x0107,
HCI_BT_PATCH_VERSION_NOTIFY = 0x0108,
HCI_BT_AFH_MAP_NOTIFY = 0x0109,
HCI_BT_REGISTER_VALUE_NOTIFY = 0x010a,
/* The following is for IVT */
HCI_WIFI_CURRENT_CHANNEL = 0x0300,
HCI_WIFI_CURRENT_BANDWIDTH = 0x0301,
HCI_WIFI_CONNECTION_STATUS = 0x0302
} RTW_HCI_EXT_CMD;
#define HCI_EVENT_EXTENSION_RTK 0xfe
typedef enum HCI_EXTENSION_EVENT_RTK {
HCI_EVENT_EXT_WIFI_SCAN_NOTIFY = 0x01,
HCI_EVENT_EXT_WIFI_RF_STATUS_NOTIFY = 0x02,
HCI_EVENT_EXT_BT_INFO_CONTROL = 0x03,
HCI_EVENT_EXT_BT_COEX_CONTROL = 0x04
} RTW_HCI_EXT_EVENT;
typedef enum _BT_TRAFFIC_MODE {
BT_MOTOR_EXT_BE = 0x00, /* Best Effort. Default. for HCRP, PAN, SDP, RFCOMM-based profiles like FTP,OPP, SPP, DUN, etc. */
BT_MOTOR_EXT_GUL = 0x01, /* Guaranteed Latency. This type of traffic is used e.g. for HID and AVRCP. */
BT_MOTOR_EXT_GUB = 0X02, /* Guaranteed Bandwidth. */
BT_MOTOR_EXT_GULB = 0X03 /* Guaranteed Latency and Bandwidth. for A2DP and VDP. */
} BT_TRAFFIC_MODE;
typedef enum _BT_TRAFFIC_MODE_PROFILE {
BT_PROFILE_NONE,
BT_PROFILE_A2DP,
BT_PROFILE_PAN ,
BT_PROFILE_HID,
BT_PROFILE_SCO
} BT_TRAFFIC_MODE_PROFILE;
typedef enum _HCI_EXT_BT_OPERATION {
HCI_BT_OP_NONE = 0x0,
HCI_BT_OP_INQUIRY_START = 0x1,
HCI_BT_OP_INQUIRY_FINISH = 0x2,
HCI_BT_OP_PAGING_START = 0x3,
HCI_BT_OP_PAGING_SUCCESS = 0x4,
HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
HCI_BT_OP_PAIRING_START = 0x6,
HCI_BT_OP_PAIRING_FINISH = 0x7,
HCI_BT_OP_BT_DEV_ENABLE = 0x8,
HCI_BT_OP_BT_DEV_DISABLE = 0x9,
HCI_BT_OP_MAX
} HCI_EXT_BT_OPERATION, *PHCI_EXT_BT_OPERATION;
typedef struct _BT_MGNT {
BOOLEAN bBTConnectInProgress;
BOOLEAN bLogLinkInProgress;
BOOLEAN bPhyLinkInProgress;
BOOLEAN bPhyLinkInProgressStartLL;
u8 BtCurrentPhyLinkhandle;
u16 BtCurrentLogLinkhandle;
u8 CurrentConnectEntryNum;
u8 DisconnectEntryNum;
u8 CurrentBTConnectionCnt;
BT_CONNECT_TYPE BTCurrentConnectType;
BT_CONNECT_TYPE BTReceiveConnectPkt;
u8 BTAuthCount;
u8 BTAsocCount;
BOOLEAN bStartSendSupervisionPkt;
BOOLEAN BtOperationOn;
BOOLEAN BTNeedAMPStatusChg;
BOOLEAN JoinerNeedSendAuth;
HCI_PHY_LINK_BSS_INFO bssDesc;
HCI_EXT_CONFIG ExtConfig;
BOOLEAN bNeedNotifyAMPNoCap;
BOOLEAN bCreateSpportQos;
BOOLEAN bSupportProfile;
u8 BTChannel;
BOOLEAN CheckChnlIsSuit;
BOOLEAN bBtScan;
BOOLEAN btLogoTest;
BOOLEAN bRfStatusNotified;
BOOLEAN bBtRsvedPageDownload;
} BT_MGNT, *PBT_MGNT;
struct bt_coex_info {
/* For Kernel Socket */
struct socket *udpsock;
struct sockaddr_in wifi_sockaddr; /*wifi socket*/
struct sockaddr_in bt_sockaddr;/* BT socket */
struct sock *sk_store;/*back up socket for UDP RX int*/
/* store which socket is OK */
u8 sock_open;
u8 BT_attend;
u8 is_exist; /* socket exist */
BT_MGNT BtMgnt;
struct workqueue_struct *btcoex_wq;
struct delayed_work recvmsg_work;
};
#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
#define PACKET_NORMAL 0
#define PACKET_DHCP 1
#define PACKET_ARP 2
#define PACKET_EAPOL 3
void rtw_btcoex_Initialize(PADAPTER);
void rtw_btcoex_PowerOnSetting(PADAPTER padapter);
void rtw_btcoex_AntInfoSetting(PADAPTER padapter);
void rtw_btcoex_PowerOffSetting(PADAPTER padapter);
void rtw_btcoex_PreLoadFirmware(PADAPTER padapter);
void rtw_btcoex_HAL_Initialize(PADAPTER padapter, u8 bWifiOnly);
void rtw_btcoex_IpsNotify(PADAPTER, u8 type);
void rtw_btcoex_LpsNotify(PADAPTER, u8 type);
void rtw_btcoex_ScanNotify(PADAPTER, u8 type);
void rtw_btcoex_MediaStatusNotify(PADAPTER, u8 mediaStatus);
void rtw_btcoex_SpecialPacketNotify(PADAPTER, u8 pktType);
void rtw_btcoex_IQKNotify(PADAPTER padapter, u8 state);
void rtw_btcoex_WLRFKNotify(PADAPTER padapter, u8 path, u8 type, u8 state);
void rtw_btcoex_BtInfoNotify(PADAPTER, u8 length, u8 *tmpBuf);
void rtw_btcoex_BtMpRptNotify(PADAPTER, u8 length, u8 *tmpBuf);
void rtw_btcoex_SuspendNotify(PADAPTER, u8 state);
void rtw_btcoex_HaltNotify(PADAPTER);
void rtw_btcoex_switchband_notify(u8 under_scan, u8 band_type);
void rtw_btcoex_WlFwDbgInfoNotify(PADAPTER padapter, u8* tmpBuf, u8 length);
void rtw_btcoex_rx_rate_change_notify(PADAPTER padapter, u8 is_data_frame, u8 rate_id);
void rtw_btcoex_SwitchBtTRxMask(PADAPTER);
void rtw_btcoex_Switch(PADAPTER, u8 enable);
u8 rtw_btcoex_IsBtDisabled(PADAPTER);
void rtw_btcoex_Handler(PADAPTER);
s32 rtw_btcoex_IsBTCoexRejectAMPDU(PADAPTER padapter);
s32 rtw_btcoex_IsBTCoexCtrlAMPDUSize(PADAPTER);
u32 rtw_btcoex_GetAMPDUSize(PADAPTER);
void rtw_btcoex_SetManualControl(PADAPTER, u8 bmanual);
void rtw_btcoex_set_policy_control(PADAPTER, u8 btc_policy);
u8 rtw_btcoex_1Ant(PADAPTER);
u8 rtw_btcoex_IsBtControlLps(PADAPTER);
u8 rtw_btcoex_IsLpsOn(PADAPTER);
u8 rtw_btcoex_RpwmVal(PADAPTER);
u8 rtw_btcoex_LpsVal(PADAPTER);
u32 rtw_btcoex_GetRaMask(PADAPTER);
u8 rtw_btcoex_query_reduced_wl_pwr_lvl(PADAPTER padapter);
void rtw_btcoex_set_reduced_wl_pwr_lvl(PADAPTER padapter, u8 val);
void rtw_btcoex_do_reduce_wl_pwr_lvl(PADAPTER padapter);
void rtw_btcoex_RecordPwrMode(PADAPTER, u8 *pCmdBuf, u8 cmdLen);
void rtw_btcoex_DisplayBtCoexInfo(PADAPTER, u8 *pbuf, u32 bufsize);
void rtw_btcoex_SetDBG(PADAPTER, u32 *pDbgModule);
u32 rtw_btcoex_GetDBG(PADAPTER, u8 *pStrBuf, u32 bufSize);
u8 rtw_btcoex_IncreaseScanDeviceNum(PADAPTER);
u8 rtw_btcoex_IsBtLinkExist(PADAPTER);
void rtw_btcoex_pta_off_on_notify(PADAPTER padapter, u8 bBTON);
#ifdef CONFIG_RF4CE_COEXIST
void rtw_btcoex_SetRf4ceLinkState(PADAPTER padapter, u8 state);
u8 rtw_btcoex_GetRf4ceLinkState(PADAPTER padapter);
#endif
#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
void rtw_btcoex_SetBtPatchVersion(PADAPTER padapter, u16 btHciVer, u16 btPatchVer);
void rtw_btcoex_SetHciVersion(PADAPTER padapter, u16 hciVersion);
void rtw_btcoex_StackUpdateProfileInfo(void);
void rtw_btcoex_init_socket(_adapter *padapter);
void rtw_btcoex_close_socket(_adapter *padapter);
void rtw_btcoex_dump_tx_msg(u8 *tx_msg, u8 len, u8 *msg_name);
u8 rtw_btcoex_sendmsgbysocket(_adapter *padapter, u8 *msg, u8 msg_size, bool force);
u8 rtw_btcoex_create_kernel_socket(_adapter *padapter);
void rtw_btcoex_close_kernel_socket(_adapter *padapter);
void rtw_btcoex_recvmsgbysocket(void *data);
u16 rtw_btcoex_parse_recv_data(u8 *msg, u8 msg_size);
u8 rtw_btcoex_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length);
void rtw_btcoex_parse_hci_cmd(_adapter *padapter, u8 *cmd, u16 len);
void rtw_btcoex_SendEventExtBtCoexControl(PADAPTER Adapter, u8 bNeedDbgRsp, u8 dataLen, void *pData);
void rtw_btcoex_SendEventExtBtInfoControl(PADAPTER Adapter, u8 dataLen, void *pData);
void rtw_btcoex_SendScanNotify(PADAPTER padapter, u8 scanType);
#define BT_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData) rtw_btcoex_SendEventExtBtCoexControl(Adapter, bNeedDbgRsp, dataLen, pData)
#define BT_SendEventExtBtInfoControl(Adapter, dataLen, pData) rtw_btcoex_SendEventExtBtInfoControl(Adapter, dataLen, pData)
#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
u16 rtw_btcoex_btreg_read(PADAPTER padapter, u8 type, u16 addr, u32 *data);
u16 rtw_btcoex_btreg_write(PADAPTER padapter, u8 type, u16 addr, u16 val);
u8 rtw_btcoex_get_reduce_wl_txpwr(PADAPTER padapter);
u8 rtw_btcoex_get_bt_coexist(PADAPTER padapter);
u8 rtw_btcoex_get_chip_type(PADAPTER padapter);
u8 rtw_btcoex_get_pg_ant_num(PADAPTER padapter);
u8 rtw_btcoex_get_pg_single_ant_path(PADAPTER padapter);
u8 rtw_btcoex_get_pg_rfe_type(PADAPTER padapter);
u8 rtw_btcoex_is_tfbga_package_type(PADAPTER padapter);
u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter);
u16 rtw_btcoex_btset_testmode(PADAPTER padapter, u8 type);
/* ==================================================
* Below Functions are called by BT-Coex
* ================================================== */
void rtw_btcoex_rx_ampdu_apply(PADAPTER padapter);
void rtw_btcoex_LPS_Enter(PADAPTER padapter);
u8 rtw_btcoex_LPS_Leave(PADAPTER padapter);
#endif /* __RTW_BTCOEX_H__ */
#endif /* CONFIG_BT_COEXIST */
void rtw_btcoex_set_ant_info(PADAPTER padapter);
void rtw_btcoex_connect_notify(PADAPTER, u8 join_type);

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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_BTCOEX_WIFIONLY_H__
#define __RTW_BTCOEX_WIFIONLY_H__
void rtw_btcoex_wifionly_switchband_notify(PADAPTER padapter);
void rtw_btcoex_wifionly_scan_notify(PADAPTER padapter);
void rtw_btcoex_wifionly_connect_notify(PADAPTER padapter);
void rtw_btcoex_wifionly_hw_config(PADAPTER padapter);
void rtw_btcoex_wifionly_initialize(PADAPTER padapter);
void rtw_btcoex_wifionly_AntInfoSetting(PADAPTER padapter);
#endif

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include/rtw_byteorder.h Normal file
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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTL871X_BYTEORDER_H_
#define _RTL871X_BYTEORDER_H_
#if defined(CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN)
#error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n"
#endif
#if defined(CONFIG_LITTLE_ENDIAN)
#ifndef CONFIG_PLATFORM_MSTAR389
#include <byteorder/little_endian.h>
#endif
#elif defined (CONFIG_BIG_ENDIAN)
#include <byteorder/big_endian.h>
#else
# error "Must be LITTLE/BIG Endian Host"
#endif
#endif /* _RTL871X_BYTEORDER_H_ */

802
include/rtw_cmd.h Normal file
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@ -0,0 +1,802 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_CMD_H_
#define __RTW_CMD_H_
#define C2H_MEM_SZ (16*1024)
#define FREE_CMDOBJ_SZ 128
#define MAX_CMDSZ 1536
#define MAX_RSPSZ 512
#define MAX_EVTSZ 1024
#define CMDBUFF_ALIGN_SZ 512
struct cmd_obj {
_adapter *padapter;
u16 cmdcode;
u8 res;
u8 *parmbuf;
u32 cmdsz;
u8 *rsp;
u32 rspsz;
struct submit_ctx *sctx;
u8 no_io;
/* _sema cmd_sem; */
_list list;
};
/* cmd flags */
enum {
RTW_CMDF_DIRECTLY = BIT0,
RTW_CMDF_WAIT_ACK = BIT1,
};
struct cmd_priv {
_sema cmd_queue_sema;
/* _sema cmd_done_sema; */
_sema start_cmdthread_sema;
_queue cmd_queue;
u8 cmd_seq;
u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *cmd_allocated_buf;
u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *rsp_allocated_buf;
u32 cmd_issued_cnt;
u32 cmd_done_cnt;
u32 rsp_cnt;
ATOMIC_T cmdthd_running;
/* u8 cmdthd_running; */
_adapter *padapter;
_mutex sctx_mutex;
};
#ifdef CONFIG_EVENT_THREAD_MODE
struct evt_obj {
u16 evtcode;
u8 res;
u8 *parmbuf;
u32 evtsz;
_list list;
};
#endif
struct evt_priv {
#ifdef CONFIG_EVENT_THREAD_MODE
_sema evt_notify;
_queue evt_queue;
#endif
#ifdef CONFIG_FW_C2H_REG
#define CONFIG_C2H_WK
#endif
#ifdef CONFIG_C2H_WK
_workitem c2h_wk;
bool c2h_wk_alive;
struct rtw_cbuf *c2h_queue;
#define C2H_QUEUE_MAX_LEN 10
#endif
#ifdef CONFIG_H2CLBK
_sema lbkevt_done;
u8 lbkevt_limit;
u8 lbkevt_num;
u8 *cmdevt_parm;
#endif
ATOMIC_T event_seq;
u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *evt_allocated_buf;
u32 evt_done_cnt;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 *c2h_mem;
u8 *allocated_c2h_mem;
#endif
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
do {\
_rtw_init_listhead(&pcmd->list);\
pcmd->cmdcode = code;\
pcmd->parmbuf = (u8 *)(pparm);\
pcmd->cmdsz = sizeof (*pparm);\
pcmd->rsp = NULL;\
pcmd->rspsz = 0;\
} while (0)
#define init_h2fwcmd_w_parm_no_parm_rsp(pcmd, code) \
do {\
_rtw_init_listhead(&pcmd->list);\
pcmd->cmdcode = code;\
pcmd->parmbuf = NULL;\
pcmd->cmdsz = 0;\
pcmd->rsp = NULL;\
pcmd->rspsz = 0;\
} while (0)
struct P2P_PS_Offload_t {
u8 Offload_En:1;
u8 role:1; /* 1: Owner, 0: Client */
u8 CTWindow_En:1;
u8 NoA0_En:1;
u8 NoA1_En:1;
u8 AllStaSleep:1; /* Only valid in Owner */
u8 discovery:1;
u8 rsvd:1;
#ifdef CONFIG_P2P_PS_NOA_USE_MACID_SLEEP
u8 p2p_macid:7;
u8 disable_close_rf:1; /*1: not close RF but just pause p2p_macid when NoA duration*/
#endif /* CONFIG_P2P_PS_NOA_USE_MACID_SLEEP */
};
struct P2P_PS_CTWPeriod_t {
u8 CTWPeriod; /* TU */
};
#ifdef CONFIG_P2P_WOWLAN
struct P2P_WoWlan_Offload_t {
u8 Disconnect_Wkup_Drv:1;
u8 role:2;
u8 Wps_Config[2];
};
#endif /* CONFIG_P2P_WOWLAN */
extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj);
extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv);
extern void rtw_free_cmd_obj(struct cmd_obj *pcmd);
#ifdef CONFIG_EVENT_THREAD_MODE
extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj);
extern struct evt_obj *rtw_dequeue_evt(_queue *queue);
extern void rtw_free_evt_obj(struct evt_obj *pcmd);
#endif
void rtw_stop_cmd_thread(_adapter *adapter);
thread_return rtw_cmd_thread(thread_context context);
extern u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
extern void rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
extern u32 rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void rtw_free_evt_priv(struct evt_priv *pevtpriv);
extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv);
extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
#ifdef CONFIG_P2P
u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType);
#endif /* CONFIG_P2P */
#ifdef CONFIG_IOCTL_CFG80211
struct rtw_roch_parm {
u64 cookie;
struct wireless_dev *wdev;
struct ieee80211_channel ch;
enum nl80211_channel_type ch_type;
unsigned int duration;
};
u8 rtw_roch_cmd(_adapter *adapter
, u64 cookie, struct wireless_dev *wdev
, struct ieee80211_channel *ch, enum nl80211_channel_type ch_type
, unsigned int duration
, u8 flags
);
u8 rtw_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, u8 flags);
u8 rtw_mgnt_tx_cmd(_adapter *adapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack, u8 flags);
struct mgnt_tx_parm {
u8 tx_ch;
u8 no_cck;
const u8 *buf;
size_t len;
int wait_ack;
};
#endif
enum rtw_drvextra_cmd_id {
NONE_WK_CID,
STA_MSTATUS_RPT_WK_CID,
DYNAMIC_CHK_WK_CID,
DM_CTRL_WK_CID,
PBC_POLLING_WK_CID,
POWER_SAVING_CTRL_WK_CID,/* IPS,AUTOSuspend */
LPS_CTRL_WK_CID,
ANT_SELECT_WK_CID,
P2P_PS_WK_CID,
P2P_PROTO_WK_CID,
CHECK_HIQ_WK_CID,/* for softap mode, check hi queue if empty */
C2H_WK_CID,
RTP_TIMER_CFG_WK_CID,
RESET_SECURITYPRIV, /* add for CONFIG_IEEE80211W, none 11w also can use */
FREE_ASSOC_RESOURCES, /* add for CONFIG_IEEE80211W, none 11w also can use */
DM_IN_LPS_WK_CID,
DM_RA_MSK_WK_CID, /* add for STA update RAMask when bandwith change. */
BEAMFORMING_WK_CID,
LPS_CHANGE_DTIM_CID,
BTINFO_WK_CID,
BTC_REDUCE_WL_TXPWR_CID,
DFS_RADAR_DETECT_WK_CID,
DFS_RADAR_DETECT_EN_DEC_WK_CID,
SESSION_TRACKER_WK_CID,
EN_HW_UPDATE_TSF_WK_CID,
PERIOD_TSF_UPDATE_END_WK_CID,
TEST_H2C_CID,
MP_CMD_WK_CID,
CUSTOMER_STR_WK_CID,
#ifdef CONFIG_RTW_REPEATER_SON
RSON_SCAN_WK_CID,
#endif
ROCH_WK_CID,
MGNT_TX_WK_CID,
REQ_PER_CMD_WK_CID,
SSMPS_WK_CID,
#ifdef CONFIG_CTRL_TXSS_BY_TP
TXSS_WK_CID,
#endif
AC_PARM_CMD_WK_CID,
#ifdef CONFIG_AP_MODE
STOP_AP_WK_CID,
#endif
#ifdef CONFIG_RTW_TOKEN_BASED_XMIT
TBTX_CONTROL_TX_WK_CID,
#endif
MAX_WK_CID
};
enum LPS_CTRL_TYPE {
LPS_CTRL_SCAN = 0,
LPS_CTRL_JOINBSS = 1,
LPS_CTRL_CONNECT = 2,
LPS_CTRL_DISCONNECT = 3,
LPS_CTRL_SPECIAL_PACKET = 4,
LPS_CTRL_LEAVE = 5,
LPS_CTRL_TRAFFIC_BUSY = 6,
LPS_CTRL_TX_TRAFFIC_LEAVE = 7,
LPS_CTRL_RX_TRAFFIC_LEAVE = 8,
LPS_CTRL_ENTER = 9,
LPS_CTRL_LEAVE_CFG80211_PWRMGMT = 10,
LPS_CTRL_LEAVE_SET_OPTION = 11,
};
enum STAKEY_TYPE {
GROUP_KEY = 0,
UNICAST_KEY = 1,
TDLS_KEY = 2,
};
enum RFINTFS {
SWSI,
HWSI,
HWPI,
};
/*
Caller Mode: Infra, Ad-Hoc
Notes: To join the specified bss
Command Event Mode
*/
struct joinbss_parm {
WLAN_BSSID_EX network;
};
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To disconnect the current associated BSS
Command Mode
*/
struct disconnect_parm {
u32 deauth_timeout_ms;
};
/*
Caller Mode: AP, Ad-HoC(M)
Notes: To create a BSS
Command Mode
*/
struct createbss_parm {
bool adhoc;
/* used by AP/Mesh mode now */
u8 ifbmp;
u8 excl_ifbmp;
s16 req_ch;
s8 req_bw;
s8 req_offset;
};
struct setopmode_parm {
u8 mode;
u8 rsvd[3];
};
/*
Caller Mode: AP, Ad-HoC, Infra
Notes: To ask RTL8711 performing site-survey
Command-Event Mode
*/
#define RTW_SSID_SCAN_AMOUNT 9 /* for WEXT_CSCAN_AMOUNT 9 */
#define RTW_CHANNEL_SCAN_AMOUNT (14+37)
struct sitesurvey_parm {
sint scan_mode; /* active: 1, passive: 0 */
/* sint bsslimit; // 1 ~ 48 */
u8 ssid_num;
u8 ch_num;
NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT];
struct rtw_ieee80211_channel ch[RTW_CHANNEL_SCAN_AMOUNT];
u32 token; /* 80211k use it to identify caller */
u16 duration; /* 0: use default, otherwise: channel scan time */
u8 igi; /* 0: use defalut */
u8 bw; /* 0: use default */
bool acs; /* aim to trigger channel selection when scan done */
u8 reason;
};
/*
Caller Mode: Any
Notes: To set the auth type of RTL8711. open/shared/802.1x
Command Mode
*/
struct setauth_parm {
u8 mode; /* 0: legacy open, 1: legacy shared 2: 802.1x */
u8 _1x; /* 0: PSK, 1: TLS */
u8 rsvd[2];
};
/*
Caller Mode: Infra
a. algorithm: wep40, wep104, tkip & aes
b. keytype: grp key/unicast key
c. key contents
when shared key ==> keyid is the camid
when 802.1x ==> keyid [0:1] ==> grp key
when 802.1x ==> keyid > 2 ==> unicast key
*/
struct setkey_parm {
u8 algorithm; /* encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 */
u8 keyid;
u8 set_tx; /* 1: main tx key for wep. 0: other key. */
u8 key[32]; /* this could be 40 or 104 */
};
/*
When in AP or Ad-Hoc mode, this is used to
allocate an sw/hw entry for a newly associated sta.
Command
when shared key ==> algorithm/keyid
*/
struct set_stakey_parm {
u8 addr[ETH_ALEN];
u8 algorithm;
u8 keyid;
u8 key[32];
u8 gk;
};
struct set_stakey_rsp {
u8 addr[ETH_ALEN];
u8 keyid;
u8 rsvd;
};
struct Tx_Beacon_param {
WLAN_BSSID_EX network;
};
/*
Notes: This command is used for H2C/C2H loopback testing
mac[0] == 0
==> CMD mode, return H2C_SUCCESS.
The following condition must be ture under CMD mode
mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0;
s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7;
s2 == (b1 << 8 | b0);
mac[0] == 1
==> CMD_RSP mode, return H2C_SUCCESS_RSP
The rsp layout shall be:
rsp: parm:
mac[0] = mac[5];
mac[1] = mac[4];
mac[2] = mac[3];
mac[3] = mac[2];
mac[4] = mac[1];
mac[5] = mac[0];
s0 = s1;
s1 = swap16(s0);
w0 = swap32(w1);
b0 = b1
s2 = s0 + s1
b1 = b0
w1 = w0
mac[0] == 2
==> CMD_EVENT mode, return H2C_SUCCESS
The event layout shall be:
event: parm:
mac[0] = mac[5];
mac[1] = mac[4];
mac[2] = event's sequence number, starting from 1 to parm's marc[3]
mac[3] = mac[2];
mac[4] = mac[1];
mac[5] = mac[0];
s0 = swap16(s0) - event.mac[2];
s1 = s1 + event.mac[2];
w0 = swap32(w0);
b0 = b1
s2 = s0 + event.mac[2]
b1 = b0
w1 = swap32(w1) - event.mac[2];
parm->mac[3] is the total event counts that host requested.
event will be the same with the cmd's param.
*/
#ifdef CONFIG_H2CLBK
struct seth2clbk_parm {
u8 mac[6];
u16 s0;
u16 s1;
u32 w0;
u8 b0;
u16 s2;
u8 b1;
u32 w1;
};
struct geth2clbk_parm {
u32 rsv;
};
struct geth2clbk_rsp {
u8 mac[6];
u16 s0;
u16 s1;
u32 w0;
u8 b0;
u16 s2;
u8 b1;
u32 w1;
};
#endif /* CONFIG_H2CLBK */
/* CMD param Formart for driver extra cmd handler */
struct drvextra_cmd_parm {
int ec_id; /* extra cmd id */
int type; /* Can use this field as the type id or command size */
int size; /* buffer size */
unsigned char *pbuf;
};
/*------------------- Below are used for RF/BB tunning ---------------------*/
struct addBaReq_parm {
unsigned int tid;
u8 addr[ETH_ALEN];
};
struct addBaRsp_parm {
unsigned int tid;
unsigned int start_seq;
u8 addr[ETH_ALEN];
u8 status;
u8 size;
};
struct set_ch_parm {
u8 ch;
u8 bw;
u8 ch_offset;
};
struct SetChannelPlan_param {
enum regd_src_t regd_src;
const struct country_chplan *country_ent;
u8 channel_plan;
};
struct get_channel_plan_param {
struct get_chplan_resp **resp;
};
struct LedBlink_param {
void *pLed;
};
struct TDLSoption_param {
u8 addr[ETH_ALEN];
u8 option;
};
struct RunInThread_param {
void (*func)(void *);
void *context;
};
#ifdef CONFIG_WRITE_BCN_LEN_TO_FW
struct write_bcnlen_param {
u16 bcn_len;
};
#endif
#define GEN_CMD_CODE(cmd) cmd ## _CMD_
/*
Result:
0x00: success
0x01: sucess, and check Response.
0x02: cmd ignored due to duplicated sequcne number
0x03: cmd dropped due to invalid cmd code
0x04: reserved.
*/
#define H2C_RSP_OFFSET 512
#define H2C_SUCCESS 0x00
#define H2C_SUCCESS_RSP 0x01
#define H2C_DUPLICATED 0x02
#define H2C_DROPPED 0x03
#define H2C_PARAMETERS_ERROR 0x04
#define H2C_REJECTED 0x05
#define H2C_CMD_OVERFLOW 0x06
#define H2C_RESERVED 0x07
#define H2C_ENQ_HEAD 0x08
#define H2C_ENQ_HEAD_FAIL 0x09
#define H2C_CMD_FAIL 0x0A
void rtw_init_sitesurvey_parm(_adapter *padapter, struct sitesurvey_parm *pparm);
u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm);
#ifdef CONFIG_AP_MODE
u8 rtw_create_ibss_cmd(_adapter *adapter, int flags);
u8 rtw_startbss_cmd(_adapter *adapter, int flags);
#endif
#define REQ_CH_NONE -1
#define REQ_CH_INT_INFO -2
#define REQ_BW_NONE -1
#define REQ_BW_ORI -2
#define REQ_OFFSET_NONE -1
struct sta_info;
extern u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool enqueue);
extern u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue);
extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork);
u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags);
#ifdef CONFIG_AP_MODE
u8 rtw_change_bss_chbw_cmd(_adapter *adapter, int flags
, u8 ifbmp, u8 excl_ifbmp, s16 req_ch, s8 req_bw, s8 req_offset);
u8 rtw_stop_ap_cmd(_adapter *adapter, u8 flags);
#endif
#ifdef CONFIG_RTW_TOKEN_BASED_XMIT
u8 rtw_tx_control_cmd(_adapter *adapter);
#endif
extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags);
extern u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr);
extern u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u16 start_seq);
/* add for CONFIG_IEEE80211W, none 11w also can use */
extern u8 rtw_reset_securitypriv_cmd(_adapter *padapter);
extern u8 rtw_free_assoc_resources_cmd(_adapter *padapter, u8 lock_scanned_queue, int flags);
extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter);
u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 flags);
u8 rtw_lps_ctrl_leave_set_level_cmd(_adapter *adapter, u8 lps_level, u8 flags);
#ifdef CONFIG_LPS_1T1R
u8 rtw_lps_ctrl_leave_set_1t1r_cmd(_adapter *adapter, u8 lps_1t1r, u8 flags);
#endif
u8 rtw_dm_in_lps_wk_cmd(_adapter *padapter);
u8 rtw_lps_change_dtim_cmd(_adapter *padapter, u8 dtim);
#if (RATE_ADAPTIVE_SUPPORT == 1)
u8 rtw_rpt_timer_cfg_cmd(_adapter *padapter, u16 minRptTime);
#endif
#ifdef CONFIG_ANTENNA_DIVERSITY
extern u8 rtw_antenna_select_cmd(_adapter *padapter, u8 antenna, u8 enqueue);
#endif
u8 rtw_dm_ra_mask_wk_cmd(_adapter *padapter, u8 *psta);
extern u8 rtw_ps_cmd(_adapter *padapter);
#if CONFIG_DFS
void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj);
#endif
#ifdef CONFIG_AP_MODE
u8 rtw_chk_hi_queue_cmd(_adapter *padapter);
#ifdef CONFIG_DFS_MASTER
u8 rtw_dfs_rd_cmd(_adapter *adapter, bool enqueue);
void rtw_dfs_rd_timer_hdl(void *ctx);
void rtw_dfs_rd_en_decision(_adapter *adapter, u8 mlme_act, u8 excl_ifbmp);
u8 rtw_dfs_rd_en_decision_cmd(_adapter *adapter);
#endif /* CONFIG_DFS_MASTER */
#endif /* CONFIG_AP_MODE */
#ifdef CONFIG_BT_COEXIST
u8 rtw_btinfo_cmd(PADAPTER padapter, u8 *pbuf, u16 length);
u8 rtw_btc_reduce_wl_txpwr_cmd(_adapter *adapter, u32 val);
#endif
u8 rtw_test_h2c_cmd(_adapter *adapter, u8 *buf, u8 len);
u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter);
u8 rtw_periodic_tsf_update_end_cmd(_adapter *adapter);
u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags);
u8 rtw_iqk_cmd(_adapter *padapter, u8 flags);
u8 rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, u8 swconfig);
u8 rtw_set_country_cmd(_adapter *adapter, int flags, const char *country_code, u8 swconfig);
#ifdef CONFIG_REGD_SRC_FROM_OS
u8 rtw_sync_os_regd_cmd(_adapter *adapter, int flags, const char *country_code, u8 dfs_region);
#endif
u8 rtw_get_chplan_cmd(_adapter *adapter, int flags, struct get_chplan_resp **resp);
extern u8 rtw_led_blink_cmd(_adapter *padapter, void *pLed);
extern u8 rtw_set_csa_cmd(_adapter *adapter);
extern u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option);
u8 rtw_mp_cmd(_adapter *adapter, u8 mp_cmd_id, u8 flags);
#ifdef CONFIG_RTW_CUSTOMER_STR
u8 rtw_customer_str_req_cmd(_adapter *adapter);
u8 rtw_customer_str_write_cmd(_adapter *adapter, const u8 *cstr);
#endif
#ifdef CONFIG_FW_C2H_REG
u8 rtw_c2h_reg_wk_cmd(_adapter *adapter, u8 *c2h_evt);
#endif
#ifdef CONFIG_FW_C2H_PKT
u8 rtw_c2h_packet_wk_cmd(_adapter *adapter, u8 *c2h_evt, u16 length);
#endif
#ifdef CONFIG_RTW_REPEATER_SON
#define RSON_SCAN_PROCESS 10
#define RSON_SCAN_DISABLE 11
u8 rtw_rson_scan_wk_cmd(_adapter *adapter, int op);
#endif
u8 rtw_run_in_thread_cmd(_adapter *adapter, void (*func)(void *), void *context);
u8 rtw_run_in_thread_cmd_wait(_adapter *adapter, void (*func)(void *), void *context, s32 timeout_ms);
struct ssmps_cmd_parm {
struct sta_info *sta;
u8 smps;
};
u8 rtw_ssmps_wk_cmd(_adapter *adapter, struct sta_info *sta, u8 smps, u8 enqueue);
u8 session_tracker_chk_cmd(_adapter *adapter, struct sta_info *sta);
u8 session_tracker_add_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
u8 session_tracker_del_cmd(_adapter *adapter, struct sta_info *sta, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
u8 set_txq_params_cmd(_adapter *adapter, u32 ac_parm, u8 ac_type);
#if defined(CONFIG_RTW_MESH) && defined(RTW_PER_CMD_SUPPORT_FW)
u8 rtw_req_per_cmd(_adapter * adapter);
#endif
#ifdef CONFIG_RTW_TOKEN_BASED_XMIT
u8 rtw_tbtx_chk_cmd(_adapter *adapter);
u8 rtw_tbtx_token_dispatch_cmd(_adapter *adapter);
#endif
#ifdef CONFIG_WRITE_BCN_LEN_TO_FW
u8 rtw_write_bcnlen_to_fw_cmd(_adapter *padapter, u16 bcn_len);
#endif
#ifdef CONFIG_CTRL_TXSS_BY_TP
struct txss_cmd_parm {
struct sta_info *sta;
bool tx_1ss;
};
void rtw_ctrl_txss_update_mimo_type(_adapter *adapter, struct sta_info *sta);
u8 rtw_ctrl_txss(_adapter *adapter, struct sta_info *sta, bool tx_1ss);
void rtw_ctrl_tx_ss_by_tp(_adapter *adapter, u8 from_timer);
#ifdef DBG_CTRL_TXSS
void dbg_ctrl_txss(_adapter *adapter, bool tx_1ss);
#endif
#endif
u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf);
extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd);
extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd);
extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd);
void rtw_create_ibss_post_hdl(_adapter *padapter, int status);
extern void rtw_readtssi_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd);
extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd);
extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd);
enum rtw_cmd_id {
CMD_JOINBSS, /*0*/
CMD_DISCONNECT, /*1*/
CMD_CREATE_BSS,/*2*/
CMD_SET_OPMODE, /*3*/
CMD_SITE_SURVEY, /*4*/
CMD_SET_AUTH, /*5*/
CMD_SET_KEY, /*6*/
CMD_SET_STAKEY, /*7*/
CMD_ADD_BAREQ, /*8*/
CMD_SET_CHANNEL, /*9*/
CMD_TX_BEACON, /*10*/
CMD_SET_MLME_EVT, /*11*/
CMD_SET_DRV_EXTRA, /*12*/
CMD_SET_CHANPLAN, /*13*/
CMD_LEDBLINK, /*14*/
CMD_SET_CHANSWITCH, /*15*/
CMD_TDLS, /*16*/
CMD_CHK_BMCSLEEPQ, /*17*/
CMD_RUN_INTHREAD, /*18*/
CMD_ADD_BARSP, /*19*/
CMD_RM_POST_EVENT, /*20*/
CMD_SET_MESH_PLINK_STATE, /* 21 */
CMD_DO_IQK, /* 22 */
CMD_GET_CHANPLAN, /*23*/
CMD_WRITE_BCN_LEN, /*24 */
CMD_ID_MAX
};
#define CMD_FMT "cmd=%d,%d,%d"
#define CMD_ARG(cmd) \
(cmd)->cmdcode, \
(cmd)->cmdcode == CMD_SET_DRV_EXTRA ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->ec_id : ((cmd)->cmdcode == CMD_SET_MLME_EVT ? ((struct rtw_evt_header *)(cmd)->parmbuf)->id : 0), \
(cmd)->cmdcode == CMD_SET_DRV_EXTRA ? ((struct drvextra_cmd_parm *)(cmd)->parmbuf)->type : 0
#endif /* _CMD_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_DEBUG_H__
#define __RTW_DEBUG_H__
/* driver log level*/
enum {
_DRV_NONE_ = 0,
_DRV_ALWAYS_ = 1,
_DRV_ERR_ = 2,
_DRV_WARNING_ = 3,
_DRV_INFO_ = 4,
_DRV_DEBUG_ = 5,
_DRV_MAX_ = 6
};
#define DRIVER_PREFIX "RTW: "
#ifdef PLATFORM_OS_CE
extern void rtl871x_cedbg(const char *fmt, ...);
#endif
#ifdef PLATFORM_WINDOWS
#define RTW_PRINT do {} while (0)
#define RTW_ERR do {} while (0)
#define RTW_WARN do {} while (0)
#define RTW_INFO do {} while (0)
#define RTW_DBG do {} while (0)
#define RTW_PRINT_SEL do {} while (0)
#define _RTW_PRINT do {} while (0)
#define _RTW_ERR do {} while (0)
#define _RTW_WARN do {} while (0)
#define _RTW_INFO do {} while (0)
#define _RTW_DBG do {} while (0)
#define _RTW_PRINT_SEL do {} while (0)
#else
#define RTW_PRINT(x, ...) do {} while (0)
#define RTW_ERR(x, ...) do {} while (0)
#define RTW_WARN(x,...) do {} while (0)
#define RTW_INFO(x,...) do {} while (0)
#define RTW_DBG(x,...) do {} while (0)
#define RTW_PRINT_SEL(x,...) do {} while (0)
#define _RTW_PRINT(x, ...) do {} while (0)
#define _RTW_ERR(x, ...) do {} while (0)
#define _RTW_WARN(x,...) do {} while (0)
#define _RTW_INFO(x,...) do {} while (0)
#define _RTW_DBG(x,...) do {} while (0)
#define _RTW_PRINT_SEL(x,...) do {} while (0)
#endif
#define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0)
#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0)
#define RTW_PRINT_DUMP(_TitleString, _HexData, _HexDataLen) do {} while (0)
#define RTW_DBG_EXPR(EXPR) do {} while (0)
#define RTW_DBGDUMP 0 /* 'stream' for _dbgdump */
#undef _dbgdump
#undef _seqdump
#if defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_XP)
#define _dbgdump DbgPrint
#define KERN_CONT
#define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg)
#elif defined(PLATFORM_WINDOWS) && defined(PLATFORM_OS_CE)
#define _dbgdump rtl871x_cedbg
#define KERN_CONT
#define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg)
#elif defined PLATFORM_LINUX
#define _dbgdump printk
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
#define KERN_CONT
#endif
#define _seqdump seq_printf
#elif defined PLATFORM_FREEBSD
#define _dbgdump printf
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24))
#define KERN_CONT
#endif
#define _seqdump(sel, fmt, arg...) _dbgdump(fmt, ##arg)
#endif
void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring,
bool _idx_show, const u8 *_hexdata, int _hexdatalen);
#ifdef CONFIG_RTW_DEBUG
#ifndef _OS_INTFS_C_
extern uint rtw_drv_log_level;
#endif
#if defined(_dbgdump)
#ifdef PLATFORM_LINUX
#ifdef DBG_THREAD_PID
#define T_PID_FMT "(%5u) "
#define T_PID_ARG current->pid
#else /* !DBG_THREAD_PID */
#define T_PID_FMT "%s"
#define T_PID_ARG ""
#endif /* !DBG_THREAD_PID */
#ifdef DBG_CPU_INFO
#define CPU_INFO_FMT "[%u] "
#define CPU_INFO_ARG get_cpu()
#else /* !DBG_CPU_INFO */
#define CPU_INFO_FMT "%s"
#define CPU_INFO_ARG ""
#endif /* !DBG_CPU_INFO */
/* Extra information in prefix */
#define EX_INFO_FMT T_PID_FMT CPU_INFO_FMT
#define EX_INFO_ARG T_PID_ARG, CPU_INFO_ARG
#else /* !PLATFORM_LINUX */
#define EX_INFO_FMT "%s"
#define EX_INFO_ARG ""
#endif /* !PLATFORM_LINUX */
#define DBG_PREFIX EX_INFO_FMT DRIVER_PREFIX
#define DBG_PREFIX_ARG EX_INFO_ARG
/* with driver-defined prefix */
#undef RTW_PRINT
#define RTW_PRINT(fmt, arg...) \
do {\
if (_DRV_ALWAYS_ <= rtw_drv_log_level) {\
_dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\
} \
} while (0)
#undef RTW_ERR
#define RTW_ERR(fmt, arg...) \
do {\
if (_DRV_ERR_ <= rtw_drv_log_level) {\
_dbgdump(DBG_PREFIX "ERROR " fmt, \
DBG_PREFIX_ARG, ##arg);\
} \
} while (0)
#undef RTW_WARN
#define RTW_WARN(fmt, arg...) \
do {\
if (_DRV_WARNING_ <= rtw_drv_log_level) {\
_dbgdump(DBG_PREFIX "WARN " fmt, \
DBG_PREFIX_ARG, ##arg);\
} \
} while (0)
#undef RTW_INFO
#define RTW_INFO(fmt, arg...) \
do {\
if (_DRV_INFO_ <= rtw_drv_log_level) {\
_dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\
} \
} while (0)
#undef RTW_DBG
#define RTW_DBG(fmt, arg...) \
do {\
if (_DRV_DEBUG_ <= rtw_drv_log_level) {\
_dbgdump(DBG_PREFIX fmt, DBG_PREFIX_ARG, ##arg);\
} \
} while (0)
#undef RTW_INFO_DUMP
#define RTW_INFO_DUMP(_TitleString, _HexData, _HexDataLen) \
RTW_BUF_DUMP_SEL(_DRV_INFO_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen)
#undef RTW_DBG_DUMP
#define RTW_DBG_DUMP(_TitleString, _HexData, _HexDataLen) \
RTW_BUF_DUMP_SEL(_DRV_DEBUG_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen)
#undef RTW_PRINT_DUMP
#define RTW_PRINT_DUMP(_TitleString, _HexData, _HexDataLen) \
RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, RTW_DBGDUMP, _TitleString, _FALSE, _HexData, _HexDataLen)
/* without driver-defined prefix */
#undef _RTW_PRINT
#define _RTW_PRINT(fmt, arg...) \
do {\
if (_DRV_ALWAYS_ <= rtw_drv_log_level) {\
_dbgdump(KERN_CONT fmt, ##arg);\
} \
} while (0)
#undef _RTW_ERR
#define _RTW_ERR(fmt, arg...) \
do {\
if (_DRV_ERR_ <= rtw_drv_log_level) {\
_dbgdump(KERN_CONT fmt, ##arg);\
} \
} while (0)
#undef _RTW_WARN
#define _RTW_WARN(fmt, arg...) \
do {\
if (_DRV_WARNING_ <= rtw_drv_log_level) {\
_dbgdump(KERN_CONT fmt, ##arg);\
} \
} while (0)
#undef _RTW_INFO
#define _RTW_INFO(fmt, arg...) \
do {\
if (_DRV_INFO_ <= rtw_drv_log_level) {\
_dbgdump(KERN_CONT fmt, ##arg);\
} \
} while (0)
#undef _RTW_DBG
#define _RTW_DBG(fmt, arg...) \
do {\
if (_DRV_DEBUG_ <= rtw_drv_log_level) {\
_dbgdump(KERN_CONT fmt, ##arg);\
} \
} while (0)
/* other debug APIs */
#undef RTW_DBG_EXPR
#define RTW_DBG_EXPR(EXPR) do { if (_DRV_DEBUG_ <= rtw_drv_log_level) EXPR; } while (0)
#endif /* defined(_dbgdump) */
#endif /* CONFIG_RTW_DEBUG */
#if defined(_seqdump)
/* dump message to selected 'stream' with driver-defined prefix */
#undef RTW_PRINT_SEL
#define RTW_PRINT_SEL(sel, fmt, arg...) \
do {\
if (sel == RTW_DBGDUMP)\
RTW_PRINT(fmt, ##arg); \
else {\
_seqdump(sel, fmt, ##arg) /*rtw_warn_on(1)*/; \
} \
} while (0)
/* dump message to selected 'stream' */
#undef _RTW_PRINT_SEL
#define _RTW_PRINT_SEL(sel, fmt, arg...) \
do {\
if (sel == RTW_DBGDUMP)\
_RTW_PRINT(fmt, ##arg); \
else {\
_seqdump(sel, fmt, ##arg) /*rtw_warn_on(1)*/; \
} \
} while (0)
/* dump message to selected 'stream' */
#undef RTW_DUMP_SEL
#define RTW_DUMP_SEL(sel, _HexData, _HexDataLen) \
RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, sel, NULL, _FALSE, _HexData, _HexDataLen)
#define RTW_MAP_DUMP_SEL(sel, _TitleString, _HexData, _HexDataLen) \
RTW_BUF_DUMP_SEL(_DRV_ALWAYS_, sel, _TitleString, _TRUE, _HexData, _HexDataLen)
#endif /* defined(_seqdump) */
#ifdef CONFIG_DBG_COUNTER
#define DBG_COUNTER(counter) counter++
#else
#define DBG_COUNTER(counter)
#endif
void dump_drv_version(void *sel);
void dump_log_level(void *sel);
#ifdef CONFIG_SDIO_HCI
void sd_f0_reg_dump(void *sel, _adapter *adapter);
void sdio_local_reg_dump(void *sel, _adapter *adapter);
#endif /* CONFIG_SDIO_HCI */
void mac_reg_dump(void *sel, _adapter *adapter);
void bb_reg_dump(void *sel, _adapter *adapter);
void bb_reg_dump_ex(void *sel, _adapter *adapter);
void rf_reg_dump(void *sel, _adapter *adapter);
void rtw_sink_rtp_seq_dbg(_adapter *adapter, u8 *ehdr_pos);
struct sta_info;
void sta_rx_reorder_ctl_dump(void *sel, struct sta_info *sta);
struct dvobj_priv;
void dump_tx_rate_bmp(void *sel, struct dvobj_priv *dvobj);
void dump_adapters_status(void *sel, struct dvobj_priv *dvobj);
struct sec_cam_ent;
#if defined(CONFIG_RTW_DEBUG) || defined(CONFIG_PROC_DEBUG)
void dump_sec_cam_ent(void *sel, struct sec_cam_ent *ent, int id);
void dump_sec_cam_ent_title(void *sel, u8 has_id);
#endif
void dump_sec_cam(void *sel, _adapter *adapter);
void dump_sec_cam_cache(void *sel, _adapter *adapter);
bool rtw_fwdl_test_trigger_chksum_fail(void);
bool rtw_fwdl_test_trigger_wintint_rdy_fail(void);
bool rtw_del_rx_ampdu_test_trigger_no_tx_fail(void);
u32 rtw_get_wait_hiq_empty_ms(void);
void rtw_sta_linking_test_set_start(void);
bool rtw_sta_linking_test_wait_done(void);
bool rtw_sta_linking_test_force_fail(void);
#ifdef CONFIG_AP_MODE
u16 rtw_ap_linking_test_force_auth_fail(void);
u16 rtw_ap_linking_test_force_asoc_fail(void);
#endif
#ifdef CONFIG_PROC_DEBUG
ssize_t proc_set_write_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_read_reg(struct seq_file *m, void *v);
ssize_t proc_set_read_reg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
void dump_drv_cfg(void *sel);
int proc_get_fwstate(struct seq_file *m, void *v);
int proc_get_sec_info(struct seq_file *m, void *v);
int proc_get_mlmext_state(struct seq_file *m, void *v);
#ifdef CONFIG_LAYER2_ROAMING
int proc_get_roam_flags(struct seq_file *m, void *v);
ssize_t proc_set_roam_flags(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_roam_param(struct seq_file *m, void *v);
ssize_t proc_set_roam_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_roam_tgt_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /* CONFIG_LAYER2_ROAMING */
int proc_get_qos_option(struct seq_file *m, void *v);
int proc_get_ht_option(struct seq_file *m, void *v);
int proc_get_rf_info(struct seq_file *m, void *v);
int proc_get_scan_param(struct seq_file *m, void *v);
ssize_t proc_set_scan_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_scan_abort(struct seq_file *m, void *v);
#ifdef CONFIG_RTW_REPEATER_SON
int proc_get_rson_data(struct seq_file *m, void *v);
ssize_t proc_set_rson_data(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
int proc_get_survey_info(struct seq_file *m, void *v);
ssize_t proc_set_survey_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_ap_info(struct seq_file *m, void *v);
#ifdef ROKU_PRIVATE
int proc_get_infra_ap(struct seq_file *m, void *v);
#endif /* ROKU_PRIVATE */
ssize_t proc_reset_trx_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_trx_info(struct seq_file *m, void *v);
ssize_t proc_set_tx_power_offset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_power_offset(struct seq_file *m, void *v);
int proc_get_rate_ctl(struct seq_file *m, void *v);
int proc_get_wifi_spec(struct seq_file *m, void *v);
ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_bw_ctl(struct seq_file *m, void *v);
ssize_t proc_set_bw_ctl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef DBG_RX_COUNTER_DUMP
int proc_get_rx_cnt_dump(struct seq_file *m, void *v);
ssize_t proc_set_rx_cnt_dump(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef CONFIG_AP_MODE
int proc_get_bmc_tx_rate(struct seq_file *m, void *v);
ssize_t proc_set_bmc_tx_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /*CONFIG_AP_MODE*/
int proc_get_ps_dbg_info(struct seq_file *m, void *v);
ssize_t proc_set_ps_dbg_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_fwdl_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_del_rx_ampdu_test_case(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_wait_hiq_empty(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_sta_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_AP_MODE
ssize_t proc_set_ap_linking_test(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
int proc_get_rx_stat(struct seq_file *m, void *v);
int proc_get_tx_stat(struct seq_file *m, void *v);
#ifdef CONFIG_AP_MODE
int proc_get_all_sta_info(struct seq_file *m, void *v);
#endif /* CONFIG_AP_MODE */
#ifdef DBG_MEMORY_LEAK
int proc_get_malloc_cnt(struct seq_file *m, void *v);
#endif /* DBG_MEMORY_LEAK */
#ifdef CONFIG_FIND_BEST_CHANNEL
int proc_get_best_channel(struct seq_file *m, void *v);
ssize_t proc_set_best_channel(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /* CONFIG_FIND_BEST_CHANNEL */
int proc_get_trx_info_debug(struct seq_file *m, void *v);
#ifdef CONFIG_HUAWEI_PROC
int proc_get_huawei_trx_info(struct seq_file *m, void *v);
#endif
int proc_get_rx_signal(struct seq_file *m, void *v);
ssize_t proc_set_rx_signal(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_hw_status(struct seq_file *m, void *v);
ssize_t proc_set_hw_status(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_mac_rptbuf(struct seq_file *m, void *v);
#ifdef CONFIG_80211N_HT
int proc_get_ht_enable(struct seq_file *m, void *v);
ssize_t proc_set_ht_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_bw_mode(struct seq_file *m, void *v);
ssize_t proc_set_bw_mode(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_ampdu_enable(struct seq_file *m, void *v);
ssize_t proc_set_ampdu_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
void dump_regsty_rx_ampdu_size_limit(void *sel, _adapter *adapter);
int proc_get_rx_ampdu(struct seq_file *m, void *v);
ssize_t proc_set_rx_ampdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
void rtw_dump_dft_phy_cap(void *sel, _adapter *adapter);
void rtw_get_dft_phy_cap(void *sel, _adapter *adapter);
void rtw_dump_drv_phy_cap(void *sel, _adapter *adapter);
int proc_get_rx_stbc(struct seq_file *m, void *v);
ssize_t proc_set_rx_stbc(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_stbc_cap(struct seq_file *m, void *v);
ssize_t proc_set_stbc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_ldpc_cap(struct seq_file *m, void *v);
ssize_t proc_set_ldpc_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_BEAMFORMING
int proc_get_txbf_cap(struct seq_file *m, void *v);
ssize_t proc_set_txbf_cap(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT
int proc_get_tx_aval_th(struct seq_file *m, void *v);
ssize_t proc_set_tx_aval_th(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /*CONFIG_SDIO_TX_ENABLE_AVAL_INT*/
int proc_get_rx_ampdu_factor(struct seq_file *m, void *v);
ssize_t proc_set_rx_ampdu_factor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_max_agg_num(struct seq_file *m, void *v);
ssize_t proc_set_tx_max_agg_num(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_rx_ampdu_density(struct seq_file *m, void *v);
ssize_t proc_set_rx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_ampdu_density(struct seq_file *m, void *v);
ssize_t proc_set_tx_ampdu_density(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_quick_addba_req(struct seq_file *m, void *v);
ssize_t proc_set_tx_quick_addba_req(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_TX_AMSDU
int proc_get_tx_amsdu(struct seq_file *m, void *v);
ssize_t proc_set_tx_amsdu(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_amsdu_rate(struct seq_file *m, void *v);
ssize_t proc_set_tx_amsdu_rate(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#endif /* CONFIG_80211N_HT */
#ifdef CONFIG_80211AC_VHT
int proc_get_vht_24g_enable(struct seq_file *m, void *v);
ssize_t proc_set_vht_24g_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
ssize_t proc_set_dyn_rrsr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_dyn_rrsr(struct seq_file *m, void *v);
int proc_get_en_fwps(struct seq_file *m, void *v);
ssize_t proc_set_en_fwps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#if 0
int proc_get_two_path_rssi(struct seq_file *m, void *v);
int proc_get_rssi_disp(struct seq_file *m, void *v);
ssize_t proc_set_rssi_disp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef CONFIG_BT_COEXIST
int proc_get_btcoex_dbg(struct seq_file *m, void *v);
ssize_t proc_set_btcoex_dbg(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_btcoex_info(struct seq_file *m, void *v);
#ifdef CONFIG_RF4CE_COEXIST
int proc_get_rf4ce_state(struct seq_file *m, void *v);
ssize_t proc_set_rf4ce_state(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#endif /* CONFIG_BT_COEXIST */
#if defined(DBG_CONFIG_ERROR_DETECT)
int proc_get_sreset(struct seq_file *m, void *v);
ssize_t proc_set_sreset(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /* DBG_CONFIG_ERROR_DETECT */
int proc_get_odm_adaptivity(struct seq_file *m, void *v);
ssize_t proc_set_odm_adaptivity(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_DBG_COUNTER
int proc_get_rx_logs(struct seq_file *m, void *v);
int proc_get_tx_logs(struct seq_file *m, void *v);
int proc_get_int_logs(struct seq_file *m, void *v);
#endif
#ifdef CONFIG_PCI_HCI
int proc_get_rx_ring(struct seq_file *m, void *v);
int proc_get_tx_ring(struct seq_file *m, void *v);
int proc_get_pci_aspm(struct seq_file *m, void *v);
int proc_get_pci_conf_space(struct seq_file *m, void *v);
ssize_t proc_set_pci_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_pci_bridge_conf_space(struct seq_file *m, void *v);
ssize_t proc_set_pci_bridge_conf_space(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef DBG_TXBD_DESC_DUMP
int proc_get_tx_ring_ext(struct seq_file *m, void *v);
ssize_t proc_set_tx_ring_ext(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#endif
#ifdef CONFIG_WOWLAN
int proc_get_wow_enable(struct seq_file *m, void *v);
ssize_t proc_set_wow_enable(struct file *file, const char __user *buffer,
size_t count, loff_t *pos, void *data);
int proc_get_pattern_info(struct seq_file *m, void *v);
ssize_t proc_set_pattern_info(struct file *file, const char __user *buffer,
size_t count, loff_t *pos, void *data);
int proc_get_wakeup_event(struct seq_file *m, void *v);
ssize_t proc_set_wakeup_event(struct file *file, const char __user *buffer,
size_t count, loff_t *pos, void *data);
int proc_get_wakeup_reason(struct seq_file *m, void *v);
#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN
int proc_dump_wow_keep_alive_info(struct seq_file *m, void *v);
#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/
#endif
#ifdef CONFIG_WAR_OFFLOAD
int proc_get_war_offload_enable(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_ipv4_addr(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_ipv4_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_ipv6_addr(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_ipv6_addr(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_mdns_domain_name(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_mdns_domain_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_mdns_machine_name(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_mdns_machine_name(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_mdns_txt_rsp(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_mdns_txt_rsp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_war_offload_mdns_service_info(struct seq_file *m, void *v);
ssize_t proc_set_war_offload_mdns_service_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /* CONFIG_WAR_OFFLOAD */
#ifdef CONFIG_GPIO_WAKEUP
int proc_get_wowlan_gpio_info(struct seq_file *m, void *v);
ssize_t proc_set_wowlan_gpio_info(struct file *file, const char __user *buffer,
size_t count, loff_t *pos, void *data);
#endif /*CONFIG_GPIO_WAKEUP*/
#ifdef CONFIG_P2P_WOWLAN
int proc_get_p2p_wowlan_info(struct seq_file *m, void *v);
#endif /* CONFIG_P2P_WOWLAN */
int proc_get_new_bcn_max(struct seq_file *m, void *v);
ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_POWER_SAVING
int proc_get_ps_info(struct seq_file *m, void *v);
ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_WMMPS_STA
int proc_get_wmmps_info(struct seq_file *m, void *v);
ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /* CONFIG_WMMPS_STA */
#endif /* CONFIG_POWER_SAVING */
#ifdef CONFIG_TDLS
int proc_get_tdls_enable(struct seq_file *m, void *v);
ssize_t proc_set_tdls_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tdls_info(struct seq_file *m, void *v);
#endif
int proc_get_monitor(struct seq_file *m, void *v);
ssize_t proc_set_monitor(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef RTW_SIMPLE_CONFIG
int proc_get_simple_config(struct seq_file *m, void *v);
ssize_t proc_set_simple_config(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef DBG_XMIT_BLOCK
int proc_get_xmit_block(struct seq_file *m, void *v);
ssize_t proc_set_xmit_block(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
int proc_get_rtkm_info(struct seq_file *m, void *v);
#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
#ifdef CONFIG_IEEE80211W
ssize_t proc_set_tx_sa_query(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_sa_query(struct seq_file *m, void *v);
ssize_t proc_set_tx_deauth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_deauth(struct seq_file *m, void *v);
ssize_t proc_set_tx_auth(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_tx_auth(struct seq_file *m, void *v);
#endif /* CONFIG_IEEE80211W */
#endif /* CONFIG_PROC_DEBUG */
int proc_get_efuse_map(struct seq_file *m, void *v);
ssize_t proc_set_efuse_map(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA
int proc_get_pathb_phase(struct seq_file *m, void *v);
ssize_t proc_set_pathb_phase(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
#ifdef CONFIG_MCC_MODE
int proc_get_mcc_info(struct seq_file *m, void *v);
ssize_t proc_set_mcc_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_duration(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_MCC_PHYDM_OFFLOAD
ssize_t proc_set_mcc_phydm_offload_enable(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif
ssize_t proc_set_mcc_single_tx_criteria(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_ap_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_ap_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_ap_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_sta_bw20_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_sta_bw40_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
ssize_t proc_set_mcc_sta_bw80_target_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_mcc_policy_table(struct seq_file *m, void *v);
#endif /* CONFIG_MCC_MODE */
int proc_get_ack_timeout(struct seq_file *m, void *v);
ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_fw_offload(struct seq_file *m, void *v);
ssize_t proc_set_fw_offload(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#ifdef CONFIG_FW_HANDLE_TXBCN
ssize_t proc_set_fw_tbtt_rpt(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_fw_tbtt_rpt(struct seq_file *m, void *v);
#endif
#ifdef CONFIG_DBG_RF_CAL
int proc_get_iqk_info(struct seq_file *m, void *v);
ssize_t proc_set_iqk(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_lck_info(struct seq_file *m, void *v);
ssize_t proc_set_lck(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#endif /*CONFIG_DBG_RF_CAL*/
#ifdef CONFIG_CTRL_TXSS_BY_TP
ssize_t proc_set_txss_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_txss_tp(struct seq_file *m, void *v);
#ifdef DBG_CTRL_TXSS
ssize_t proc_set_txss_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_txss_ctrl(struct seq_file *m, void *v);
#endif
#endif
#ifdef CONFIG_LPS_CHK_BY_TP
ssize_t proc_set_lps_chk_tp(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_lps_chk_tp(struct seq_file *m, void *v);
#endif
#ifdef CONFIG_SUPPORT_STATIC_SMPS
ssize_t proc_set_smps(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
int proc_get_smps(struct seq_file *m, void *v);
#endif
int proc_get_defs_param(struct seq_file *m, void *v);
ssize_t proc_set_defs_param(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data);
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
#define _drv_crit_ 4
#define _drv_err_ 5
#define _drv_warning_ 6
#define _drv_notice_ 7
#define _drv_info_ 8
#define _drv_dump_ 9
#define _drv_debug_ 10
#define _module_rtl871x_xmit_c_ BIT(0)
#define _module_xmit_osdep_c_ BIT(1)
#define _module_rtl871x_recv_c_ BIT(2)
#define _module_recv_osdep_c_ BIT(3)
#define _module_rtl871x_mlme_c_ BIT(4)
#define _module_mlme_osdep_c_ BIT(5)
#define _module_rtl871x_sta_mgt_c_ BIT(6)
#define _module_rtl871x_cmd_c_ BIT(7)
#define _module_cmd_osdep_c_ BIT(8)
#define _module_rtl871x_io_c_ BIT(9)
#define _module_io_osdep_c_ BIT(10)
#define _module_os_intfs_c_ BIT(11)
#define _module_rtl871x_security_c_ BIT(12)
#define _module_rtl871x_eeprom_c_ BIT(13)
#define _module_hal_init_c_ BIT(14)
#define _module_hci_hal_init_c_ BIT(15)
#define _module_rtl871x_ioctl_c_ BIT(16)
#define _module_rtl871x_ioctl_set_c_ BIT(17)
#define _module_rtl871x_ioctl_query_c_ BIT(18)
#define _module_rtl871x_pwrctrl_c_ BIT(19)
#define _module_hci_intfs_c_ BIT(20)
#define _module_hci_ops_c_ BIT(21)
#define _module_osdep_service_c_ BIT(22)
#define _module_mp_ BIT(23)
#define _module_hci_ops_os_c_ BIT(24)
#define _module_rtl871x_ioctl_os_c BIT(25)
#define _module_rtl8712_cmd_c_ BIT(26)
/* #define _module_efuse_ BIT(27) */
#define _module_rtl8192c_xmit_c_ BIT(28)
#define _module_hal_xmit_c_ BIT(28)
#define _module_efuse_ BIT(29)
#define _module_rtl8712_recv_c_ BIT(30)
#define _module_rtl8712_led_c_ BIT(31)
#endif /* __RTW_DEBUG_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_EEPROM_H__
#define __RTW_EEPROM_H__
#define RTL8712_EEPROM_ID 0x8712
/* #define EEPROM_MAX_SIZE 256 */
#define HWSET_MAX_SIZE_128 128
#define HWSET_MAX_SIZE_256 256
#define HWSET_MAX_SIZE_512 512
#define HWSET_MAX_SIZE_1024 1024
#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_1024
#define CLOCK_RATE 50 /* 100us */
/* - EEPROM opcodes */
#define EEPROM_READ_OPCODE 06
#define EEPROM_WRITE_OPCODE 05
#define EEPROM_ERASE_OPCODE 07
#define EEPROM_EWEN_OPCODE 19 /* Erase/write enable */
#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
/*
* Customer ID, note that:
* This variable is initiailzed through EEPROM or registry,
* however, its definition may be different with that in EEPROM for
* EEPROM size consideration. So, we have to perform proper translation between them.
* Besides, CustomerID of registry has precedence of that of EEPROM.
* defined below. 060703, by rcnjko.
* */
typedef enum _RT_CUSTOMER_ID {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
RT_CID_8187_SERCOMM_PS = 2,
RT_CID_8187_HW_LED = 3,
RT_CID_8187_NETGEAR = 4,
RT_CID_WHQL = 5,
RT_CID_819x_CAMEO = 6,
RT_CID_819x_RUNTOP = 7,
RT_CID_819x_Senao = 8,
RT_CID_TOSHIBA = 9, /* Merge by Jacken, 2008/01/31. */
RT_CID_819x_Netcore = 10,
RT_CID_Nettronix = 11,
RT_CID_DLINK = 12,
RT_CID_PRONET = 13,
RT_CID_COREGA = 14,
RT_CID_CHINA_MOBILE = 15,
RT_CID_819x_ALPHA = 16,
RT_CID_819x_Sitecom = 17,
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. */
RT_CID_819X_LENOVO = 19,
RT_CID_819x_QMI = 20,
RT_CID_819x_Edimax_Belkin = 21,
RT_CID_819x_Sercomm_Belkin = 22,
RT_CID_819x_CAMEO1 = 23,
RT_CID_819x_MSI = 24,
RT_CID_819X_ACER = 25,
RT_CID_819x_AzWave_ASUS = 26,
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe, The ID is AzWave use and not only Asus */
RT_CID_819x_HP = 28,
RT_CID_819x_WNC_COREGA = 29,
RT_CID_819x_Arcadyan_Belkin = 30,
RT_CID_819x_SAMSUNG = 31,
RT_CID_819x_CLEVO = 32,
RT_CID_819x_DELL = 33,
RT_CID_819x_PRONETS = 34,
RT_CID_819x_Edimax_ASUS = 35,
RT_CID_NETGEAR = 36,
RT_CID_PLANEX = 37,
RT_CID_CC_C = 38,
RT_CID_819x_Xavi = 39,
RT_CID_LENOVO_CHINA = 40,
RT_CID_INTEL_CHINA = 41,
RT_CID_TPLINK_HPWR = 42,
RT_CID_819x_Sercomm_Netgear = 43,
RT_CID_819x_ALPHA_Dlink = 44,/* add by ylb 20121012 for customer led for alpha */
RT_CID_WNC_NEC = 45,/* add by page for NEC */
RT_CID_DNI_BUFFALO = 46,/* add by page for NEC */
} RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data);
extern u16 eeprom_read16(_adapter *padapter, u16 reg);
extern void read_eeprom_content(_adapter *padapter);
extern void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz);
extern void read_eeprom_content_by_attrib(_adapter *padapter);
#ifdef PLATFORM_LINUX
#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
extern int isAdaptorInfoFileValid(void);
extern int storeAdaptorInfoFile(char *path, u8 *efuse_data);
extern int retriveAdaptorInfoFile(char *path, u8 *efuse_data);
#endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */
#endif /* PLATFORM_LINUX */
#endif /* __RTL871X_EEPROM_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_EFUSE_H__
#define __RTW_EFUSE_H__
#define EFUSE_ERROE_HANDLE 1
#define PG_STATE_HEADER 0x01
#define PG_STATE_WORD_0 0x02
#define PG_STATE_WORD_1 0x04
#define PG_STATE_WORD_2 0x08
#define PG_STATE_WORD_3 0x10
#define PG_STATE_DATA 0x20
#define PG_SWBYTE_H 0x01
#define PG_SWBYTE_L 0x02
#define PGPKT_DATA_SIZE 8
#define EFUSE_WIFI 0
#define EFUSE_BT 1
enum _EFUSE_DEF_TYPE {
TYPE_EFUSE_MAX_SECTION = 0,
TYPE_EFUSE_REAL_CONTENT_LEN = 1,
TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2,
TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3,
TYPE_EFUSE_MAP_LEN = 4,
TYPE_EFUSE_PROTECT_BYTES_BANK = 5,
TYPE_EFUSE_CONTENT_LEN_BANK = 6,
};
#define EFUSE_MAX_MAP_LEN 1024
#define EFUSE_MAX_HW_SIZE 1024
#define EFUSE_MAX_SECTION_BASE 16
#define EFUSE_MAX_SECTION_NUM 128
#define EFUSE_MAX_BANK_SIZE 512
/*RTL8822B 8821C BT EFUSE Define 1 BANK 128 size logical map 1024*/
#ifdef RTW_HALMAC
#define BANK_NUM 1
#if defined(CONFIG_RTL8723F)
#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512
#else
#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128
#endif
#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM)
#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */
#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8)
#if defined(CONFIG_RTL8822C)
#define EFUSE_PROTECT_BYTES_BANK 54
#elif defined(CONFIG_RTL8723F)
#define EFUSE_PROTECT_BYTES_BANK 40
#else
#define EFUSE_PROTECT_BYTES_BANK 16
#endif
#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK)
#endif /* #ifdef RTW_HALMAC */
#define EXT_HEADER(header) ((header & 0x1F) == 0x0F)
#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F)
#define GET_HDR_OFFSET_2_0(header) ((header & 0xE0) >> 5)
#define EFUSE_REPEAT_THRESHOLD_ 3
#define IS_MASKED_MP(ic, txt, offset) (EFUSE_IsAddressMasked_MP_##ic##txt(offset))
#define IS_MASKED_TC(ic, txt, offset) (EFUSE_IsAddressMasked_TC_##ic##txt(offset))
#define GET_MASK_ARRAY_LEN_MP(ic, txt) (EFUSE_GetArrayLen_MP_##ic##txt())
#define GET_MASK_ARRAY_LEN_TC(ic, txt) (EFUSE_GetArrayLen_TC_##ic##txt())
#define GET_MASK_ARRAY_MP(ic, txt, offset) (EFUSE_GetMaskArray_MP_##ic##txt(offset))
#define GET_MASK_ARRAY_TC(ic, txt, offset) (EFUSE_GetMaskArray_TC_##ic##txt(offset))
#define IS_MASKED(ic, txt, offset) (IS_MASKED_MP(ic, txt, offset))
#define GET_MASK_ARRAY_LEN(ic, txt) (GET_MASK_ARRAY_LEN_MP(ic, txt))
#define GET_MASK_ARRAY(ic, txt, out) do { GET_MASK_ARRAY_MP(ic, txt, out); } while (0)
#ifdef CONFIG_BT_EFUSE_MASK
#define IS_BT_MASKED_MP(ic, txt, offset) (EFUSE_IsBTAddressMasked_MP_##ic##txt(offset))
#define GET_BT_MASK_ARRAY_LEN_MP(ic, txt) (EFUSE_GetBTArrayLen_MP_##ic##txt())
#define GET_BT_MASK_ARRAY_LEN_TC(ic, txt) (EFUSE_GetBTArrayLen_TC_##ic##txt())
#define GET_BT_MASK_ARRAY_MP(ic, txt, offset) (EFUSE_GetBTMaskArray_MP_##ic##txt(offset))
#define IS_BT_MASKED(ic, txt, offset) (IS_BT_MASKED_MP(ic,txt, offset))
#define GET_BT_MASK_ARRAY(ic, txt, out) do { GET_BT_MASK_ARRAY_MP(ic,txt, out); } while(0)
#define GET_BT_MASK_ARRAY_LEN(ic, txt) (GET_BT_MASK_ARRAY_LEN_MP(ic,txt))
#endif
/* *********************************************
* The following is for BT Efuse definition
* ********************************************* */
#define EFUSE_BT_MAX_MAP_LEN 1024
#define EFUSE_MAX_BANK 4
#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1)
/* *********************************************
*--------------------------Define Parameters-------------------------------*/
#define EFUSE_MAX_WORD_UNIT 4
/*------------------------------Define structure----------------------------*/
typedef struct PG_PKT_STRUCT_A {
u8 offset;
u8 word_en;
u8 data[8];
u8 word_cnts;
} PGPKT_STRUCT, *PPGPKT_STRUCT;
typedef enum {
ERR_SUCCESS = 0,
ERR_DRIVER_FAILURE,
ERR_IO_FAILURE,
ERR_WI_TIMEOUT,
ERR_WI_BUSY,
ERR_BAD_FORMAT,
ERR_INVALID_DATA,
ERR_NOT_ENOUGH_SPACE,
ERR_WRITE_PROTECT,
ERR_READ_BACK_FAIL,
ERR_OUT_OF_RANGE
} ERROR_CODE;
/*------------------------------Define structure----------------------------*/
typedef struct _EFUSE_HAL {
u8 fakeEfuseBank;
u32 fakeEfuseUsedBytes;
u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE];
u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN];
u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN];
u32 EfuseUsedBytes;
u8 EfuseUsedPercentage;
u16 BTEfuseUsedBytes;
u8 BTEfuseUsedPercentage;
u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
u16 fakeBTEfuseUsedBytes;
u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
/* EFUSE Configuration, initialized in HAL_CmnInitPGData(). */
const u16 MaxSecNum_WiFi;
const u16 MaxSecNum_BT;
const u16 WordUnit;
const u16 PhysicalLen_WiFi;
const u16 PhysicalLen_BT;
const u16 LogicalLen_WiFi;
const u16 LogicalLen_BT;
const u16 BankSize;
const u16 TotalBankNum;
const u16 BankNum_WiFi;
const u16 BankNum_BT;
const u16 OOBProtectBytes;
const u16 ProtectBytes;
const u16 BankAvailBytes;
const u16 TotalAvailBytes_WiFi;
const u16 TotalAvailBytes_BT;
const u16 HeaderRetry;
const u16 DataRetry;
ERROR_CODE Status;
} EFUSE_HAL, *PEFUSE_HAL;
extern u8 maskfileBuffer[64];
extern u8 btmaskfileBuffer[64];
/*------------------------Export global variable----------------------------*/
extern u8 fakeEfuseBank;
extern u32 fakeEfuseUsedBytes;
extern u8 fakeEfuseContent[];
extern u8 fakeEfuseInitMap[];
extern u8 fakeEfuseModifiedMap[];
extern u32 BTEfuseUsedBytes;
extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 BTEfuseInitMap[];
extern u8 BTEfuseModifiedMap[];
extern u32 fakeBTEfuseUsedBytes;
extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 fakeBTEfuseInitMap[];
extern u8 fakeBTEfuseModifiedMap[];
/*------------------------Export global variable----------------------------*/
#define MAX_SEGMENT_SIZE 200
#define MAX_SEGMENT_NUM 200
#define MAX_BUF_SIZE (MAX_SEGMENT_SIZE*MAX_SEGMENT_NUM)
#define TMP_BUF_SIZE 100
#define rtprintf dcmd_Store_Return_Buf
u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size);
u16 efuse_bt_GetMaxSize(PADAPTER padapter);
u16 efuse_GetavailableSize(PADAPTER adapter);
u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size);
u16 efuse_GetMaxSize(PADAPTER padapter);
u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data);
u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data);
#ifdef CONFIG_RTL8822C
void rtw_pre_bt_efuse(PADAPTER padapter);
#endif
u16 Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
u8 Efuse_CalculateWordCnts(u8 word_en);
void ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ;
void EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, void *pOut, BOOLEAN bPseudoTest);
u8 efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN bPseudoTest);
#define efuse_onebyte_read(adapter, addr, data, pseudo_test) efuse_OneByteRead((adapter), (addr), (data), (pseudo_test))
u8 efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN bPseudoTest);
void BTEfuse_PowerSwitch(PADAPTER pAdapter, u8 bWrite, u8 PwrState);
void Efuse_PowerSwitch(PADAPTER pAdapter, u8 bWrite, u8 PwrState);
int Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest);
int Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest);
void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest);
void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value);
#define efuse_logical_map_read(adapter, type, offset, value) EFUSE_ShadowRead((adapter), (type), (offset), (value))
BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset, u8 *maskbuf);
BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset);
void hal_ReadEFuse_BT_logic_map(
PADAPTER padapter,
u16 _offset,
u16 _size_byte,
u8 *pbuf
);
u8 EfusePgPacketWrite_BT(
PADAPTER pAdapter,
u8 offset,
u8 word_en,
u8 *pData,
u8 bPseudoTest);
u16 rtw_get_bt_efuse_mask_arraylen(PADAPTER pAdapter);
void rtw_bt_efuse_mask_array(PADAPTER pAdapter, u8 *pArray);
u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter);
void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray);
void rtw_efuse_analyze(PADAPTER padapter, u8 Type, u8 Fake);
#define MAC_HIDDEN_MAX_BW_NUM 8
extern const u8 _mac_hidden_max_bw_to_hal_bw_cap[];
#define mac_hidden_max_bw_to_hal_bw_cap(max_bw) (((max_bw) >= MAC_HIDDEN_MAX_BW_NUM) ? 0 : _mac_hidden_max_bw_to_hal_bw_cap[(max_bw)])
#define MAC_HIDDEN_PROTOCOL_NUM 4
extern const u8 _mac_hidden_proto_to_hal_proto_cap[];
#define mac_hidden_proto_to_hal_proto_cap(proto) (((proto) >= MAC_HIDDEN_PROTOCOL_NUM) ? 0 : _mac_hidden_proto_to_hal_proto_cap[(proto)])
u8 mac_hidden_wl_func_to_hal_wl_func(u8 func);
#ifdef PLATFORM_LINUX
u8 rtw_efuse_file_read(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len);
u8 rtw_efuse_file_store(PADAPTER padapter, u8 *filepath, u8 *buf, u32 len);
#ifdef CONFIG_EFUSE_CONFIG_FILE
u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size);
u32 rtw_read_macaddr_from_file(const char *path, u8 *buf);
#endif /* CONFIG_EFUSE_CONFIG_FILE */
#endif /* PLATFORM_LINUX */
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_EVENT_H_
#define _RTW_EVENT_H_
#ifdef CONFIG_H2CLBK
#include <h2clbk.h>
#endif
/*
Used to report a bss has been scanned
*/
struct survey_event {
WLAN_BSSID_EX bss;
};
/*
Used to report that the requested site survey has been done.
bss_cnt indicates the number of bss that has been reported.
*/
struct surveydone_event {
unsigned int bss_cnt;
u8 activate_ch_cnt;
bool acs; /* aim to trigger channel selection */
};
/*
Used to report the link result of joinning the given bss
join_res:
-1: authentication fail
-2: association fail
> 0: TID
*/
struct joinbss_event {
struct wlan_network network;
};
/*
Used to report a given STA has joinned the created BSS.
It is used in AP/Ad-HoC(M) mode.
*/
struct stassoc_event {
unsigned char macaddr[6];
};
struct stadel_event {
unsigned char macaddr[6];
unsigned char rsvd[2]; /* for reason */
unsigned char locally_generated;
int mac_id;
};
struct wmm_event {
unsigned char wmm;
};
#ifdef CONFIG_H2CLBK
struct c2hlbk_event {
unsigned char mac[6];
unsigned short s0;
unsigned short s1;
unsigned int w0;
unsigned char b0;
unsigned short s2;
unsigned char b1;
unsigned int w1;
};
#endif/* CONFIG_H2CLBK */
struct rtw_event {
u32 parmsize;
void (*event_callback)(_adapter *dev, u8 *pbuf);
};
#endif /* _WLANEVENT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_FT_H_
#define __RTW_FT_H_
enum rtw_ieee80211_ft_actioncode {
RTW_WLAN_ACTION_FT_RESV,
RTW_WLAN_ACTION_FT_REQ,
RTW_WLAN_ACTION_FT_RSP,
RTW_WLAN_ACTION_FT_CONF,
RTW_WLAN_ACTION_FT_ACK,
RTW_WLAN_ACTION_FT_MAX,
};
enum _rtw_ft_sta_status {
RTW_FT_UNASSOCIATED_STA = 0,
RTW_FT_AUTHENTICATING_STA,
RTW_FT_AUTHENTICATED_STA,
RTW_FT_ASSOCIATING_STA,
RTW_FT_ASSOCIATED_STA,
RTW_FT_REQUESTING_STA,
RTW_FT_REQUESTED_STA,
RTW_FT_CONFIRMED_STA,
RTW_FT_UNSPECIFIED_STA
};
#define RTW_FT_ACTION_REQ_LMT 4
#define RTW_FT_MAX_IE_SZ 256
#define rtw_ft_chk_status(a, s) \
((a)->mlmepriv.ft_roam.ft_status == (s))
#define rtw_ft_roam_status(a, s) \
((rtw_to_roam(a) > 0) && rtw_ft_chk_status(a, s))
#define rtw_ft_authed_sta(a) \
((rtw_ft_chk_status(a, RTW_FT_AUTHENTICATED_STA)) || \
(rtw_ft_chk_status(a, RTW_FT_ASSOCIATING_STA)) || \
(rtw_ft_chk_status(a, RTW_FT_ASSOCIATED_STA)))
#define rtw_ft_set_status(a, s) \
do { \
((a)->mlmepriv.ft_roam.ft_status = (s)); \
} while (0)
#define rtw_ft_lock_set_status(a, s, irq) \
do { \
_enter_critical_bh(&(a)->mlmepriv.lock, ((_irqL *)(irq))); \
((a)->mlmepriv.ft_roam.ft_status = (s)); \
_exit_critical_bh(&(a)->mlmepriv.lock, ((_irqL *)(irq))); \
} while (0)
#define rtw_ft_reset_status(a) \
do { \
((a)->mlmepriv.ft_roam.ft_status = RTW_FT_UNASSOCIATED_STA); \
} while (0)
enum rtw_ft_capability {
RTW_FT_EN = BIT0,
RTW_FT_OTD_EN = BIT1,
RTW_FT_PEER_EN = BIT2,
RTW_FT_PEER_OTD_EN = BIT3,
RTW_FT_BTM_ROAM = BIT4,
RTW_FT_TEST_RSSI_ROAM = BIT7,
};
#define rtw_ft_chk_flags(a, f) \
((a)->mlmepriv.ft_roam.ft_flags & (f))
#define rtw_ft_set_flags(a, f) \
do { \
((a)->mlmepriv.ft_roam.ft_flags |= (f)); \
} while (0)
#define rtw_ft_clr_flags(a, f) \
do { \
((a)->mlmepriv.ft_roam.ft_flags &= ~(f)); \
} while (0)
#define rtw_ft_roam(a) \
((rtw_to_roam(a) > 0) && rtw_ft_chk_flags(a, RTW_FT_PEER_EN))
#define rtw_ft_valid_akm(a, t) \
((rtw_ft_chk_flags(a, RTW_FT_EN)) && \
(((t) == 3) || ((t) == 4)))
#define rtw_ft_roam_expired(a, r) \
((rtw_chk_roam_flags(a, RTW_ROAM_ON_EXPIRED)) \
&& (r == WLAN_REASON_ACTIVE_ROAM))
#define rtw_ft_otd_roam_en(a) \
((rtw_ft_chk_flags(a, RTW_FT_OTD_EN)) \
&& ((a)->mlmepriv.ft_roam.ft_roam_on_expired == _FALSE) \
&& ((a)->mlmepriv.ft_roam.ft_cap & 0x01))
#define rtw_ft_otd_roam(a) \
rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN)
#define rtw_ft_valid_otd_candidate(a, p) \
((rtw_ft_chk_flags(a, RTW_FT_OTD_EN)) \
&& ((rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) \
&& ((*((p)+4) & 0x01) == 0)) \
|| ((rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) == 0) \
&& (*((p)+4) & 0x01))))
struct ft_roam_info {
u16 mdid;
u8 ft_cap;
/*b0: FT over DS, b1: Resource Req Protocol Cap, b2~b7: Reserved*/
u8 updated_ft_ies[RTW_FT_MAX_IE_SZ];
u16 updated_ft_ies_len;
u8 ft_action[RTW_FT_MAX_IE_SZ];
u16 ft_action_len;
struct cfg80211_ft_event_params ft_event;
u8 ft_roam_on_expired;
u8 ft_flags;
u32 ft_status;
u32 ft_req_retry_cnt;
bool ft_updated_bcn;
};
void rtw_ft_info_init(struct ft_roam_info *pft);
int rtw_ft_proc_flags_get(struct seq_file *m, void *v);
ssize_t rtw_ft_proc_flags_set(struct file *file, const char __user *buffer,
size_t count, loff_t *pos, void *data);
u8 rtw_ft_chk_roaming_candidate(
_adapter *padapter, struct wlan_network *competitor);
void rtw_ft_update_stainfo(_adapter *padapter, WLAN_BSSID_EX *pnetwork);
void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf);
void rtw_ft_validate_akm_type(_adapter *padapter,
struct wlan_network *pnetwork);
void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame);
void rtw_ft_start_clnt_join(_adapter *padapter);
u8 rtw_ft_update_rsnie(
_adapter *padapter, u8 bwrite,
struct pkt_attrib *pattrib, u8 **pframe);
void rtw_ft_build_auth_req_ies(_adapter *padapter,
struct pkt_attrib *pattrib, u8 **pframe);
void rtw_ft_build_assoc_req_ies(_adapter *padapter,
u8 is_reassoc, struct pkt_attrib *pattrib, u8 **pframe);
u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len);
void rtw_ft_start_roam(_adapter *padapter, u8 *pTargetAddr);
void rtw_ft_issue_action_req(_adapter *padapter, u8 *pTargetAddr);
void rtw_ft_report_evt(_adapter *padapter);
void rtw_ft_report_reassoc_evt(_adapter *padapter, u8 *pMacAddr);
void rtw_ft_link_timer_hdl(void *ctx);
void rtw_ft_roam_timer_hdl(void *ctx);
void rtw_ft_roam_status_reset(_adapter *padapter);
#endif /* __RTW_FT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_HT_H_
#define _RTW_HT_H_
#define HT_CAP_IE_LEN 26
#define HT_OP_IE_LEN 22
struct ht_priv {
u8 ht_option;
u8 ampdu_enable;/* for enable Tx A-MPDU */
u8 tx_amsdu_enable;/* for enable Tx A-MSDU */
u8 bss_coexist;/* for 20/40 Bss coexist */
/* u8 baddbareq_issued[16]; */
u32 tx_amsdu_maxlen; /* 1: 8k, 0:4k ; default:8k, for tx */
u32 rx_ampdu_maxlen; /* for rx reordering ctrl win_sz, updated when join_callback. */
u8 rx_ampdu_min_spacing;
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi_20m;
u8 sgi_40m;
/* for processing Tx A-MPDU */
u8 agg_enable_bitmap;
/* u8 ADDBA_retry_count; */
u8 candidate_tid_bitmap;
u8 ldpc_cap;
u8 stbc_cap;
u8 beamform_cap;
u8 smps_cap; /*spatial multiplexing power save mode. 0:static SMPS, 1:dynamic SMPS, 3:SMPS disabled, 2:reserved*/
u8 op_present:1; /* ht_op is present */
struct rtw_ieee80211_ht_cap ht_cap;
u8 ht_op[HT_OP_IE_LEN];
};
#ifdef ROKU_PRIVATE
struct ht_priv_infra_ap {
/*Infra mode, only store AP's info , not intersection of STA and AP*/
u8 channel_width_infra_ap;
u8 sgi_20m_infra_ap;
u8 sgi_40m_infra_ap;
u8 ldpc_cap_infra_ap;
u8 stbc_cap_infra_ap;
u8 MCS_set_infra_ap[16];
u8 Rx_ss_infra_ap;
u16 rx_highest_data_rate_infra_ap;
};
#endif /* ROKU_PRIVATE */
typedef enum AGGRE_SIZE {
HT_AGG_SIZE_8K = 0,
HT_AGG_SIZE_16K = 1,
HT_AGG_SIZE_32K = 2,
HT_AGG_SIZE_64K = 3,
VHT_AGG_SIZE_128K = 4,
VHT_AGG_SIZE_256K = 5,
VHT_AGG_SIZE_512K = 6,
VHT_AGG_SIZE_1024K = 7,
} AGGRE_SIZE_E, *PAGGRE_SIZE_E;
#define LDPC_HT_ENABLE_RX BIT0
#define LDPC_HT_ENABLE_TX BIT1
#define LDPC_HT_TEST_TX_ENABLE BIT2
#define LDPC_HT_CAP_TX BIT3
#define STBC_HT_ENABLE_RX BIT0
#define STBC_HT_ENABLE_TX BIT1
#define STBC_HT_TEST_TX_ENABLE BIT2
#define STBC_HT_CAP_TX BIT3
/* ------------------------------------------------------------
* The HT Control field
* ------------------------------------------------------------ */
#define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+2, 6, 2, _val)
#define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+3, 0, 1, _val)
#define GET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+3, 0, 1)
/* 20/40 BSS Coexist */
#define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val)
#define GET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1)
/* HT Capabilities Info field */
#define HT_CAP_ELE_CAP_INFO(_pEleStart) ((u8 *)(_pEleStart))
#define GET_HT_CAP_ELE_LDPC_CAP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 1)
#define GET_HT_CAP_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 1, 1)
#define GET_HT_CAP_ELE_SM_PS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 2, 2)
#define GET_HT_CAP_ELE_GREENFIELD(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 4, 1)
#define GET_HT_CAP_ELE_SHORT_GI20M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 5, 1)
#define GET_HT_CAP_ELE_SHORT_GI40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 6, 1)
#define GET_HT_CAP_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 7, 1)
#define GET_HT_CAP_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 0, 2)
#define GET_HT_CAP_ELE_DELAYED_BA(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 2, 1)
#define GET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 3, 1)
#define GET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 4, 1)
#define GET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 6, 1)
#define GET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+1, 7, 1)
#define SET_HT_CAP_ELE_LDPC_CAP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 1, _val)
#define SET_HT_CAP_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 1, 1, _val)
#define SET_HT_CAP_ELE_SM_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 2, 2, _val)
#define SET_HT_CAP_ELE_GREENFIELD(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 4, 1, _val)
#define SET_HT_CAP_ELE_SHORT_GI20M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 5, 1, _val)
#define SET_HT_CAP_ELE_SHORT_GI40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 6, 1, _val)
#define SET_HT_CAP_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 7, 1, _val)
#define SET_HT_CAP_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val)
#define SET_HT_CAP_ELE_DELAYED_BA(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val)
#define SET_HT_CAP_ELE_MAX_AMSDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val)
#define SET_HT_CAP_ELE_DSSS_CCK_40M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 4, 1, _val)
#define SET_HT_CAP_ELE_FORTY_INTOLERANT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 6, 1, _val)
#define SET_HT_CAP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 7, 1, _val)
/* A-MPDU Parameters field */
#define HT_CAP_ELE_AMPDU_PARA(_pEleStart) (((u8 *)(_pEleStart))+2)
#define GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 0, 2)
#define GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+2, 2, 3)
#define HT_AMPDU_PARA_FMT "%02x " \
"MAX AMPDU len:%u bytes, MIN MPDU Start Spacing:%u"
#define HT_AMPDU_PARA_ARG(x) \
*((u8 *)(x)) \
, (1 << (13+GET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(((u8 *)x)-2)))-1 \
, GET_HT_CAP_ELE_MIN_MPDU_S_SPACE(((u8 *)x)-2)
#define SET_HT_CAP_ELE_MAX_AMPDU_LEN_EXP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2, _val)
#define SET_HT_CAP_ELE_MIN_MPDU_S_SPACE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 3, _val)
/* Supported MCS Set field */
#define HT_CAP_ELE_SUP_MCS_SET(_pEleStart) (((u8 *)(_pEleStart))+3)
#define HT_CAP_ELE_RX_MCS_MAP(_pEleStart) HT_CAP_ELE_SUP_MCS_SET(_pEleStart)
#define GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(_pEleStart) LE_BITS_TO_2BYTE(((u8 *)(_pEleStart))+13, 0, 10)
#define GET_HT_CAP_ELE_TX_MCS_DEF(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 0, 1)
#define GET_HT_CAP_ELE_TRX_MCS_NEQ(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 1, 1)
#define GET_HT_CAP_ELE_TX_MAX_SS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 2, 2)
#define GET_HT_CAP_ELE_TX_UEQM(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart))+15, 4, 1)
#define HT_RX_MCS_BMP_FMT "%02x %02x %02x %02x %02x%02x%02x%02x%02x%02x"
#define HT_RX_MCS_BMP_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \
((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9]
#define HT_SUP_MCS_SET_FMT HT_RX_MCS_BMP_FMT \
/* "\n%02x%02x%02x%02x%02x%02x" */\
" %uMbps %s%s%s"
#define HT_SUP_MCS_SET_ARG(x) HT_RX_MCS_BMP_ARG(x) \
/*,((u8 *)(x))[10], ((u8 *)(x))[11], ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] */\
, GET_HT_CAP_ELE_RX_HIGHEST_DATA_RATE(((u8 *)x)-3) \
, GET_HT_CAP_ELE_TX_MCS_DEF(((u8 *)x)-3) ? "TX_MCS_DEF " : "" \
, GET_HT_CAP_ELE_TRX_MCS_NEQ(((u8 *)x)-3) ? "TRX_MCS_NEQ " : "" \
, GET_HT_CAP_ELE_TX_UEQM(((u8 *)x)-3) ? "TX_UEQM " : ""
/* TXBF Capabilities */
#define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
#define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
#define SET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 10, 1, ((u8)_val))
#define SET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 15, 2, ((u8)_val))
#define SET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 23, 2, ((u8)_val))
#define SET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 27, 2, ((u8)_val))
#define GET_HT_CAP_TXBF_EXPLICIT_COMP_STEERING_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 10, 1)
#define GET_HT_CAP_TXBF_EXPLICIT_COMP_FEEDBACK_CAP(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 15, 2)
#define GET_HT_CAP_TXBF_COMP_STEERING_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 23, 2)
#define GET_HT_CAP_TXBF_CHNL_ESTIMATION_NUM_ANTENNAS(_pEleStart) LE_BITS_TO_4BYTE(((u8 *)(_pEleStart))+21, 27, 2)
/* HT Operation element */
#define GET_HT_OP_ELE_PRI_CHL(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)), 0, 8)
#define SET_HT_OP_ELE_PRI_CHL(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)), 0, 8, _val)
/* HT Operation Info field */
#define HT_OP_ELE_OP_INFO(_pEleStart) (((u8 *)(_pEleStart)) + 1)
#define GET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2)
#define GET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1)
#define GET_HT_OP_ELE_RIFS_MODE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1)
#define GET_HT_OP_ELE_HT_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2)
#define GET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1)
#define GET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1)
#define GET_HT_OP_ELE_DUAL_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1)
#define GET_HT_OP_ELE_DUAL_CTS(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1)
#define GET_HT_OP_ELE_STBC_BEACON(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1)
#define GET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1)
#define GET_HT_OP_ELE_PCO_ACTIVE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1)
#define GET_HT_OP_ELE_PCO_PHASE(_pEleStart) LE_BITS_TO_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1)
#define SET_HT_OP_ELE_2ND_CHL_OFFSET(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 0, 2, _val)
#define SET_HT_OP_ELE_STA_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 2, 1, _val)
#define SET_HT_OP_ELE_RIFS_MODE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 1, 3, 1, _val)
#define SET_HT_OP_ELE_HT_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 0, 2, _val)
#define SET_HT_OP_ELE_NON_GREEN_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 2, 1, _val)
#define SET_HT_OP_ELE_OBSS_NON_HT_PRESENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 2, 4, 1, _val)
#define SET_HT_OP_ELE_DUAL_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 6, 1, _val)
#define SET_HT_OP_ELE_DUAL_CTS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 4, 7, 1, _val)
#define SET_HT_OP_ELE_STBC_BEACON(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 0, 1, _val)
#define SET_HT_OP_ELE_LSIG_TXOP_PROTECT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 1, 1, _val)
#define SET_HT_OP_ELE_PCO_ACTIVE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 2, 1, _val)
#define SET_HT_OP_ELE_PCO_PHASE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart)) + 5, 3, 1, _val)
#endif /* _RTL871X_HT_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_IO_H_
#define _RTW_IO_H_
#define NUM_IOREQ 8
#ifdef PLATFORM_LINUX
#define MAX_PROT_SZ (64-16)
#endif
#define _IOREADY 0
#define _IO_WAIT_COMPLETE 1
#define _IO_WAIT_RSP 2
/* IO COMMAND TYPE */
#define _IOSZ_MASK_ (0x7F)
#define _IO_WRITE_ BIT(7)
#define _IO_FIXED_ BIT(8)
#define _IO_BURST_ BIT(9)
#define _IO_BYTE_ BIT(10)
#define _IO_HW_ BIT(11)
#define _IO_WORD_ BIT(12)
#define _IO_SYNC_ BIT(13)
#define _IO_CMDMASK_ (0x1F80)
/*
For prompt mode accessing, caller shall free io_req
Otherwise, io_handler will free io_req
*/
/* IO STATUS TYPE */
#define _IO_ERR_ BIT(2)
#define _IO_SUCCESS_ BIT(1)
#define _IO_DONE_ BIT(0)
#define IO_RD32 (_IO_SYNC_ | _IO_WORD_)
#define IO_RD16 (_IO_SYNC_ | _IO_HW_)
#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_)
#define IO_RD32_ASYNC (_IO_WORD_)
#define IO_RD16_ASYNC (_IO_HW_)
#define IO_RD8_ASYNC (_IO_BYTE_)
#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_)
#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_)
#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_)
/*
Only Sync. burst accessing is provided.
*/
#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
/* below is for the intf_option bit defition... */
#define _INTF_ASYNC_ BIT(0) /* support async io */
struct intf_priv;
struct intf_hdl;
struct io_queue;
struct _io_ops {
u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr);
u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr);
u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
u32(*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr);
u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
u32(*_write_scsi)(struct intf_hdl *pintfhdl, u32 cnt, u8 *pmem);
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
#ifdef CONFIG_SDIO_HCI
u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif
};
struct io_req {
_list list;
u32 addr;
volatile u32 val;
u32 command;
u32 status;
u8 *pbuf;
_sema sema;
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt);
u8 *cnxt;
};
struct intf_hdl {
_adapter *padapter;
struct dvobj_priv *pintf_dev;/* pointer to &(padapter->dvobjpriv); */
struct _io_ops io_ops;
};
struct reg_protocol_rd {
#ifdef CONFIG_LITTLE_ENDIAN
/* DW1 */
u32 NumOfTrans:4;
u32 Reserved1:4;
u32 Reserved2:24;
/* DW2 */
u32 ByteCount:7;
u32 WriteEnable:1; /* 0:read, 1:write */
u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
u32 BurstMode:1;
u32 Byte1Access:1;
u32 Byte2Access:1;
u32 Byte4Access:1;
u32 Reserved3:3;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
/* u32 Value; */
#else
/* DW1 */
u32 Reserved1:4;
u32 NumOfTrans:4;
u32 Reserved2:24;
/* DW2 */
u32 WriteEnable:1;
u32 ByteCount:7;
u32 Reserved3:3;
u32 Byte4Access:1;
u32 Byte2Access:1;
u32 Byte1Access:1;
u32 BurstMode:1;
u32 FixOrContinuous:1;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
/* u32 Value; */
#endif
};
struct reg_protocol_wt {
#ifdef CONFIG_LITTLE_ENDIAN
/* DW1 */
u32 NumOfTrans:4;
u32 Reserved1:4;
u32 Reserved2:24;
/* DW2 */
u32 ByteCount:7;
u32 WriteEnable:1; /* 0:read, 1:write */
u32 FixOrContinuous:1; /* 0:continuous, 1: Fix */
u32 BurstMode:1;
u32 Byte1Access:1;
u32 Byte2Access:1;
u32 Byte4Access:1;
u32 Reserved3:3;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
u32 Value;
#else
/* DW1 */
u32 Reserved1:4;
u32 NumOfTrans:4;
u32 Reserved2:24;
/* DW2 */
u32 WriteEnable:1;
u32 ByteCount:7;
u32 Reserved3:3;
u32 Byte4Access:1;
u32 Byte2Access:1;
u32 Byte1Access:1;
u32 BurstMode:1;
u32 FixOrContinuous:1;
u32 Reserved4:16;
/* DW3 */
u32 BusAddress;
/* DW4 */
u32 Value;
#endif
};
#ifdef CONFIG_PCI_HCI
#define MAX_CONTINUAL_IO_ERR 4
#endif
#ifdef CONFIG_USB_HCI
#define MAX_CONTINUAL_IO_ERR 4
#endif
#ifdef CONFIG_SDIO_HCI
#define SD_IO_TRY_CNT (8)
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
#endif
#ifdef CONFIG_GSPI_HCI
#define SD_IO_TRY_CNT (8)
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
#endif
int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj);
void rtw_reset_continual_io_error(struct dvobj_priv *dvobj);
/*
Below is the data structure used by _io_handler
*/
struct io_queue {
_lock lock;
_list free_ioreqs;
_list pending; /* The io_req list that will be served in the single protocol read/write. */
_list processing;
u8 *free_ioreqs_buf; /* 4-byte aligned */
u8 *pallocated_free_ioreqs_buf;
struct intf_hdl intf;
};
struct io_priv {
_adapter *padapter;
struct intf_hdl intf;
};
extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue);
extern void sync_ioreq_enqueue(struct io_req *preq, struct io_queue *ioqueue);
extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue);
extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue);
extern struct io_req *alloc_ioreq(struct io_queue *pio_q);
extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl);
extern void unregister_intf_hdl(struct intf_hdl *pintfhdl);
extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern u8 _rtw_read8(_adapter *adapter, u32 addr);
extern u16 _rtw_read16(_adapter *adapter, u32 addr);
extern u32 _rtw_read32(_adapter *adapter, u32 addr);
extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void _rtw_read_port_cancel(_adapter *adapter);
extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val);
extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val);
extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val);
extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata);
#ifdef CONFIG_SDIO_HCI
u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 _rtw_sd_iread8(_adapter *adapter, u32 addr);
u16 _rtw_sd_iread16(_adapter *adapter, u32 addr);
u32 _rtw_sd_iread32(_adapter *adapter, u32 addr);
int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val);
int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val);
int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val);
extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val);
extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val);
extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms);
extern void _rtw_write_port_cancel(_adapter *adapter);
#ifdef DBG_IO
u32 match_read_sniff(_adapter *adapter, u32 addr, u16 len, u32 val);
u32 match_write_sniff(_adapter *adapter, u32 addr, u16 len, u32 val);
bool match_rf_read_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask);
bool match_rf_write_sniff_ranges(_adapter *adapter, u8 path, u32 addr, u32 mask);
void dbg_rtw_reg_read_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line);
void dbg_rtw_reg_write_monitor(_adapter *adapter, u32 addr, u32 len, u32 val, const char *caller, const int line);
extern u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line);
extern u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line);
extern u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line);
extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line);
#ifdef CONFIG_SDIO_HCI
u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line);
u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line);
u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line);
int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __FUNCTION__, __LINE__)
#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem))
#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem))
#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
#define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__)
#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__)
#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val))
#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val))
#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val))
#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem)
#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem)
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter)
#ifdef CONFIG_SDIO_HCI
#define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__)
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
#define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__)
#define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__)
#define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__)
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#else /* DBG_IO */
#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr))
#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr))
#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr))
#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem))
#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem))
#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter))
#define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val))
#define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val))
#define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val))
#define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data))
#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val))
#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val))
#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val))
#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem))
#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem))
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
#ifdef CONFIG_SDIO_HCI
#define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr))
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
#define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr))
#define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr))
#define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr))
#define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val))
#define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val))
#define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val))
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#endif /* DBG_IO */
extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem);
/* ioreq */
extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval);
extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval);
extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval);
extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val);
extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val);
extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val);
extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void async_write8(_adapter *adapter, u32 addr, u8 val,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern void async_write16(_adapter *adapter, u32 addr, u16 val,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern void async_write32(_adapter *adapter, u32 addr, u32 val,
void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt);
extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops));
extern uint alloc_io_queue(_adapter *adapter);
extern void free_io_queue(_adapter *adapter);
extern void async_bus_io(struct io_queue *pio_q);
extern void bus_sync_io(struct io_queue *pio_q);
extern u32 _ioreq2rwmem(struct io_queue *pio_q);
/*
#define RTL_R8(reg) rtw_read8(padapter, reg)
#define RTL_R16(reg) rtw_read16(padapter, reg)
#define RTL_R32(reg) rtw_read32(padapter, reg)
#define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8)
#define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16)
#define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32)
*/
/*
#define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8)
#define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16)
#define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32)
#define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32)
#define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg)
*/
#define PlatformEFIOWrite1Byte(_a, _b, _c) \
rtw_write8(_a, _b, _c)
#define PlatformEFIOWrite2Byte(_a, _b, _c) \
rtw_write16(_a, _b, _c)
#define PlatformEFIOWrite4Byte(_a, _b, _c) \
rtw_write32(_a, _b, _c)
#define PlatformEFIORead1Byte(_a, _b) \
rtw_read8(_a, _b)
#define PlatformEFIORead2Byte(_a, _b) \
rtw_read16(_a, _b)
#define PlatformEFIORead4Byte(_a, _b) \
rtw_read32(_a, _b)
#endif /* _RTL8711_IO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_IOCTL_H_
#define _RTW_IOCTL_H_
enum oid_type {
QUERY_OID,
SET_OID
};
struct oid_par_priv {
void *adapter_context;
NDIS_OID oid;
void *information_buf;
u32 information_buf_len;
u32 *bytes_rw;
u32 *bytes_needed;
enum oid_type type_of_oid;
u32 dbg;
};
#if defined(PLATFORM_LINUX) && defined(CONFIG_WIRELESS_EXT)
extern struct iw_handler_def rtw_handlers_def;
#endif
extern void rtw_request_wps_pbc_event(_adapter *padapter);
#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
extern int rtw_vendor_ie_get_raw_data(struct net_device *, u32, char *, u32);
extern int rtw_vendor_ie_get_data(struct net_device*, int , char*);
extern int rtw_vendor_ie_get(struct net_device *, struct iw_request_info *, union iwreq_data *, char *);
extern int rtw_vendor_ie_set(struct net_device*, struct iw_request_info*, union iwreq_data*, char*);
#endif
#endif /* #ifndef __INC_CEINFO_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_IOCTL_QUERY_H_
#define _RTW_IOCTL_QUERY_H_
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_IOCTL_SET_H_
#define __RTW_IOCTL_SET_H_
u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode);
u8 rtw_set_802_11_bssid(_adapter *padapter, u8 *bssid);
u8 rtw_set_802_11_add_wep(_adapter *padapter, NDIS_802_11_WEP *wep);
u8 rtw_set_802_11_disassociate(_adapter *padapter);
u8 rtw_set_802_11_bssid_list_scan(_adapter *padapter, struct sitesurvey_parm *pparm);
#ifdef CONFIG_RTW_ACS
u8 rtw_set_acs_sitesurvey(_adapter *adapter);
#endif
u8 rtw_set_802_11_infrastructure_mode(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype, u8 flags);
u8 rtw_set_802_11_ssid(_adapter *padapter, NDIS_802_11_SSID *ssid);
u8 rtw_set_802_11_connect(_adapter *padapter,
u8 *bssid, NDIS_802_11_SSID *ssid, u16 ch);
u8 rtw_validate_bssid(u8 *bssid);
u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid);
u16 rtw_get_cur_max_rate(_adapter *adapter);
int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode);
int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan);
int rtw_set_country(_adapter *adapter, const char *country_code);
int rtw_set_band(_adapter *adapter, u8 band);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_IOL_H_
#define __RTW_IOL_H_
struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter);
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len);
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary);
int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
bool rtw_IOL_applied(ADAPTER *adapter);
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us);
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms);
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame);
#ifdef CONFIG_IOL_NEW_GENERATION
#define IOREG_CMD_END_LEN 4
struct ioreg_cfg {
u8 length;
u8 cmd_id;
u16 address;
u32 data;
u32 mask;
};
enum ioreg_cmd {
IOREG_CMD_LLT = 0x01,
IOREG_CMD_REFUSE = 0x02,
IOREG_CMD_EFUSE_PATH = 0x03,
IOREG_CMD_WB_REG = 0x04,
IOREG_CMD_WW_REG = 0x05,
IOREG_CMD_WD_REG = 0x06,
IOREG_CMD_W_RF = 0x07,
IOREG_CMD_DELAY_US = 0x10,
IOREG_CMD_DELAY_MS = 0x11,
IOREG_CMD_END = 0xFF,
};
void read_efuse_from_txpktbuf(ADAPTER *adapter, int bcnhead, u8 *content, u16 *size);
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask);
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask);
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask);
int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask);
#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), (mask))
#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), (mask))
#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value, mask) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), (mask))
#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value, mask) _rtw_IOL_append_WRF_cmd((xmit_frame), (rf_path), (addr), (value), (mask))
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame);
void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter, int buf_len, u8 *pbuf);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp {
u16 addr;
u32 value;
};
#endif
#else /* CONFIG_IOL_NEW_GENERATION */
typedef struct _io_offload_cmd {
u8 rsvd0;
u8 cmd;
u16 address;
u32 value;
} IO_OFFLOAD_CMD, IOL_CMD;
#define IOL_CMD_LLT 0x00
/* #define IOL_CMD_R_EFUSE 0x01 */
#define IOL_CMD_WB_REG 0x02
#define IOL_CMD_WW_REG 0x03
#define IOL_CMD_WD_REG 0x04
/* #define IOL_CMD_W_RF 0x05 */
#define IOL_CMD_DELAY_US 0x80
#define IOL_CMD_DELAY_MS 0x81
/* #define IOL_CMD_DELAY_S 0x82 */
#define IOL_CMD_END 0x83
/*****************************************************
CMD Address Value
(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB)
******************************************************
IOL_CMD_LLT - B7: PGBNDY
IOL_CMD_R_EFUSE - -
IOL_CMD_WB_REG 0x0~0xFFFF B7
IOL_CMD_WW_REG 0x0~0xFFFF B6~B7
IOL_CMD_WD_REG 0x0~0xFFFF B4~B7
IOL_CMD_W_RF RF Reg B5~B7
IOL_CMD_DELAY_US - B6~B7
IOL_CMD_DELAY_MS - B6~B7
IOL_CMD_DELAY_S - B6~B7
IOL_CMD_END - -
******************************************************/
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value);
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value);
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value);
int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms);
int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms);
#ifdef DBG_IO
int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line);
int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line);
int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line);
#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__)
#else
#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value))
#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value))
#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value))
#endif /* DBG_IO */
#endif /* CONFIG_IOL_NEW_GENERATION */
#endif /* __RTW_IOL_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MBO_H_
#define __RTW_MBO_H_
#define rtw_mbo_wifi_logo_test(a) ((a->registrypriv.wifi_spec) == 1)
#define rtw_mbo_set_ext_cap_internw(_pEleStart, _val) \
SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+3, 7, 1, _val)
#define rtw_mbo_wnm_notification_req(c, a) \
(((c) == RTW_WLAN_CATEGORY_WNM) && \
(((a) == RTW_WLAN_ACTION_WNM_NOTIF_REQ)))
/* IEEE Std 802.11-2016 Table 9-46 - Status codes */
#define RTW_ASSOC_DENIED_NO_MORE_STAS 17
#define RTW_ASSOC_REFUSED_TEMPORARILY 30
/* MBO-OCE Information Element */
#define RTW_MBO_EID WLAN_EID_VENDOR_SPECIFIC
#define RTW_MBO_OUI 0x506F9A
#define RTW_MBO_OUI_TYPE 0x16
/* Non-preferred Channel Report */
#define RTW_MBO_ATTR_NPREF_CH_RPT_ID 0x2
/* Cellular Data Capabilities */
#define RTW_MBO_ATTR_CELL_DATA_CAP_ID 0x3
/* Association Disallowed */
#define RTW_MBO_ATTR_ASSOC_DISABLED_ID 0x4
/* Transition Reason Code */
#define RTW_MBO_ATTR_TRANS_RES_ID 0x6
/* Transition Rejection Reason Code */
#define RTW_MBO_ATTR_TRANS_REJ_ID 0x7
/* Association Retry Delay */
#define RTW_MBO_ATTR_TASSOC_RETRY_ID 0x8
#define RTW_MBO_MAX_CH_LIST_NUM MAX_CHANNEL_NUM
#define RTW_MBO_MAX_CH_RPT_NUM 32
struct npref_ch {
u8 op_class;
u8 chs[RTW_MBO_MAX_CH_LIST_NUM];
size_t nm_of_ch;
u8 preference;
u8 reason;
};
struct npref_ch_rtp {
struct npref_ch ch_rpt[RTW_MBO_MAX_CH_RPT_NUM];
size_t nm_of_rpt;
};
void rtw_mbo_build_cell_data_cap_attr(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
void rtw_mbo_update_ie_data(
_adapter *padapter, u8 *pie, u32 ie_len);
void rtw_mbo_build_supp_op_class_elem(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
void rtw_mbo_build_npref_ch_rpt_attr(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
void rtw_mbo_build_trans_reject_reason_attr(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib, u8 *pres);
u8 rtw_mbo_disallowed_network(struct wlan_network *pnetwork);
void rtw_mbo_build_exented_cap(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
ssize_t rtw_mbo_proc_non_pref_chans_set(
struct file *pfile, const char __user *buffer,
size_t count, loff_t *pos, void *pdata);
int rtw_mbo_proc_non_pref_chans_get(
struct seq_file *m, void *v);
ssize_t rtw_mbo_proc_cell_data_set(
struct file *pfile, const char __user *buffer,
size_t count, loff_t *pos, void *pdata);
int rtw_mbo_proc_cell_data_get(
struct seq_file *m, void *v);
void rtw_mbo_wnm_notification_parsing(
_adapter *padapter, const u8 *pdata, size_t data_len);
void rtw_mbo_build_wnm_notification(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
void rtw_mbo_build_probe_req_ies(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
void rtw_mbo_build_assoc_req_ies(
_adapter *padapter, u8 **pframe, struct pkt_attrib *pattrib);
#endif /* __RTW_MBO_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifdef CONFIG_MCC_MODE
#ifndef _RTW_MCC_H_
#define _RTW_MCC_H_
#include <drv_types.h> /* PADAPTER */
#define MCC_STATUS_PROCESS_MCC_START_SETTING BIT0
#define MCC_STATUS_PROCESS_MCC_STOP_SETTING BIT1
#define MCC_STATUS_NEED_MCC BIT2
#define MCC_STATUS_DOING_MCC BIT3
#define MCC_SWCH_FW_EARLY_TIME 10 /* ms */
#define MCC_EXPIRE_TIME 50 /* ms */
#define MCC_TOLERANCE_TIME 2 /* 2*2 = 4s */
#define MCC_UPDATE_PARAMETER_THRESHOLD 5 /* ms */
#define MCC_ROLE_STA_GC_MGMT_QUEUE_MACID 0
#define MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID 1
/* Lower for stop, Higher for start */
#define MCC_SETCMD_STATUS_STOP_DISCONNECT 0x0
#define MCC_SETCMD_STATUS_STOP_SCAN_START 0x1
#define MCC_SETCMD_STATUS_START_CONNECT 0x80
#define MCC_SETCMD_STATUS_START_SCAN_DONE 0x81
/*
* depenad platform or customer requirement(TP unit:Mbps),
* must be provided by PM or sales or product document
* too large value means not to limit tx bytes (current for ap mode)
* NOTE: following values ref from test results
*/
#define MCC_AP_BW20_TARGET_TX_TP (300)
#define MCC_AP_BW40_TARGET_TX_TP (300)
#define MCC_AP_BW80_TARGET_TX_TP (300)
#define MCC_STA_BW20_TARGET_TX_TP (35)
#define MCC_STA_BW40_TARGET_TX_TP (70)
#define MCC_STA_BW80_TARGET_TX_TP (140)
#define MCC_SINGLE_TX_CRITERIA 5 /* Mbps */
#define MAX_MCC_NUM 2
#ifdef CONFIG_RTL8822C
#define DBG_MCC_REG_NUM 3
#else
#define DBG_MCC_REG_NUM 4
#endif
#define DBG_MCC_RF_REG_NUM 1
#define MCC_STOP(adapter) (adapter->mcc_adapterpriv.mcc_tx_stop)
#define MCC_EN(adapter) (adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc)
#define adapter_to_mccobjpriv(adapter) (&(adapter_to_dvobj(adapter)->mcc_objpriv))
#define SET_MCC_EN_FLAG(adapter, flag)\
do { \
adapter_to_dvobj(adapter)->mcc_objpriv.en_mcc = (flag); \
} while (0)
#define SET_MCC_DURATION(adapter, val)\
do { \
adapter_to_dvobj(adapter)->mcc_objpriv.duration = (val); \
} while (0)
#define SET_MCC_RUNTIME_DURATION(adapter, flag)\
do { \
adapter_to_dvobj(adapter)->mcc_objpriv.enable_runtime_duration = (flag); \
} while (0)
#define SET_MCC_PHYDM_OFFLOAD(adapter, flag)\
do { \
adapter_to_dvobj(adapter)->mcc_objpriv.mcc_phydm_offload = (flag); \
} while (0)
#ifdef CONFIG_MCC_PHYDM_OFFLOAD
enum mcc_cfg_phydm_ops {
MCC_CFG_PHYDM_OFFLOAD = 0,
MCC_CFG_PHYDM_RF_CH,
MCC_CFG_PHYDM_ADD_CLIENT,
MCC_CFG_PHYDM_REMOVE_CLIENT,
MCC_CFG_PHYDM_START,
MCC_CFG_PHYDM_STOP,
MCC_CFG_PHYDM_DUMP,
MCC_CFG_PHYDM_MAX,
};
#endif
enum rtw_mcc_cmd_id {
MCC_CMD_WK_CID = 0,
MCC_SET_DURATION_WK_CID,
MCC_GET_DBG_REG_WK_CID,
#ifdef CONFIG_MCC_PHYDM_OFFLOAD
MCC_SET_PHYDM_OFFLOAD_WK_CID,
#endif
};
/* Represent Channel Tx Null setting */
enum mcc_channel_tx_null {
MCC_ENABLE_TX_NULL = 0,
MCC_DISABLE_TX_NULL = 1,
};
/* Represent C2H Report setting */
enum mcc_c2h_report {
MCC_C2H_REPORT_DISABLE = 0,
MCC_C2H_REPORT_FAIL_STATUS = 1,
MCC_C2H_REPORT_ALL_STATUS = 2,
};
/* Represent Channel Scan */
enum mcc_channel_scan {
MCC_CHIDX = 0,
MCC_SCANCH_RSVD_LOC = 1,
};
/* Represent FW status report of channel switch */
enum mcc_status_rpt {
MCC_RPT_SUCCESS = 0,
MCC_RPT_TXNULL_FAIL = 1,
MCC_RPT_STOPMCC = 2,
MCC_RPT_READY = 3,
MCC_RPT_SWICH_CHANNEL_NOTIFY = 7,
MCC_RPT_UPDATE_NOA_START_TIME = 8,
MCC_RPT_TSF = 9,
MCC_RPT_MAX,
};
enum mcc_role {
MCC_ROLE_STA = 0,
MCC_ROLE_AP = 1,
MCC_ROLE_GC = 2,
MCC_ROLE_GO = 3,
MCC_ROLE_MAX,
};
struct mcc_iqk_backup {
u16 TX_X;
u16 TX_Y;
u16 RX_X;
u16 RX_Y;
};
enum mcc_duration_setting {
MCC_DURATION_MAPPING = 0,
MCC_DURATION_DIRECET = 1,
};
enum mcc_sched_mode {
MCC_FAIR_SCHEDULE = 0,
MCC_FAVOR_STA = 1,
MCC_FAVOR_P2P = 2,
};
/* mcc data for adapter */
struct mcc_adapter_priv {
u8 order; /* FW document, softap/AP must be 0 */
enum mcc_role role; /* MCC role(AP,STA,GO,GC) */
u8 mcc_duration; /* channel stay period, UNIT:1TU */
/* flow control */
u8 mcc_tx_stop; /* check if tp stop or not */
u8 mcc_tp_limit; /* check if tp limit or not */
u32 mcc_target_tx_bytes_to_port; /* customer require */
u32 mcc_tx_bytes_to_port; /* already tx to tx fifo (write port) */
/* data from kernel to check if enqueue data or netif stop queue */
u32 mcc_tp;
u64 mcc_tx_bytes_from_kernel;
u64 mcc_last_tx_bytes_from_kernel;
/* Backup IQK value for MCC */
struct mcc_iqk_backup mcc_iqk_arr[MAX_RF_PATH];
/* mgmt queue macid to avoid RA issue */
u8 mgmt_queue_macid;
/* set macid bitmap to let fw know which macid should be tx pause */
/* all interface share total 16 macid */
u16 mcc_macid_bitmap;
/* use for NoA start time (unit: mircoseconds) */
u32 noa_start_time;
u8 p2p_go_noa_ie[MAX_P2P_IE_LEN];
u32 p2p_go_noa_ie_len;
u64 tsf;
#ifdef CONFIG_TDLS
u8 backup_tdls_en;
#endif /* CONFIG_TDLS */
u8 null_early;
u8 null_rty_num;
};
struct mcc_obj_priv {
u8 en_mcc; /* enable MCC or not */
u8 duration; /* store duration(%) from registry, for primary adapter */
u8 interval;
u8 start_time;
u8 mcc_c2h_status;
u8 cur_mcc_success_cnt; /* used for check mcc switch channel success */
u8 prev_mcc_success_cnt; /* used for check mcc switch channel success */
u8 mcc_tolerance_time; /* used for detect mcc switch channel success */
u8 mcc_loc_rsvd_paga[MAX_MCC_NUM]; /* mcc rsvd page */
u8 mcc_status; /* mcc status stop or start .... */
u8 policy_index;
u8 mcc_stop_threshold;
u8 current_order;
u8 last_tsfdiff;
systime mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */
_mutex mcc_mutex;
_lock mcc_lock;
PADAPTER iface[MAX_MCC_NUM]; /* by order, use for mcc parameter cmd */
struct submit_ctx mcc_sctx;
struct submit_ctx mcc_tsf_req_sctx;
_mutex mcc_tsf_req_mutex;
u8 mcc_tsf_req_sctx_order; /* record current order for mcc_tsf_req_sctx */
#ifdef CONFIG_MCC_MODE_V2
u8 mcc_iqk_value_rsvd_page[3];
#endif /* CONFIG_MCC_MODE_V2 */
u8 mcc_pwr_idx_rsvd_page[MAX_MCC_NUM];
u8 enable_runtime_duration;
/* for LG */
u8 mchan_sched_mode;
_mutex mcc_dbg_reg_mutex;
u32 dbg_reg[DBG_MCC_REG_NUM];
u32 dbg_reg_val[DBG_MCC_REG_NUM];
u32 dbg_rf_reg[DBG_MCC_RF_REG_NUM];
u32 dbg_rf_reg_val[DBG_MCC_RF_REG_NUM][MAX_RF_PATH];
u8 mcc_phydm_offload;
};
/* backup IQK val */
void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter);
/* check mcc status */
u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status);
/* set mcc status */
void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status);
/* clear mcc status */
void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status);
/* dl mcc rsvd page */
u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index
, u8 tx_desc, u32 page_size, u8 *total_page_num, RSVDPAGE_LOC *rsvd_page_loc, u8 *page_num);
/* handle C2H */
void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf);
/* switch channel successfully or not */
void rtw_hal_mcc_sw_status_check(PADAPTER padapter);
/* change some scan flags under site survey */
u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset);
/* record data kernel TX to driver to check MCC concurrent TX */
void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len);
/* record data to port to let driver do flow ctrl */
void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len);
/* check stop write port or not */
u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter);
u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter);
u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter);
u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_grouped);
u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter);
u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter);
u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow);
void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj);
void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib);
u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg);
void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode);
u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len);
void rtw_hal_dump_mcc_policy_table(void *sel);
void rtw_hal_mcc_update_macid_bitmap(PADAPTER padapter, int mac_id, u8 add);
void rtw_hal_mcc_process_noa(PADAPTER padapter);
void rtw_hal_mcc_parameter_init(PADAPTER padapter);
u8 rtw_mcc_cmd_hdl(PADAPTER adapter, u8 type, const u8 *val);
u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val);
#ifdef CONFIG_MCC_PHYDM_OFFLOAD
u8 rtw_set_mcc_phydm_offload_enable_cmd(PADAPTER adapter, u8 enable, u8 enqueue);
#endif /* CONFIG_MCC_PHYDM_OFFLOAD */
#endif /* _RTW_MCC_H_ */
#endif /* CONFIG_MCC_MODE */

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MEM_H__
#define __RTW_MEM_H__
#include <drv_conf.h>
#include <basic_types.h>
#include <osdep_service.h>
u16 rtw_rtkm_get_buff_size(void);
u8 rtw_rtkm_get_nr_recv_skb(void);
struct u8 *rtw_alloc_revcbuf_premem(void);
struct sk_buff *rtw_alloc_skb_premem(u16 in_size);
int rtw_free_skb_premem(struct sk_buff *pskb);
#endif /* __RTW_MEM_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_MI_H_
#define __RTW_MI_H_
void rtw_mi_update_union_chan_inf(_adapter *adapter, u8 ch, u8 offset , u8 bw);
u8 rtw_mi_stayin_union_ch_chk(_adapter *adapter);
u8 rtw_mi_stayin_union_band_chk(_adapter *adapter);
int rtw_mi_get_ch_setting_union_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, u8 *ch, u8 *bw, u8 *offset);
int rtw_mi_get_ch_setting_union(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset);
int rtw_mi_get_ch_setting_union_no_self(_adapter *adapter, u8 *ch, u8 *bw, u8 *offset);
struct mi_state {
u8 sta_num; /* WIFI_STATION_STATE */
u8 ld_sta_num; /* WIFI_STATION_STATE && WIFI_ASOC_STATE */
u8 lg_sta_num; /* WIFI_STATION_STATE && WIFI_UNDER_LINKING */
#ifdef CONFIG_TDLS
u8 ld_tdls_num; /* adapter.tdlsinfo.link_established */
#endif
#ifdef CONFIG_AP_MODE
u8 ap_num; /* WIFI_AP_STATE && WIFI_ASOC_STATE */
u8 starting_ap_num; /*WIFI_FW_AP_STATE*/
u8 ld_ap_num; /* WIFI_AP_STATE && WIFI_ASOC_STATE && asoc_sta_count > 2 */
#endif
u8 adhoc_num; /* (WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) && WIFI_ASOC_STATE */
u8 ld_adhoc_num; /* (WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE) && WIFI_ASOC_STATE && asoc_sta_count > 2 */
#ifdef CONFIG_RTW_MESH
u8 mesh_num; /* WIFI_MESH_STATE && WIFI_ASOC_STATE */
u8 ld_mesh_num; /* WIFI_MESH_STATE && WIFI_ASOC_STATE && asoc_sta_count > 2 */
#endif
u8 scan_num; /* WIFI_UNDER_SURVEY */
u8 scan_enter_num; /* WIFI_UNDER_SURVEY && !SCAN_DISABLE && !SCAN_BACK_OP */
u8 uwps_num; /* WIFI_UNDER_WPS */
#ifdef CONFIG_IOCTL_CFG80211
u8 roch_num;
u8 mgmt_tx_num;
#endif
#ifdef CONFIG_P2P
u8 p2p_device_num;
u8 p2p_gc;
u8 p2p_go;
#endif
};
#define MSTATE_STA_NUM(_mstate) ((_mstate)->sta_num)
#define MSTATE_STA_LD_NUM(_mstate) ((_mstate)->ld_sta_num)
#define MSTATE_STA_LG_NUM(_mstate) ((_mstate)->lg_sta_num)
#ifdef CONFIG_TDLS
#define MSTATE_TDLS_LD_NUM(_mstate) ((_mstate)->ld_tdls_num)
#else
#define MSTATE_TDLS_LD_NUM(_mstate) 0
#endif
#ifdef CONFIG_AP_MODE
#define MSTATE_AP_NUM(_mstate) ((_mstate)->ap_num)
#define MSTATE_AP_STARTING_NUM(_mstate) ((_mstate)->starting_ap_num)
#define MSTATE_AP_LD_NUM(_mstate) ((_mstate)->ld_ap_num)
#else
#define MSTATE_AP_NUM(_mstate) 0
#define MSTATE_AP_STARTING_NUM(_mstate) 0
#define MSTATE_AP_LD_NUM(_mstate) 0
#endif
#define MSTATE_ADHOC_NUM(_mstate) ((_mstate)->adhoc_num)
#define MSTATE_ADHOC_LD_NUM(_mstate) ((_mstate)->ld_adhoc_num)
#ifdef CONFIG_RTW_MESH
#define MSTATE_MESH_NUM(_mstate) ((_mstate)->mesh_num)
#define MSTATE_MESH_LD_NUM(_mstate) ((_mstate)->ld_mesh_num)
#else
#define MSTATE_MESH_NUM(_mstate) 0
#define MSTATE_MESH_LD_NUM(_mstate) 0
#endif
#define MSTATE_SCAN_NUM(_mstate) ((_mstate)->scan_num)
#define MSTATE_SCAN_ENTER_NUM(_mstate) ((_mstate)->scan_enter_num)
#define MSTATE_WPS_NUM(_mstate) ((_mstate)->uwps_num)
#if defined(CONFIG_IOCTL_CFG80211)
#define MSTATE_ROCH_NUM(_mstate) ((_mstate)->roch_num)
#else
#define MSTATE_ROCH_NUM(_mstate) 0
#endif
#ifdef CONFIG_P2P
#define MSTATE_P2P_DV_NUM(_mstate) ((_mstate)->p2p_device_num)
#define MSTATE_P2P_GC_NUM(_mstate) ((_mstate)->p2p_gc)
#define MSTATE_P2P_GO_NUM(_mstate) ((_mstate)->p2p_go)
#else
#define MSTATE_P2P_DV_NUM(_mstate) 0
#define MSTATE_P2P_GC_NUM(_mstate) 0
#define MSTATE_P2P_GO_NUM(_mstate) 0
#endif
#if defined(CONFIG_IOCTL_CFG80211)
#define MSTATE_MGMT_TX_NUM(_mstate) ((_mstate)->mgmt_tx_num)
#else
#define MSTATE_MGMT_TX_NUM(_mstate) 0
#endif
#define rtw_mi_get_union_chan(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_ch) : (adapter_to_dvobj(adapter)->union_ch_bak))
#define rtw_mi_get_union_bw(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_bw) : (adapter_to_dvobj(adapter)->union_bw_bak))
#define rtw_mi_get_union_offset(adapter) ((adapter_to_dvobj(adapter)->union_ch) ? (adapter_to_dvobj(adapter)->union_offset) : (adapter_to_dvobj(adapter)->union_offset_bak))
#define rtw_mi_get_assoced_sta_num(adapter) DEV_STA_LD_NUM(adapter_to_dvobj(adapter))
#define rtw_mi_get_ap_num(adapter) DEV_AP_NUM(adapter_to_dvobj(adapter))
#define rtw_mi_get_mesh_num(adapter) DEV_MESH_NUM(adapter_to_dvobj(adapter))
u8 rtw_mi_get_assoc_if_num(_adapter *adapter);
/* For now, not return union_ch/bw/offset */
void rtw_mi_status_by_ifbmp(struct dvobj_priv *dvobj, u8 ifbmp, struct mi_state *mstate);
void rtw_mi_status(_adapter *adapter, struct mi_state *mstate);
void rtw_mi_status_no_self(_adapter *adapter, struct mi_state *mstate);
void rtw_mi_status_no_others(_adapter *adapter, struct mi_state *mstate);
/* For now, not handle union_ch/bw/offset */
void rtw_mi_status_merge(struct mi_state *d, struct mi_state *a);
void rtw_mi_update_iface_status(struct mlme_priv *pmlmepriv, sint state);
u8 rtw_mi_netif_stop_queue(_adapter *padapter);
u8 rtw_mi_buddy_netif_stop_queue(_adapter *padapter);
u8 rtw_mi_netif_wake_queue(_adapter *padapter);
u8 rtw_mi_buddy_netif_wake_queue(_adapter *padapter);
u8 rtw_mi_netif_carrier_on(_adapter *padapter);
u8 rtw_mi_buddy_netif_carrier_on(_adapter *padapter);
u8 rtw_mi_netif_carrier_off(_adapter *padapter);
u8 rtw_mi_buddy_netif_carrier_off(_adapter *padapter);
u8 rtw_mi_netif_caroff_qstop(_adapter *padapter);
u8 rtw_mi_buddy_netif_caroff_qstop(_adapter *padapter);
u8 rtw_mi_netif_caron_qstart(_adapter *padapter);
u8 rtw_mi_buddy_netif_caron_qstart(_adapter *padapter);
void rtw_mi_scan_abort(_adapter *adapter, bool bwait);
void rtw_mi_buddy_scan_abort(_adapter *adapter, bool bwait);
u32 rtw_mi_start_drv_threads(_adapter *adapter);
u32 rtw_mi_buddy_start_drv_threads(_adapter *adapter);
void rtw_mi_stop_drv_threads(_adapter *adapter);
void rtw_mi_buddy_stop_drv_threads(_adapter *adapter);
void rtw_mi_cancel_all_timer(_adapter *adapter);
void rtw_mi_buddy_cancel_all_timer(_adapter *adapter);
void rtw_mi_reset_drv_sw(_adapter *adapter);
void rtw_mi_buddy_reset_drv_sw(_adapter *adapter);
extern void rtw_intf_start(_adapter *adapter);
extern void rtw_intf_stop(_adapter *adapter);
void rtw_mi_intf_start(_adapter *adapter);
void rtw_mi_buddy_intf_start(_adapter *adapter);
void rtw_mi_intf_stop(_adapter *adapter);
void rtw_mi_buddy_intf_stop(_adapter *adapter);
#ifdef CONFIG_NEW_NETDEV_HDL
u8 rtw_mi_hal_iface_init(_adapter *padapter);
#endif
void rtw_mi_suspend_free_assoc_resource(_adapter *adapter);
void rtw_mi_buddy_suspend_free_assoc_resource(_adapter *adapter);
#ifdef CONFIG_SET_SCAN_DENY_TIMER
void rtw_mi_set_scan_deny(_adapter *adapter, u32 ms);
void rtw_mi_buddy_set_scan_deny(_adapter *adapter, u32 ms);
#else
#define rtw_mi_set_scan_deny(adapter, ms) do {} while (0)
#define rtw_mi_buddy_set_scan_deny(adapter, ms) do {} while (0)
#endif
u8 rtw_mi_is_scan_deny(_adapter *adapter);
u8 rtw_mi_buddy_is_scan_deny(_adapter *adapter);
void rtw_mi_beacon_update(_adapter *padapter);
void rtw_mi_buddy_beacon_update(_adapter *padapter);
#ifndef CONFIG_MI_WITH_MBSSID_CAM
void rtw_mi_hal_dump_macaddr(void *sel, _adapter *padapter);
void rtw_mi_buddy_hal_dump_macaddr(void *sel, _adapter *padapter);
#endif
#ifdef CONFIG_PCI_HCI
void rtw_mi_xmit_tasklet_schedule(_adapter *padapter);
void rtw_mi_buddy_xmit_tasklet_schedule(_adapter *padapter);
#endif
u8 rtw_mi_busy_traffic_check(_adapter *padapter);
u8 rtw_mi_buddy_busy_traffic_check(_adapter *padapter);
u8 rtw_mi_check_mlmeinfo_state(_adapter *padapter, u32 state);
u8 rtw_mi_buddy_check_mlmeinfo_state(_adapter *padapter, u32 state);
u8 rtw_mi_check_fwstate(_adapter *padapter, sint state);
u8 rtw_mi_buddy_check_fwstate(_adapter *padapter, sint state);
enum {
MI_LINKED,
MI_ASSOC,
MI_UNDER_WPS,
MI_AP_MODE,
MI_AP_ASSOC,
MI_ADHOC,
MI_ADHOC_ASSOC,
MI_MESH,
MI_MESH_ASSOC,
MI_STA_NOLINK, /* this is misleading, but not used now */
MI_STA_LINKED,
MI_STA_LINKING,
};
u8 rtw_mi_check_status(_adapter *adapter, u8 type);
void dump_dvobj_mi_status(void *sel, const char *fun_name, _adapter *adapter);
#ifdef DBG_IFACE_STATUS
#define DBG_IFACE_STATUS_DUMP(adapter) dump_dvobj_mi_status(RTW_DBGDUMP, __func__, adapter)
#endif
void dump_mi_status(void *sel, struct dvobj_priv *dvobj);
u8 rtw_mi_traffic_statistics(_adapter *padapter);
u8 rtw_mi_check_miracast_enabled(_adapter *padapter);
#ifdef CONFIG_XMIT_THREAD_MODE
u8 rtw_mi_check_pending_xmitbuf(_adapter *padapter);
u8 rtw_mi_buddy_check_pending_xmitbuf(_adapter *padapter);
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifdef CONFIG_RTL8822B
#include <rtl8822b_hal.h>
#elif defined(CONFIG_RTL8822C)
#include <rtl8822c_hal.h>
#elif defined(CONFIG_RTL8723F)
#include <rtl8723f_hal.h>
#else
extern s32 _dequeue_writeport(PADAPTER padapter);
#endif
u8 rtw_mi_dequeue_writeport(_adapter *padapter);
u8 rtw_mi_buddy_dequeue_writeport(_adapter *padapter);
#endif
void rtw_mi_adapter_reset(_adapter *padapter);
void rtw_mi_buddy_adapter_reset(_adapter *padapter);
u8 rtw_mi_dynamic_check_timer_handlder(_adapter *padapter);
u8 rtw_mi_buddy_dynamic_check_timer_handlder(_adapter *padapter);
extern void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter);
u8 rtw_mi_dynamic_chk_wk_hdl(_adapter *padapter);
u8 rtw_mi_buddy_dynamic_chk_wk_hdl(_adapter *padapter);
u8 rtw_mi_os_xmit_schedule(_adapter *padapter);
u8 rtw_mi_buddy_os_xmit_schedule(_adapter *padapter);
u8 rtw_mi_report_survey_event(_adapter *padapter, union recv_frame *precv_frame);
u8 rtw_mi_buddy_report_survey_event(_adapter *padapter, union recv_frame *precv_frame);
extern void sreset_start_adapter(_adapter *padapter);
extern void sreset_stop_adapter(_adapter *padapter);
u8 rtw_mi_sreset_adapter_hdl(_adapter *padapter, u8 bstart);
u8 rtw_mi_buddy_sreset_adapter_hdl(_adapter *padapter, u8 bstart);
#ifdef CONFIG_AP_MODE
#if defined(DBG_CONFIG_ERROR_RESET) && defined(CONFIG_CONCURRENT_MODE)
void rtw_mi_ap_info_restore(_adapter *adapter);
#endif
u8 rtw_mi_tx_beacon_hdl(_adapter *padapter);
u8 rtw_mi_buddy_tx_beacon_hdl(_adapter *padapter);
u8 rtw_mi_set_tx_beacon_cmd(_adapter *padapter);
u8 rtw_mi_buddy_set_tx_beacon_cmd(_adapter *padapter);
#endif /* CONFIG_AP_MODE */
#ifdef CONFIG_P2P
u8 rtw_mi_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state);
u8 rtw_mi_buddy_p2p_chk_state(_adapter *padapter, enum P2P_STATE p2p_state);
u8 rtw_mi_stay_in_p2p_mode(_adapter *padapter);
u8 rtw_mi_buddy_stay_in_p2p_mode(_adapter *padapter);
#endif
_adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id);
_adapter *rtw_get_iface_by_macddr(_adapter *padapter, const u8 *mac_addr);
_adapter *rtw_get_iface_by_hwport(_adapter *padapter, u8 hw_port);
void rtw_mi_buddy_clone_bcmc_packet(_adapter *padapter, union recv_frame *precvframe, u8 *pphy_status);
#ifdef CONFIG_PCI_HCI
/*API be create temporary for MI, caller is interrupt-handler, PCIE's interrupt handler cannot apply to multi-AP*/
_adapter *rtw_mi_get_ap_adapter(_adapter *padapter);
#endif
u8 rtw_mi_get_ld_sta_ifbmp(_adapter *adapter);
u8 rtw_mi_get_ap_mesh_ifbmp(_adapter *adapter);
void rtw_mi_update_ap_bmc_camid(_adapter *padapter, u8 camid_a, u8 camid_b);
#endif /*__RTW_MI_H_*/

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include/rtw_mlme.h Normal file

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include/rtw_mlme_ext.h Normal file

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@ -0,0 +1,945 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_MP_H_
#define _RTW_MP_H_
#define RTWPRIV_VER_INFO 1
#define MAX_MP_XMITBUF_SZ 2048
#define NR_MP_XMITFRAME 8
#define MP_READ_REG_MAX_OFFSET 0x4FFF
struct mp_xmit_frame {
_list list;
struct pkt_attrib attrib;
_pkt *pkt;
int frame_tag;
_adapter *padapter;
#ifdef CONFIG_USB_HCI
/* insert urb, irp, and irpcnt info below... */
/* max frag_cnt = 8 */
u8 *mem_addr;
u32 sz[8];
u8 bpending[8];
sint ac_tag[8];
sint last[8];
uint irpcnt;
uint fragcnt;
#endif /* CONFIG_USB_HCI */
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
};
struct mp_wiparam {
u32 bcompleted;
u32 act_type;
u32 io_offset;
u32 io_value;
};
typedef void(*wi_act_func)(void *padapter);
struct mp_tx {
u8 stop;
u32 count, sended;
u8 payload;
struct pkt_attrib attrib;
/* struct tx_desc desc; */
/* u8 resvdtx[7]; */
u8 desc[TXDESC_SIZE];
u8 *pallocated_buf;
u8 *buf;
u32 buf_size, write_size;
_thread_hdl_ PktTxThread;
};
#define MP_MAX_LINES 1000
#define MP_MAX_LINES_BYTES 256
typedef struct _RT_PMAC_PKT_INFO {
u8 MCS;
u8 Nss;
u8 Nsts;
u32 N_sym;
u8 SIGA2B3;
} RT_PMAC_PKT_INFO, *PRT_PMAC_PKT_INFO;
typedef struct _RT_PMAC_TX_INFO {
u8 bEnPMacTx:1; /* 0: Disable PMac 1: Enable PMac */
u8 Mode:3; /* 0: Packet TX 3:Continuous TX */
u8 Ntx:4; /* 0-7 */
u8 TX_RATE; /* MPT_RATE_E */
u8 TX_RATE_HEX;
u8 TX_SC;
u8 bSGI:1;
u8 bSPreamble:1;
u8 bSTBC:1;
u8 bLDPC:1;
u8 NDP_sound:1;
u8 BandWidth:3; /* 0: 20 1:40 2:80Mhz */
u8 m_STBC; /* bSTBC + 1 */
u16 PacketPeriod;
u32 PacketCount;
u32 PacketLength;
u8 PacketPattern;
u16 SFD;
u8 SignalField;
u8 ServiceField;
u16 LENGTH;
u8 CRC16[2];
u8 LSIG[3];
u8 HT_SIG[6];
u8 VHT_SIG_A[6];
u8 VHT_SIG_B[4];
u8 VHT_SIG_B_CRC;
u8 VHT_Delimiter[4];
u8 MacAddress[6];
} RT_PMAC_TX_INFO, *PRT_PMAC_TX_INFO;
typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
typedef struct _MPT_CONTEXT {
/* Indicate if we have started Mass Production Test. */
BOOLEAN bMassProdTest;
/* Indicate if the driver is unloading or unloaded. */
BOOLEAN bMptDrvUnload;
_sema MPh2c_Sema;
_timer MPh2c_timeout_timer;
/* Event used to sync H2c for BT control */
BOOLEAN MptH2cRspEvent;
BOOLEAN MptBtC2hEvent;
BOOLEAN bMPh2c_timeout;
/* 8190 PCI does not support NDIS_WORK_ITEM. */
/* Work Item for Mass Production Test. */
/* NDIS_WORK_ITEM MptWorkItem;
* RT_WORK_ITEM MptWorkItem; */
/* Event used to sync the case unloading driver and MptWorkItem is still in progress.
* NDIS_EVENT MptWorkItemEvent; */
/* To protect the following variables.
* NDIS_SPIN_LOCK MptWorkItemSpinLock; */
/* Indicate a MptWorkItem is scheduled and not yet finished. */
BOOLEAN bMptWorkItemInProgress;
/* An instance which implements function and context of MptWorkItem. */
MPT_WORK_ITEM_HANDLER CurrMptAct;
/* 1=Start, 0=Stop from UI. */
u32 MptTestStart;
/* _TEST_MODE, defined in MPT_Req2.h */
u32 MptTestItem;
/* Variable needed in each implementation of CurrMptAct. */
u32 MptActType; /* Type of action performed in CurrMptAct. */
/* The Offset of IO operation is depend of MptActType. */
u32 MptIoOffset;
/* The Value of IO operation is depend of MptActType. */
u32 MptIoValue;
/* The RfPath of IO operation is depend of MptActType. */
u32 mpt_rf_path;
WIRELESS_MODE MptWirelessModeToSw; /* Wireless mode to switch. */
u8 MptChannelToSw; /* Channel to switch. */
u8 MptInitGainToSet; /* Initial gain to set. */
/* u32 bMptAntennaA; */ /* TRUE if we want to use antenna A. */
u32 MptBandWidth; /* bandwidth to switch. */
u32 mpt_rate_index;/* rate index. */
/* Register value kept for Single Carrier Tx test. */
u8 btMpCckTxPower;
/* Register value kept for Single Carrier Tx test. */
u8 btMpOfdmTxPower;
/* For MP Tx Power index */
u8 TxPwrLevel[4]; /* rf-A, rf-B*/
u32 RegTxPwrLimit;
/* Content of RCR Regsiter for Mass Production Test. */
u32 MptRCR;
/* TRUE if we only receive packets with specific pattern. */
BOOLEAN bMptFilterPattern;
/* Rx OK count, statistics used in Mass Production Test. */
u32 MptRxOkCnt;
/* Rx CRC32 error count, statistics used in Mass Production Test. */
u32 MptRxCrcErrCnt;
BOOLEAN bCckContTx; /* TRUE if we are in CCK Continuous Tx test. */
BOOLEAN bOfdmContTx; /* TRUE if we are in OFDM Continuous Tx test. */
/* TRUE if we have start Continuous Tx test. */
BOOLEAN is_start_cont_tx;
/* TRUE if we are in Single Carrier Tx test. */
BOOLEAN bSingleCarrier;
/* TRUE if we are in Carrier Suppression Tx Test. */
BOOLEAN is_carrier_suppression;
/* TRUE if we are in Single Tone Tx test. */
BOOLEAN is_single_tone;
/* ACK counter asked by K.Y.. */
BOOLEAN bMptEnableAckCounter;
u32 MptAckCounter;
/* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */
/* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */
/* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */
/* s32 RfReadLine[2]; */
u8 APK_bound[2]; /* for APK path A/path B */
BOOLEAN bMptIndexEven;
u8 backup0xc50;
u8 backup0xc58;
u8 backup0xc30;
u8 backup0x52_RF_A;
u8 backup0x52_RF_B;
u32 backup0x58_RF_A;
u32 backup0x58_RF_B;
u8 h2cReqNum;
u8 c2hBuf[32];
u8 btInBuf[100];
u32 mptOutLen;
u8 mptOutBuf[100];
RT_PMAC_TX_INFO PMacTxInfo;
RT_PMAC_PKT_INFO PMacPktInfo;
u8 HWTxmode;
BOOLEAN bldpc;
BOOLEAN bstbc;
} MPT_CONTEXT, *PMPT_CONTEXT;
/* #endif */
/* #define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17) */
enum {
WRITE_REG = 1,
READ_REG,
WRITE_RF,
READ_RF,
MP_START,
MP_STOP,
MP_RATE,
MP_CHANNEL,
MP_CHL_OFFSET,
MP_BANDWIDTH,
MP_TXPOWER,
MP_ANT_TX,
MP_ANT_RX,
MP_CTX,
MP_QUERY,
MP_ARX,
MP_PSD,
MP_PWRTRK,
MP_THER,
MP_IOCTL,
EFUSE_GET,
EFUSE_SET,
MP_RESET_STATS,
MP_DUMP,
MP_PHYPARA,
MP_SetRFPathSwh,
MP_QueryDrvStats,
CTA_TEST,
MP_DISABLE_BT_COEXIST,
MP_PwrCtlDM,
MP_GETVER,
MP_MON,
EFUSE_BT_MASK,
EFUSE_MASK,
EFUSE_FILE,
EFUSE_FILE_STORE,
MP_TX,
MP_RX,
MP_IQK,
MP_LCK,
MP_HW_TX_MODE,
MP_GET_TXPOWER_INX,
MP_CUSTOMER_STR,
MP_PWRLMT,
MP_PWRBYRATE,
BT_EFUSE_FILE,
MP_SetBT,
MP_SWRFPath,
MP_LINK,
MP_DPK_TRK,
MP_DPK,
MP_GET_TSSIDE,
MP_SET_TSSIDE,
MP_NULL,
#ifdef CONFIG_APPEND_VENDOR_IE_ENABLE
VENDOR_IE_SET ,
VENDOR_IE_GET ,
#endif
#ifdef CONFIG_WOWLAN
MP_WOW_ENABLE,
MP_WOW_SET_PATTERN,
#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN
MP_WOW_SET_KEEP_ALIVE_PATTERN,
#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/
#endif
#ifdef CONFIG_AP_WOWLAN
MP_AP_WOW_ENABLE,
#endif
MP_SD_IREAD,
MP_SD_IWRITE,
};
struct mp_priv {
_adapter *papdater;
/* Testing Flag */
u32 mode;/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */
u32 prev_fw_state;
/* OID cmd handler */
struct mp_wiparam workparam;
/* u8 act_in_progress; */
/* Tx Section */
u8 TID;
u32 tx_pktcount;
u32 pktInterval;
u32 pktLength;
struct mp_tx tx;
/* Rx Section */
u32 rx_bssidpktcount;
u32 rx_pktcount;
u32 rx_pktcount_filter_out;
u32 rx_crcerrpktcount;
u32 rx_pktloss;
BOOLEAN rx_bindicatePkt;
struct recv_stat rxstat;
BOOLEAN brx_filter_beacon;
/* RF/BB relative */
u8 channel;
u8 bandwidth;
u8 prime_channel_offset;
u8 txpoweridx;
u8 rateidx;
u32 preamble;
/* u8 modem; */
u32 CrystalCap;
/* u32 curr_crystalcap; */
u16 antenna_tx;
u16 antenna_rx;
/* u8 curr_rfpath; */
u8 check_mp_pkt;
u8 bSetTxPower;
/* uint ForcedDataRate; */
u8 mp_dm;
u8 mac_filter[ETH_ALEN];
u8 bmac_filter;
/* RF PATH Setting for WLG WLA BTG BT */
u8 rf_path_cfg;
struct wlan_network mp_network;
NDIS_802_11_MAC_ADDRESS network_macaddr;
u8 *pallocated_mp_xmitframe_buf;
u8 *pmp_xmtframe_buf;
_queue free_mp_xmitqueue;
u32 free_mp_xmitframe_cnt;
BOOLEAN bSetRxBssid;
BOOLEAN bTxBufCkFail;
BOOLEAN bRTWSmbCfg;
BOOLEAN bloopback;
BOOLEAN bloadefusemap;
BOOLEAN bloadBTefusemap;
BOOLEAN bprocess_mp_mode;
MPT_CONTEXT mpt_ctx;
u8 *TXradomBuffer;
u8 CureFuseBTCoex;
u8 mplink_buf[2048];
u32 mplink_rx_len;
BOOLEAN mplink_brx;
BOOLEAN mplink_btx;
bool tssitrk_on;
bool efuse_update_on;
bool efuse_update_file;
char efuse_file_path[128];
};
typedef struct _IOCMD_STRUCT_ {
u8 cmdclass;
u16 value;
u8 index;
} IOCMD_STRUCT;
struct rf_reg_param {
u32 path;
u32 offset;
u32 value;
};
struct bb_reg_param {
u32 offset;
u32 value;
};
typedef struct _MP_FIRMWARE {
FIRMWARE_SOURCE eFWSource;
#ifdef CONFIG_EMBEDDED_FWIMG
u8 *szFwBuffer;
#else
u8 szFwBuffer[0x8000];
#endif
u32 ulFwLength;
} RT_MP_FIRMWARE, *PRT_MP_FIRMWARE;
#define GET_MPPRIV(__padapter) (struct mp_priv*)(&(((struct _ADAPTER*)__padapter)->mppriv))
#define GET_EFUSE_UPDATE_ON(_padapter) (GET_MPPRIV(_padapter)->efuse_update_on)
/* *********************************************************************** */
#define LOWER _TRUE
#define RAISE _FALSE
/* Hardware Registers */
#if 0
#if 0
#define IOCMD_CTRL_REG 0x102502C0
#define IOCMD_DATA_REG 0x102502C4
#else
#define IOCMD_CTRL_REG 0x10250370
#define IOCMD_DATA_REG 0x10250374
#endif
#define IOCMD_GET_THERMAL_METER 0xFD000028
#define IOCMD_CLASS_BB_RF 0xF0
#define IOCMD_BB_READ_IDX 0x00
#define IOCMD_BB_WRITE_IDX 0x01
#define IOCMD_RF_READ_IDX 0x02
#define IOCMD_RF_WRIT_IDX 0x03
#endif
#define BB_REG_BASE_ADDR 0x800
/* MP variables */
#if 0
#define _2MAC_MODE_ 0
#define _LOOPBOOK_MODE_ 1
#endif
typedef enum _MP_MODE_ {
MP_OFF,
MP_ON,
MP_ERR,
MP_CONTINUOUS_TX,
MP_SINGLE_CARRIER_TX,
MP_CARRIER_SUPPRISSION_TX,
MP_SINGLE_TONE_TX,
MP_PACKET_TX,
MP_PACKET_RX
} MP_MODE;
typedef enum _TEST_MODE {
TEST_NONE ,
PACKETS_TX ,
PACKETS_RX ,
CONTINUOUS_TX ,
OFDM_Single_Tone_TX ,
CCK_Carrier_Suppression_TX
} TEST_MODE;
typedef enum _MPT_BANDWIDTH {
MPT_BW_20MHZ = 0,
MPT_BW_40MHZ_DUPLICATE = 1,
MPT_BW_40MHZ_ABOVE = 2,
MPT_BW_40MHZ_BELOW = 3,
MPT_BW_40MHZ = 4,
MPT_BW_80MHZ = 5,
MPT_BW_80MHZ_20_ABOVE = 6,
MPT_BW_80MHZ_20_BELOW = 7,
MPT_BW_80MHZ_20_BOTTOM = 8,
MPT_BW_80MHZ_20_TOP = 9,
MPT_BW_80MHZ_40_ABOVE = 10,
MPT_BW_80MHZ_40_BELOW = 11,
} MPT_BANDWIDTHE, *PMPT_BANDWIDTH;
#define MAX_RF_PATH_NUMS RF_PATH_MAX
extern u8 mpdatarate[NumRates];
/* MP set force data rate base on the definition. */
typedef enum _MPT_RATE_INDEX {
/* CCK rate. */
MPT_RATE_1M = 1 , /* 0 */
MPT_RATE_2M,
MPT_RATE_55M,
MPT_RATE_11M, /* 3 */
/* OFDM rate. */
MPT_RATE_6M, /* 4 */
MPT_RATE_9M,
MPT_RATE_12M,
MPT_RATE_18M,
MPT_RATE_24M,
MPT_RATE_36M,
MPT_RATE_48M,
MPT_RATE_54M, /* 11 */
/* HT rate. */
MPT_RATE_MCS0, /* 12 */
MPT_RATE_MCS1,
MPT_RATE_MCS2,
MPT_RATE_MCS3,
MPT_RATE_MCS4,
MPT_RATE_MCS5,
MPT_RATE_MCS6,
MPT_RATE_MCS7, /* 19 */
MPT_RATE_MCS8,
MPT_RATE_MCS9,
MPT_RATE_MCS10,
MPT_RATE_MCS11,
MPT_RATE_MCS12,
MPT_RATE_MCS13,
MPT_RATE_MCS14,
MPT_RATE_MCS15, /* 27 */
MPT_RATE_MCS16,
MPT_RATE_MCS17, /* #29 */
MPT_RATE_MCS18,
MPT_RATE_MCS19,
MPT_RATE_MCS20,
MPT_RATE_MCS21,
MPT_RATE_MCS22, /* #34 */
MPT_RATE_MCS23,
MPT_RATE_MCS24,
MPT_RATE_MCS25,
MPT_RATE_MCS26,
MPT_RATE_MCS27, /* #39 */
MPT_RATE_MCS28, /* #40 */
MPT_RATE_MCS29, /* #41 */
MPT_RATE_MCS30, /* #42 */
MPT_RATE_MCS31, /* #43 */
/* VHT rate. Total: 20*/
MPT_RATE_VHT1SS_MCS0 = 100,/* #44*/
MPT_RATE_VHT1SS_MCS1, /* # */
MPT_RATE_VHT1SS_MCS2,
MPT_RATE_VHT1SS_MCS3,
MPT_RATE_VHT1SS_MCS4,
MPT_RATE_VHT1SS_MCS5,
MPT_RATE_VHT1SS_MCS6, /* # */
MPT_RATE_VHT1SS_MCS7,
MPT_RATE_VHT1SS_MCS8,
MPT_RATE_VHT1SS_MCS9, /* #53 */
MPT_RATE_VHT2SS_MCS0, /* #54 */
MPT_RATE_VHT2SS_MCS1,
MPT_RATE_VHT2SS_MCS2,
MPT_RATE_VHT2SS_MCS3,
MPT_RATE_VHT2SS_MCS4,
MPT_RATE_VHT2SS_MCS5,
MPT_RATE_VHT2SS_MCS6,
MPT_RATE_VHT2SS_MCS7,
MPT_RATE_VHT2SS_MCS8,
MPT_RATE_VHT2SS_MCS9, /* #63 */
MPT_RATE_VHT3SS_MCS0,
MPT_RATE_VHT3SS_MCS1,
MPT_RATE_VHT3SS_MCS2,
MPT_RATE_VHT3SS_MCS3,
MPT_RATE_VHT3SS_MCS4,
MPT_RATE_VHT3SS_MCS5,
MPT_RATE_VHT3SS_MCS6, /* #126 */
MPT_RATE_VHT3SS_MCS7,
MPT_RATE_VHT3SS_MCS8,
MPT_RATE_VHT3SS_MCS9,
MPT_RATE_VHT4SS_MCS0,
MPT_RATE_VHT4SS_MCS1, /* #131 */
MPT_RATE_VHT4SS_MCS2,
MPT_RATE_VHT4SS_MCS3,
MPT_RATE_VHT4SS_MCS4,
MPT_RATE_VHT4SS_MCS5,
MPT_RATE_VHT4SS_MCS6, /* #136 */
MPT_RATE_VHT4SS_MCS7,
MPT_RATE_VHT4SS_MCS8,
MPT_RATE_VHT4SS_MCS9,
MPT_RATE_LAST
} MPT_RATE_E, *PMPT_RATE_E;
#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
#define MPT_IS_CCK_RATE(_value) (MPT_RATE_1M <= _value && _value <= MPT_RATE_11M)
#define MPT_IS_OFDM_RATE(_value) (MPT_RATE_6M <= _value && _value <= MPT_RATE_54M)
#define MPT_IS_HT_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS31)
#define MPT_IS_HT_1S_RATE(_value) (MPT_RATE_MCS0 <= _value && _value <= MPT_RATE_MCS7)
#define MPT_IS_HT_2S_RATE(_value) (MPT_RATE_MCS8 <= _value && _value <= MPT_RATE_MCS15)
#define MPT_IS_HT_3S_RATE(_value) (MPT_RATE_MCS16 <= _value && _value <= MPT_RATE_MCS23)
#define MPT_IS_HT_4S_RATE(_value) (MPT_RATE_MCS24 <= _value && _value <= MPT_RATE_MCS31)
#define MPT_IS_VHT_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9)
#define MPT_IS_VHT_1S_RATE(_value) (MPT_RATE_VHT1SS_MCS0 <= _value && _value <= MPT_RATE_VHT1SS_MCS9)
#define MPT_IS_VHT_2S_RATE(_value) (MPT_RATE_VHT2SS_MCS0 <= _value && _value <= MPT_RATE_VHT2SS_MCS9)
#define MPT_IS_VHT_3S_RATE(_value) (MPT_RATE_VHT3SS_MCS0 <= _value && _value <= MPT_RATE_VHT3SS_MCS9)
#define MPT_IS_VHT_4S_RATE(_value) (MPT_RATE_VHT4SS_MCS0 <= _value && _value <= MPT_RATE_VHT4SS_MCS9)
#define MPT_IS_2SS_RATE(_rate) ((MPT_RATE_MCS8 <= _rate && _rate <= MPT_RATE_MCS15) || \
(MPT_RATE_VHT2SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT2SS_MCS9))
#define MPT_IS_3SS_RATE(_rate) ((MPT_RATE_MCS16 <= _rate && _rate <= MPT_RATE_MCS23) || \
(MPT_RATE_VHT3SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT3SS_MCS9))
#define MPT_IS_4SS_RATE(_rate) ((MPT_RATE_MCS24 <= _rate && _rate <= MPT_RATE_MCS31) || \
(MPT_RATE_VHT4SS_MCS0 <= _rate && _rate <= MPT_RATE_VHT4SS_MCS9))
typedef enum _POWER_MODE_ {
POWER_LOW = 0,
POWER_NORMAL
} POWER_MODE;
/* The following enumeration is used to define the value of Reg0xD00[30:28] or JaguarReg0x914[18:16]. */
typedef enum _OFDM_TX_MODE {
OFDM_ALL_OFF = 0,
OFDM_ContinuousTx = 1,
OFDM_SingleCarrier = 2,
OFDM_SingleTone = 4,
} OFDM_TX_MODE;
#define RX_PKT_BROADCAST 1
#define RX_PKT_DEST_ADDR 2
#define RX_PKT_PHY_MATCH 3
typedef enum _ENCRY_CTRL_STATE_ {
HW_CONTROL, /* hw encryption& decryption */
SW_CONTROL, /* sw encryption& decryption */
HW_ENCRY_SW_DECRY, /* hw encryption & sw decryption */
SW_ENCRY_HW_DECRY /* sw encryption & hw decryption */
} ENCRY_CTRL_STATE;
typedef enum _MPT_TXPWR_DEF {
MPT_CCK,
MPT_OFDM, /* L and HT OFDM */
MPT_OFDM_AND_HT,
MPT_HT,
MPT_VHT
} MPT_TXPWR_DEF;
#define IS_MPT_HT_RATE(_rate) (_rate >= MPT_RATE_MCS0 && _rate <= MPT_RATE_MCS31)
#define IS_MPT_VHT_RATE(_rate) (_rate >= MPT_RATE_VHT1SS_MCS0 && _rate <= MPT_RATE_VHT4SS_MCS9)
#define IS_MPT_CCK_RATE(_rate) (_rate >= MPT_RATE_1M && _rate <= MPT_RATE_11M)
#define IS_MPT_OFDM_RATE(_rate) (_rate >= MPT_RATE_6M && _rate <= MPT_RATE_54M)
typedef enum _mp_tx_pkt_payload{
MP_TX_Payload_00 = 0,
MP_TX_Payload_a5,
MP_TX_Payload_5a,
MP_TX_Payload_ff,
MP_TX_Payload_prbs9,
MP_TX_Payload_default_random
} mp_tx_pkt_payload;
/*************************************************************************/
#if 0
extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
#endif
extern s32 init_mp_priv(PADAPTER padapter);
extern void free_mp_priv(struct mp_priv *pmp_priv);
extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
extern void MPT_DeInitAdapter(PADAPTER padapter);
extern s32 mp_start_test(PADAPTER padapter);
extern void mp_stop_test(PADAPTER padapter);
extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_mp_set_antdiv(PADAPTER padapter, BOOLEAN bMain);
#endif
void SetChannel(PADAPTER pAdapter);
void SetBandwidth(PADAPTER pAdapter);
int SetTxPower(PADAPTER pAdapter);
void SetAntenna(PADAPTER pAdapter);
void SetDataRate(PADAPTER pAdapter);
void SetAntenna(PADAPTER pAdapter);
s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
void GetThermalMeter(PADAPTER pAdapter, u8 rfpath ,u8 *value);
void SetContinuousTx(PADAPTER pAdapter, u8 bStart);
void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
void SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
void PhySetTxPowerLevel(PADAPTER pAdapter);
void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc);
void SetPacketTx(PADAPTER padapter);
void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB);
void ResetPhyRxPktCount(PADAPTER pAdapter);
u32 GetPhyRxPktReceived(PADAPTER pAdapter);
u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter);
s32 SetPowerTracking(PADAPTER padapter, u8 enable);
void GetPowerTracking(PADAPTER padapter, u8 *enable);
u32 mp_query_psd(PADAPTER pAdapter, u8 *data);
void rtw_mp_trigger_iqk(PADAPTER padapter);
void rtw_mp_trigger_lck(PADAPTER padapter);
void rtw_mp_trigger_dpk(PADAPTER padapter);
u8 rtw_mp_mode_check(PADAPTER padapter);
bool rtw_is_mp_tssitrk_on(_adapter *adapter);
void hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
s32 hal_mpt_SetPowerTracking(PADAPTER padapter, u8 enable);
void hal_mpt_GetPowerTracking(PADAPTER padapter, u8 *enable);
void hal_mpt_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
void hal_mpt_SetChannel(PADAPTER pAdapter);
void hal_mpt_SetBandwidth(PADAPTER pAdapter);
void hal_mpt_SetTxPower(PADAPTER pAdapter);
void hal_mpt_SetDataRate(PADAPTER pAdapter);
void hal_mpt_SetAntenna(PADAPTER pAdapter);
s32 hal_mpt_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
void hal_mpt_TriggerRFThermalMeter(PADAPTER pAdapter);
u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter, u8 rf_path);
void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 rfpath, u8 *value);
void hal_mpt_SetContinuousTx(PADAPTER pAdapter, u8 bStart);
void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
void hal_mpt_SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
void hal_mpt_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
u8 mpt_ProSetPMacTx(PADAPTER Adapter);
void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain);
void mp_phy_switch_rf_path_set(PADAPTER pAdapter , u8 *pstate);
u8 MP_PHY_QueryRFPathSwitch(PADAPTER pAdapter);
u32 mpt_ProQueryCalTxPower(PADAPTER pAdapter, u8 RfPath);
void MPT_PwrCtlDM(PADAPTER padapter, u32 trk_type);
u8 mpt_to_mgnt_rate(u32 MptRateIdx);
u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr);
u32 mp_join(PADAPTER padapter, u8 mode);
u32 hal_mpt_query_phytxok(PADAPTER pAdapter);
u32 mpt_get_tx_power_finalabs_val(PADAPTER padapter, u8 rf_path);
void mpt_trigger_tssi_tracking(PADAPTER pAdapter, u8 rf_path);
void
PMAC_Get_Pkt_Param(
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo
);
void
CCK_generator(
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo
);
void
PMAC_Nsym_generator(
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo
);
void
L_SIG_generator(
u32 N_SYM, /* Max: 750*/
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo
);
void HT_SIG_generator(
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo);
void VHT_SIG_A_generator(
PRT_PMAC_TX_INFO pPMacTxInfo,
PRT_PMAC_PKT_INFO pPMacPktInfo);
void VHT_SIG_B_generator(
PRT_PMAC_TX_INFO pPMacTxInfo);
void VHT_Delimiter_generator(
PRT_PMAC_TX_INFO pPMacTxInfo);
int rtw_mp_write_reg(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_read_reg(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_write_rf(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_read_rf(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_start(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_stop(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_rate(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_channel(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_ch_offset(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_bandwidth(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_txpower_index(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_txpower(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_txpower(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_ant_tx(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_ant_rx(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_set_ctx_destAddr(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_ctx(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_disable_bt_coexist(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_disable_bt_coexist(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_arx(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_trx_query(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_pwrtrk(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_psd(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_thermal(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_reset_stats(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_dump(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_phypara(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_SetRFPath(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_switch_rf_path(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_link(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_QueryDrv(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_PwrCtlDM(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_getver(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_mon(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_pwrlmt(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_pwrbyrate(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_dpk_track(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_dpk(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_efuse_mask_file(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_bt_efuse_mask_file(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_efuse_file_map(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_efuse_file_map_store(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_bt_efuse_file_map(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_SetBT(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra);
int rtw_mp_tx(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_rx(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
int rtw_mp_hwtx(struct net_device *dev,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
u8 HwRateToMPTRate(u8 rate);
int rtw_mp_iqk(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_lck(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_get_tsside(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
int rtw_mp_set_tsside(struct net_device *dev,
struct iw_request_info *info,
struct iw_point *wrqu, char *extra);
#endif /* _RTW_MP_H_ */

1094
include/rtw_mp_phy_regdef.h Normal file

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include/rtw_odm.h Normal file
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/******************************************************************************
*
* Copyright(c) 2013 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_ODM_H__
#define __RTW_ODM_H__
#include <drv_types.h>
#include "../hal/phydm/phydm_types.h"
/*
* This file provides utilities/wrappers for rtw driver to use ODM
*/
typedef enum _HAL_PHYDM_OPS {
HAL_PHYDM_DIS_ALL_FUNC,
HAL_PHYDM_FUNC_SET,
HAL_PHYDM_FUNC_CLR,
HAL_PHYDM_ABILITY_BK,
HAL_PHYDM_ABILITY_RESTORE,
HAL_PHYDM_ABILITY_SET,
HAL_PHYDM_ABILITY_GET,
} HAL_PHYDM_OPS;
#define DYNAMIC_FUNC_DISABLE (0x0)
u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
#define rtw_phydm_func_disable_all(adapter) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
#ifdef CONFIG_RTW_ACS
#define rtw_phydm_func_for_offchannel(adapter) \
do { \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
if (rtw_odm_adaptivity_needed(adapter)) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
if (IS_ACS_ENABLE(adapter))\
rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ENV_MONITOR); \
} while (0)
#else
#define rtw_phydm_func_for_offchannel(adapter) \
do { \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
if (rtw_odm_adaptivity_needed(adapter)) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
} while (0)
#endif
#define rtw_phydm_func_clr(adapter, ability) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
#define rtw_phydm_ability_backup(adapter) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
#define rtw_phydm_ability_restore(adapter) \
rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
static inline u32 rtw_phydm_ability_get(_adapter *adapter)
{
return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
}
void rtw_odm_init_ic_type(_adapter *adapter);
void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter);
bool rtw_odm_adaptivity_needed(_adapter *adapter);
void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter);
void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 th_l2h_ini, s8 th_edcca_hl_diff);
void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter);
void rtw_odm_acquirespinlock(_adapter *adapter, enum rt_spinlock_type type);
void rtw_odm_releasespinlock(_adapter *adapter, enum rt_spinlock_type type);
struct dm_struct;
s16 rtw_odm_get_tx_power_mbm(struct dm_struct *dm, u8 rfpath, u8 rate, u8 bw, u8 cch);
#ifdef CONFIG_DFS_MASTER
void rtw_odm_radar_detect_reset(_adapter *adapter);
void rtw_odm_radar_detect_disable(_adapter *adapter);
void rtw_odm_radar_detect_enable(_adapter *adapter);
BOOLEAN rtw_odm_radar_detect(_adapter *adapter);
void rtw_odm_update_dfs_region(struct dvobj_priv *dvobj);
u8 rtw_odm_radar_detect_polling_int_ms(struct dvobj_priv *dvobj);
#endif /* CONFIG_DFS_MASTER */
void rtw_odm_parse_rx_phy_status_chinfo(union recv_frame *rframe, u8 *phys);
#if defined(CONFIG_RTL8822C) && defined(CONFIG_LPS_PG)
void odm_lps_pg_debug_8822c(void *dm_void);
#endif
#endif /* __RTW_ODM_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_P2P_H_
#define __RTW_P2P_H_
u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 *pssid, u8 ussidlen, u8 *pdev_raddr);
u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code);
u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
#ifdef CONFIG_WFD
int rtw_init_wifi_display_info(_adapter *padapter);
void rtw_wfd_enable(_adapter *adapter, bool on);
void rtw_wfd_set_ctrl_port(_adapter *adapter, u16 port);
void rtw_tdls_wfd_enable(_adapter *adapter, bool on);
u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 tunneled);
u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_invitation_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_invitation_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 rtw_append_beacon_wfd_ie(_adapter *adapter, u8 *pbuf);
u32 rtw_append_probe_req_wfd_ie(_adapter *adapter, u8 *pbuf);
u32 rtw_append_probe_resp_wfd_ie(_adapter *adapter, u8 *pbuf);
u32 rtw_append_assoc_req_wfd_ie(_adapter *adapter, u8 *pbuf);
u32 rtw_append_assoc_resp_wfd_ie(_adapter *adapter, u8 *pbuf);
#endif /*CONFIG_WFD */
void rtw_xframe_chk_wfd_ie(struct xmit_frame *xframe);
u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta);
u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe);
u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len);
int process_p2p_cross_connect_ie(PADAPTER padapter, u8 *IEs, u32 IELength);
s32 p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf);
#ifdef CONFIG_P2P_PS
void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength);
void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state);
u8 p2p_ps_wk_cmd(_adapter *padapter, u8 p2p_ps_state, u8 enqueue);
#endif /* CONFIG_P2P_PS */
#ifdef CONFIG_IOCTL_CFG80211
int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx);
#endif /* CONFIG_IOCTL_CFG80211 */
void reset_global_wifidirect_info(_adapter *padapter);
void rtw_init_wifidirect_timers(_adapter *padapter);
void rtw_init_wifidirect_addrs(_adapter *padapter, u8 *dev_addr, u8 *iface_addr);
void init_wifidirect_info(_adapter *padapter, enum P2P_ROLE role);
int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role);
static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state)
{
if (wdinfo->p2p_state != state) {
/* wdinfo->pre_p2p_state = wdinfo->p2p_state; */
wdinfo->p2p_state = state;
}
}
static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state)
{
if (wdinfo->pre_p2p_state != state)
wdinfo->pre_p2p_state = state;
}
#if 0
static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo)
{
if (wdinfo->pre_p2p_state != -1) {
wdinfo->p2p_state = wdinfo->pre_p2p_state;
wdinfo->pre_p2p_state = -1;
}
}
#endif
void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role);
static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo)
{
return wdinfo->p2p_state;
}
static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo)
{
return wdinfo->pre_p2p_state;
}
static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo)
{
return wdinfo->role;
}
static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state)
{
return wdinfo->p2p_state == state;
}
static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role)
{
return wdinfo->role == role;
}
#ifdef CONFIG_DBG_P2P
void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line);
void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line);
/* void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); */
void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line);
#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__)
#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__)
#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__)
/* #define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) */
#else /* CONFIG_DBG_P2P */
#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state)
#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state)
#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role)
/* #define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) */
#endif /* CONFIG_DBG_P2P */
#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo)
#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo)
#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo)
#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state)
#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role)
#define rtw_p2p_findphase_ex_set(wdinfo, value) \
(wdinfo)->find_phase_state_exchange_cnt = (value)
#ifdef CONFIG_P2P
/* is this find phase exchange for social channel scan? */
#define rtw_p2p_findphase_ex_is_social(wdinfo) \
(wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST
/* should we need find phase exchange anymore? */
#define rtw_p2p_findphase_ex_is_needed(wdinfo) \
((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \
(wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE && \
!(wdinfo)->rx_invitereq_info.scan_op_ch_only && \
!(wdinfo)->p2p_info.scan_op_ch_only)
#else
#define rtw_p2p_findphase_ex_is_social(wdinfo) 0
#define rtw_p2p_findphase_ex_is_needed(wdinfo) 0
#endif /* CONFIG_P2P */
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_PWRCTRL_H_
#define __RTW_PWRCTRL_H_
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
#define FW_PWRMSK 0x7
#define XMIT_ALIVE BIT(0)
#define RECV_ALIVE BIT(1)
#define CMD_ALIVE BIT(2)
#define EVT_ALIVE BIT(3)
#ifdef CONFIG_BT_COEXIST
#define BTCOEX_ALIVE BIT(4)
#endif /* CONFIG_BT_COEXIST */
#define LPS_ALIVE BIT(5)
#ifdef CONFIG_WOWLAN
#ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86
/* TCP/ICMP/UDP multicast with specific IP addr */
#define DEFAULT_PATTERN_NUM 4
#else
/* TCP/ICMP */
#define DEFAULT_PATTERN_NUM 3
#endif
#ifdef CONFIG_WOW_PATTERN_HW_CAM /* Frame Mask Cam number for pattern match */
#define MAX_WKFM_CAM_NUM 12
#else
#define MAX_WKFM_CAM_NUM 16
#endif
#define MAX_WKFM_SIZE 16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */
#define MAX_WKFM_PATTERN_SIZE 128
#define MAX_IN_PATTERN_SIZE 512
/*
* MAX_WKFM_PATTERN_STR_LEN : the max. length of wow pattern string
* e.g. echo 00:01:02:...:7f > /proc/net/rtl88x2bu/wlan0/wow_pattern_info
* - each byte of pattern is represented as 2-bytes ascii : MAX_WKFM_PATTERN_SIZE * 2
* - the number of common ':' in pattern string : MAX_WKFM_PATTERN_SIZE - 1
* - 1 byte '\n'(0x0a) is generated at the end when we use echo command
* so total max. length is (MAX_WKFM_PATTERN_SIZE * 3)
*/
#define MAX_WKFM_PATTERN_STR_LEN (MAX_WKFM_PATTERN_SIZE * 3)
#define WKFMCAM_ADDR_NUM 6
#define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */
enum pattern_type {
PATTERN_BROADCAST = 0,
PATTERN_MULTICAST,
PATTERN_UNICAST,
PATTERN_VALID,
PATTERN_INVALID,
};
typedef struct rtl_priv_pattern {
int len;
char content[MAX_WKFM_PATTERN_SIZE];
char mask[MAX_WKFM_SIZE];
} rtl_priv_pattern_t;
#endif /* CONFIG_WOWLAN */
enum Power_Mgnt {
PS_MODE_ACTIVE = 0 ,
PS_MODE_MIN ,
PS_MODE_MAX ,
PS_MODE_DTIM , /* PS_MODE_SELF_DEFINED */
PS_MODE_VOIP ,
PS_MODE_UAPSD_WMM ,
PS_MODE_UAPSD ,
PS_MODE_IBSS ,
PS_MODE_WWLAN ,
PM_Radio_Off ,
PM_Card_Disable ,
PS_MODE_NUM,
};
enum lps_level {
LPS_NORMAL = 0,
LPS_LCLK,
LPS_PG,
LPS_LEVEL_MAX,
};
#ifdef CONFIG_PNO_SUPPORT
#define MAX_PNO_LIST_COUNT 16
#define MAX_SCAN_LIST_COUNT 14 /* 2.4G only */
#define MAX_HIDDEN_AP 8 /* 8 hidden AP */
#endif
/*
BIT[2:0] = HW state
BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state
BIT[4] = sub-state
*/
#define PS_DPS BIT(0)
#define PS_LCLK (PS_DPS)
#define PS_RF_OFF BIT(1)
#define PS_ALL_ON BIT(2)
#define PS_ST_ACTIVE BIT(3)
#define PS_ISR_ENABLE BIT(4)
#define PS_IMR_ENABLE BIT(5)
#define PS_ACK BIT(6)
#define PS_TOGGLE BIT(7)
#define PS_STATE_MASK (0x0F)
#define PS_STATE_HW_MASK (0x07)
#define PS_SEQ_MASK (0xc0)
#define PS_STATE(x) (PS_STATE_MASK & (x))
#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
#define PS_SEQ(x) (PS_SEQ_MASK & (x))
#define PS_STATE_S0 (PS_DPS)
#define PS_STATE_S1 (PS_LCLK)
#define PS_STATE_S2 (PS_RF_OFF)
#define PS_STATE_S3 (PS_ALL_ON)
#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; /* the CPWM value */
unsigned short rsvd;
};
typedef _sema _pwrlock;
__inline static void _init_pwrlock(_pwrlock *plock)
{
_rtw_init_sema(plock, 1);
}
__inline static void _free_pwrlock(_pwrlock *plock)
{
_rtw_free_sema(plock);
}
__inline static void _enter_pwrlock(_pwrlock *plock)
{
_rtw_down_sema(plock);
}
__inline static void _exit_pwrlock(_pwrlock *plock)
{
_rtw_up_sema(plock);
}
#define LPS_DELAY_MS 1000 /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define EXE_PWR_LPS 0x04
/* RF state. */
typedef enum _rt_rf_power_state {
rf_on, /* RF is on after RFSleep or RFOff */
rf_sleep, /* 802.11 Power Save mode */
rf_off, /* HW/SW Radio OFF or Inactive Power Save */
/* =====Add the new RF state above this line===== */
rf_max
} rt_rf_power_state;
/* ASPM OSC Control bit, added by Roger, 2013.03.29. */
#define RT_PCI_ASPM_OSC_IGNORE 0 /* PCI ASPM ignore OSC control in default */
#define RT_PCI_ASPM_OSC_ENABLE BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */
#define RT_PCI_ASPM_OSC_DISABLE BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */
enum _PS_BBRegBackup_ {
PSBBREG_RF0 = 0,
PSBBREG_RF1,
PSBBREG_RF2,
PSBBREG_AFE0,
PSBBREG_TOTALCNT
};
enum { /* for ips_mode */
IPS_NONE = 0,
IPS_NORMAL,
IPS_LEVEL_2,
IPS_NUM
};
/* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */
typedef enum _PS_DENY_REASON {
PS_DENY_DRV_INITIAL = 0,
PS_DENY_SCAN,
PS_DENY_JOIN,
PS_DENY_DISCONNECT,
PS_DENY_SUSPEND,
PS_DENY_IOCTL,
PS_DENY_MGNT_TX,
PS_DENY_MONITOR_MODE,
PS_DENY_BEAMFORMING, /* Beamforming */
PS_DENY_DRV_REMOVE = 30,
PS_DENY_OTHERS = 31
} PS_DENY_REASON;
#ifdef CONFIG_WAR_OFFLOAD
/* only support mDNS V4/V6 rsp now */
enum {
WAR_ARP_RSP_EN = 0x0000001,
WAR_ICMPV6_NS_RSP_EN = 0x00000002,
WAR_ICMPV4_ECHO_RSP_EN = 0x00000004,
WAR_ICMPV6_ECHO_RSP_EN = 0x00000008,
WAR_NETBIOS_RSP_EN = 0x00000010,
WAR_LLMNR_V4_RSP_EN = 0x00000020,
WAR_LLMNR_V6_RSP_EN = 0x00000040,
WAR_SNMP_V4_RSP_EN = 0x00000080,
WAR_SNMP_V6_RSP_EN = 0x00000100,
WAR_SNMP_V4_WAKEUP_EN = 0x00000200,
WAR_SNMP_V6_WAKEUP_EN = 0x00000400,
WAR_SSDP_V4_WAKEUP_EN = 0x00000800,
WAR_SSDP_V6_WAKEUP_EN = 0x00001000,
WAR_WSD_V4_WAKEUP_EN = 0x00002000,
WAR_WSD_V6_WAKEUP_EN = 0x00004000,
WAR_SLP_V4_WAKEUP_EN = 0x00008000,
WAR_SLP_V6_WAKEUP_EN = 0x00010000,
WAR_MDNS_V4_RSP_EN = 0x00020000,
WAR_MDNS_V6_RSP_EN = 0x00040000,
WAR_DESIGNATED_MAC_EN = 0x00080000,
WAR_LLTD_WAKEUP_EN = 0x00100000,
WAR_ARP_WAKEUP_EN = 0x00200000,
WAR_MAGIC_WAKEUP_EN = 0x00400000,
WAR_MDNS_V4_WAKEUP_EN = 0x000800000,
WAR_MDNS_V6_WAKEUP_EN = 0x001000000
};
#endif /* CONFIG_WAR_OFFLOAD */
#ifdef CONFIG_PNO_SUPPORT
typedef struct pno_nlo_info {
u32 fast_scan_period; /* Fast scan period */
u8 ssid_num; /* number of entry */
u8 hidden_ssid_num;
u32 slow_scan_period; /* slow scan period */
u32 fast_scan_iterations; /* Fast scan iterations */
u8 ssid_length[MAX_PNO_LIST_COUNT]; /* SSID Length Array */
u8 ssid_cipher_info[MAX_PNO_LIST_COUNT]; /* Cipher information for security */
u8 ssid_channel_info[MAX_PNO_LIST_COUNT]; /* channel information */
u8 loc_probe_req[MAX_HIDDEN_AP]; /* loc_probeReq */
} pno_nlo_info_t;
typedef struct pno_ssid {
u32 SSID_len;
u8 SSID[32];
} pno_ssid_t;
typedef struct pno_ssid_list {
pno_ssid_t node[MAX_PNO_LIST_COUNT];
} pno_ssid_list_t;
typedef struct pno_scan_channel_info {
u8 channel;
u8 tx_power;
u8 timeout;
u8 active; /* set 1 means active scan, or pasivite scan. */
} pno_scan_channel_info_t;
typedef struct pno_scan_info {
u8 enableRFE; /* Enable RFE */
u8 period_scan_time; /* exclusive with fast_scan_period and slow_scan_period */
u8 periodScan; /* exclusive with fast_scan_period and slow_scan_period */
u8 orig_80_offset; /* original channel 80 offset */
u8 orig_40_offset; /* original channel 40 offset */
u8 orig_bw; /* original bandwidth */
u8 orig_ch; /* original channel */
u8 channel_num; /* number of channel */
u64 rfe_type; /* rfe_type && 0x00000000000000ff */
pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT];
} pno_scan_info_t;
#endif /* CONFIG_PNO_SUPPORT */
#ifdef CONFIG_LPS_POFF
/* Driver context for LPS 32K Close IO Power */
typedef struct lps_poff_info {
bool bEn;
u8 *pStaticFile;
u8 *pDynamicFile;
u32 ConfFileOffset;
u32 tx_bndy_static;
u32 tx_bndy_dynamic;
u16 ConfLenForPTK;
u16 ConfLenForGTK;
ATOMIC_T bEnterPOFF;
ATOMIC_T bTxBoundInProgress;
ATOMIC_T bSetPOFFParm;
} lps_poff_info_t;
#endif /*CONFIG_LPS_POFF*/
struct aoac_report {
u8 iv[8];
u8 replay_counter_eapol_key[8];
u8 group_key[32];
u8 key_index;
u8 security_type;
u8 wow_pattern_idx;
u8 version_info;
u8 rekey_ok:1;
u8 dummy:7;
u8 reserved[3];
u8 rxptk_iv[8];
u8 rxgtk_iv[4][8];
};
#ifdef CONFIG_WAR_OFFLOAD
struct war_ipv4_fmt {
u32 ip_addr[4];
u32 ip_subnet[4];
u32 ip_gateway[4];
};
struct war_ipv6_fmt {
u8 ipv6_addr[8][16];
};
#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6)
/* limitation of mDNS parameter : length and number */
#define MAX_MDNS_SERVICE_NAME_LEN 15
#define MAX_MDNS_TRANS_LEN 4 /* _tcp or _udp */
#define MAX_MDNS_DOMAIN_LEN 5 /* local only for mdns */
#define MAX_MDNS_MACHINE_NAME_LEN (63+1) /* +1 for the length byte used by the DNS format */
#define MAX_MDNS_TARGET_LEN 63
#define MAX_MDNS_DOMAIN_NAME_LEN 63
#define MAX_MDNS_TXT_LEN 1536
#define MAX_MDNS_TXT_SINGLE_LEN 255
#define MAX_MDNS_SERVICE_NUM 10
#define MAX_MDNS_TXT_NUM 8
#define MAX_MDNS_MACHINE_NAME_NUM 3
/* for monitor rsvd page using */
#define MAX_MDNS_PARA_SIZE 1700 // 14*128 = 1792
#define MAX_MDNS_TXT_TOTAL_SIZE 10*MAX_MDNS_TXT_LEN
#define MAX_MDNS_RSP_PKT_SIZE 760 // 6*128 = 768
#define RTW_MDNS_SRV_INFO(sname, sname_len, tname, tname_len, dname, dname_len, port0, port1, ttlv, tar, tar_len, idx) \
{ .service=sname, .service_len=sname_len, .transport=tname, .transport_len=tname_len, \
.domain=dname , .domain_len=dname_len , .port[0]=port0, .port[1]=port1, .ttl=ttlv, \
.target=tar, .target_len=tar_len, .txt_rsp_idx=idx }
struct war_mdns_service_info {
u8 service[MAX_MDNS_SERVICE_NAME_LEN+1];
u8 service_len;
u8 transport[MAX_MDNS_TRANS_LEN+1];
u8 transport_len;
u8 domain[MAX_MDNS_DOMAIN_LEN+1];
u8 domain_len;
u8 port[2];
u32 ttl;
u8 target[MAX_MDNS_TARGET_LEN+1];
u8 target_len;
s8 txt_rsp_idx;
};
struct war_mdns_machine_name {
u8 name[MAX_MDNS_MACHINE_NAME_LEN];
u8 name_len;
};
struct war_mdns_txt_rsp {
u8 txt[MAX_MDNS_TXT_LEN];
u16 txt_len;
};
#endif
#endif /* CONFIG_WAR_OFFLOAD */
struct rsvd_page_cache_t;
struct pwrctrl_priv {
_pwrlock lock;
_pwrlock check_32k_lock;
volatile u8 rpwm; /* requested power state for fw */
volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
volatile u8 tog; /* toggling */
volatile u8 cpwm_tog; /* toggling */
u8 rpwm_retry;
u8 pwr_mode;
u8 smart_ps;
u8 bcn_ant_mode;
u8 dtim;
#ifdef CONFIG_LPS_CHK_BY_TP
u8 lps_chk_by_tp;
u16 lps_tx_tp_th;/*Mbps*/
u16 lps_rx_tp_th;/*Mbps*/
u16 lps_bi_tp_th;/*Mbps*//*TRX TP*/
int lps_chk_cnt_th;
int lps_chk_cnt;
u32 lps_tx_pkts;
u32 lps_rx_pkts;
#endif
#ifdef CONFIG_WMMPS_STA
u8 wmm_smart_ps;
#endif /* CONFIG_WMMPS_STA */
u32 alives;
_workitem cpwm_event;
_workitem dma_event; /*for handle un-synchronized tx dma*/
#ifdef CONFIG_LPS_RPWM_TIMER
u8 brpwmtimeout;
_workitem rpwmtimeoutwi;
_timer pwr_rpwm_timer;
#endif /* CONFIG_LPS_RPWM_TIMER */
u8 bpower_saving; /* for LPS/IPS */
u8 b_hw_radio_off;
u8 reg_rfoff;
u8 reg_pdnmode; /* powerdown mode */
u32 rfoff_reason;
uint ips_enter_cnts;
uint ips_leave_cnts;
uint lps_enter_cnts;
uint lps_leave_cnts;
u8 ips_mode;
u8 ips_org_mode;
u8 ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */
uint bips_processing;
systime ips_deny_time; /* will deny IPS when system time is smaller than this */
u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */
/* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */
/* Use PS_DENY_REASON to decide reason. */
/* Don't access this variable directly without control function, */
/* and this variable should be protected by lock. */
u32 ps_deny;
u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
u8 fw_psmode_iface_id;
u8 bLeisurePs;
u8 LpsIdleCount;
u8 power_mgnt;
u8 org_power_mgnt;
u8 bFwCurrentInPSMode;
systime lps_deny_time; /* will deny LPS when system time is smaller than this */
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
u8 bInSuspend;
#ifdef CONFIG_BT_COEXIST
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
u8 wowlan_wake_reason;
u8 wowlan_last_wake_reason;
u8 wowlan_ap_mode;
u8 wowlan_mode;
u8 wowlan_p2p_mode;
u8 wowlan_pno_enable;
u8 wowlan_in_resume;
#ifdef CONFIG_GPIO_WAKEUP
u8 is_high_active;
u8 wowlan_gpio_index;
u8 wowlan_gpio_output_state;
#endif /* CONFIG_GPIO_WAKEUP */
u8 hst2dev_high_active;
#ifdef CONFIG_WOWLAN
bool default_patterns_en;
#ifdef CONFIG_IPV6
u8 wowlan_ns_offload_en;
#endif /*CONFIG_IPV6*/
u8 wowlan_txpause_status;
u8 wowlan_pattern_idx;
u64 wowlan_fw_iv;
struct rtl_priv_pattern patterns[MAX_WKFM_CAM_NUM];
#ifdef CONFIG_WOW_PATTERN_IN_TXFIFO
u8 pattern_rsvd_page_loc;
#endif
#ifdef CONFIG_PNO_SUPPORT
u8 pno_inited;
pno_nlo_info_t *pnlo_info;
pno_scan_info_t *pscan_info;
pno_ssid_list_t *pno_ssid_list;
#endif /* CONFIG_PNO_SUPPORT */
#ifdef CONFIG_WOW_PATTERN_HW_CAM
_mutex wowlan_pattern_cam_mutex;
#endif
u8 wowlan_aoac_rpt_loc;
struct aoac_report wowlan_aoac_rpt;
u8 wowlan_power_mgmt;
u8 wowlan_lps_level;
#ifdef CONFIG_LPS_1T1R
u8 wowlan_lps_1t1r;
#endif
#ifdef CONFIG_WOW_KEEP_ALIVE_PATTERN
/*data 0,rsv page location*/
u8 wowlan_keep_alive_mode;
u8 keep_alive_pattern_loc;
/*data 1 ,cam id, rx udp packet*/
u8 wowlan_keep_alive_ack_index;
/*data 2 ,cam id, pattern match packet*/
u8 wowlan_wake_pattern_index;
/*data3,unit: TBTT*/
u16 wowlan_keep_alive_period;
/*data4,unit: TBTT*/
u8 wowlan_keep_alive_retry_interval;
/*data5*/
u8 wowlan_keep_alive_retry_counter;
/*from echo*/
u8 keep_alive_pattern[WLAN_MAX_KEEP_ALIVE_IE_LEN];
u32 keep_alive_pattern_len;
#endif /*CONFIG_WOW_KEEP_ALIVE_PATTERN*/
#ifdef CONFIG_WAR_OFFLOAD
u8 wowlan_war_offload_mode;
u32 wowlan_war_offload_ctrl;
struct war_ipv4_fmt wowlan_war_offload_ipv4;
struct war_ipv6_fmt wowlan_war_offload_ipv6;
u8 wowlan_war_offload_mac[6];
#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6)
struct war_mdns_machine_name wowlan_war_offload_mdns_mnane[MAX_MDNS_MACHINE_NAME_NUM];
struct war_mdns_service_info wowlan_war_offload_mdns_service[MAX_MDNS_SERVICE_NUM];
struct war_mdns_txt_rsp wowlan_war_offload_mdns_txt_rsp[MAX_MDNS_TXT_NUM];
u8 wowlan_war_offload_mdns_mnane_num;
u8 wowlan_war_offload_mdns_service_info_num;
u8 wowlan_war_offload_mdns_txt_rsp_num;
u8 wowlan_war_offload_mdns_domain_name[MAX_MDNS_DOMAIN_NAME_LEN+1];
u8 wowlan_war_offload_mdns_domain_name_len;
u32 wowlan_war_offload_mdns_para_cur_size;
u32 wowlan_war_offload_mdns_rsp_cur_size;
#endif /* CONFIG_OFFLOAD_MDNS_V4 || CONFIG_OFFLOAD_MDNS_V6 */
#endif /* CONFIG_WAR_OFFLOAD */
#endif /* CONFIG_WOWLAN */
_timer pwr_state_check_timer;
int pwr_state_check_interval;
u8 pwr_state_check_cnts;
rt_rf_power_state rf_pwrstate;/* cur power state, only for IPS */
/* rt_rf_power_state current_rfpwrstate; */
rt_rf_power_state change_rfpwrstate;
u8 bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
u8 bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
#ifdef CONFIG_RESUME_IN_WORKQUEUE
struct workqueue_struct *rtw_workqueue;
_workitem resume_work;
#endif
#ifdef CONFIG_HAS_EARLYSUSPEND
struct early_suspend early_suspend;
u8 do_late_resume;
#endif /* CONFIG_HAS_EARLYSUSPEND */
#ifdef CONFIG_ANDROID_POWER
android_early_suspend_t early_suspend;
u8 do_late_resume;
#endif
#ifdef CONFIG_LPS_POFF
lps_poff_info_t *plps_poff_info;
#endif
u8 lps_level_bk;
u8 lps_level; /*LPS_NORMAL,LPA_CG,LPS_PG*/
#ifdef CONFIG_LPS_1T1R
u8 lps_1t1r_bk;
u8 lps_1t1r;
#endif
#ifdef CONFIG_LPS_PG
struct rsvd_page_cache_t lpspg_info;
#ifdef CONFIG_RTL8822C
struct rsvd_page_cache_t lpspg_dpk_info;
struct rsvd_page_cache_t lpspg_iqk_info;
#endif
#endif
u8 current_lps_hw_port_id;
#ifdef CONFIG_RTW_CFGVENDOR_LLSTATS
systime radio_on_start_time;
systime pwr_saving_start_time;
u32 pwr_saving_time;
u32 on_time;
u32 tx_time;
u32 rx_time;
#endif /* CONFIG_RTW_CFGVENDOR_LLSTATS */
#ifdef CONFIG_LPS_ACK
struct submit_ctx lps_ack_sctx;
s8 lps_ack_status;
_mutex lps_ack_mutex;
#endif /* CONFIG_LPS_ACK */
};
#define rtw_get_ips_mode_req(pwrctl) \
(pwrctl)->ips_mode_req
#define rtw_ips_mode_req(pwrctl, ips_mode) \
(pwrctl)->ips_mode_req = (ips_mode)
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
do { \
/*RTW_INFO("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \
_set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
} while (0)
#define rtw_set_pwr_state_check_timer(pwrctl) \
_rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
extern void rtw_init_pwrctrl_priv(_adapter *adapter);
extern void rtw_free_pwrctrl_priv(_adapter *adapter);
#ifdef CONFIG_LPS_LCLK
s32 rtw_register_task_alive(PADAPTER, u32 task);
void rtw_unregister_task_alive(PADAPTER, u32 task);
extern s32 rtw_register_tx_alive(PADAPTER padapter);
extern void rtw_unregister_tx_alive(PADAPTER padapter);
extern s32 rtw_register_rx_alive(PADAPTER padapter);
extern void rtw_unregister_rx_alive(PADAPTER padapter);
extern s32 rtw_register_cmd_alive(PADAPTER padapter);
extern void rtw_unregister_cmd_alive(PADAPTER padapter);
extern s32 rtw_register_evt_alive(PADAPTER padapter);
extern void rtw_unregister_evt_alive(PADAPTER padapter);
extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate);
extern void LPS_Leave_check(PADAPTER padapter);
#endif
extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter);
#ifdef CONFIG_IPS
void _ips_enter(_adapter *padapter);
void ips_enter(_adapter *padapter);
int _ips_leave(_adapter *padapter);
int ips_leave(_adapter *padapter);
#endif
void rtw_ps_processor(_adapter *padapter);
#ifdef SUPPORT_HW_RFOFF_DETECTED
rt_rf_power_state RfOnOffDetect(PADAPTER pAdapter);
#endif
#ifdef DBG_CHECK_FW_PS_STATE
int rtw_fw_ps_state(PADAPTER padapter);
#endif
#ifdef CONFIG_LPS
extern const char * const LPS_CTRL_PHYDM;
void LPS_Enter(PADAPTER padapter, const char *msg);
void LPS_Leave(PADAPTER padapter, const char *msg);
void rtw_exec_lps(_adapter *padapter, u8 ps_mode);
void rtw_lps_rfon_ctrl(_adapter *padapter, u8 rfon_ctrl);
#ifdef CONFIG_CHECK_LEAVE_LPS
#ifdef CONFIG_LPS_CHK_BY_TP
void traffic_check_for_leave_lps_by_tp(PADAPTER padapter, u8 tx, struct sta_info *sta);
#endif
void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
#endif /*CONFIG_CHECK_LEAVE_LPS*/
void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
u8 rtw_set_rpwm(_adapter *padapter, u8 val8);
#ifdef CONFIG_WOWLAN
void rtw_wow_lps_level_decide(_adapter *adapter, u8 wow_en);
#endif /* CONFIG_WOWLAN */
#endif /* CONFIG_LPS */
#ifdef CONFIG_RESUME_IN_WORKQUEUE
void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
#endif /* CONFIG_RESUME_IN_WORKQUEUE */
#if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv);
bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv);
void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable);
void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
#else
#define rtw_is_earlysuspend_registered(pwrpriv) _FALSE
#define rtw_is_do_late_resume(pwrpriv) _FALSE
#define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0)
#define rtw_register_early_suspend(pwrpriv) do {} while (0)
#define rtw_unregister_early_suspend(pwrpriv) do {} while (0)
#endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */
u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
void rtw_set_ips_deny(_adapter *padapter, u32 ms);
int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
#define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__)
#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
int rtw_pm_set_ips(_adapter *padapter, u8 mode);
int rtw_pm_set_lps(_adapter *padapter, u8 mode);
int rtw_pm_set_lps_level(_adapter *padapter, u8 level);
#ifdef CONFIG_LPS_1T1R
int rtw_pm_set_lps_1t1r(_adapter *padapter, u8 en);
#endif
void rtw_set_lps_deny(_adapter *adapter, u32 ms);
#ifdef CONFIG_WOWLAN
int rtw_pm_set_wow_lps(_adapter *padapter, u8 mode);
int rtw_pm_set_wow_lps_level(_adapter *padapter, u8 level);
#ifdef CONFIG_LPS_1T1R
int rtw_pm_set_wow_lps_1t1r(_adapter *padapter, u8 en);
#endif
#endif /* CONFIG_WOWLAN */
void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
u32 rtw_ps_deny_get(PADAPTER padapter);
#if defined(CONFIG_WOWLAN)
void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip);
void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr);
bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern,
int *pattern_len, char *bit_mask);
void rtw_wow_pattern_sw_reset(_adapter *adapter);
u8 rtw_set_default_pattern(_adapter *adapter);
void rtw_wow_pattern_sw_dump(_adapter *adapter);
#ifdef CONFIG_WAR_OFFLOAD
#if defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6)
void rtw_wow_war_mdns_dump_buf(struct seq_file *m, u8 *title, u8 *buf, u32 len);
void rtw_wow_war_mdns_dump_txt(struct seq_file *m, u8 *title, u8 *buf, u32 len);
bool rtw_wow_war_mdns_parser_pattern(u8 *input, char *target, u32 *target_len, u32 max_len);
void rtw_wow_war_mdns_parms_reset(_adapter *adapter, u8 is_set_default);
#endif /* defined(CONFIG_OFFLOAD_MDNS_V4) || defined(CONFIG_OFFLOAD_MDNS_V6) */
#endif /* CONFIG_WAR_OFFLOAD */
#endif /* CONFIG_WOWLAN */
void rtw_ssmps_enter(_adapter *adapter, struct sta_info *sta);
void rtw_ssmps_leave(_adapter *adapter, struct sta_info *sta);
#endif /* __RTL871X_PWRCTRL_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_QOS_H_
#define _RTW_QOS_H_
#define DRV_CFG_UAPSD_VO BIT0
#define DRV_CFG_UAPSD_VI BIT1
#define DRV_CFG_UAPSD_BK BIT2
#define DRV_CFG_UAPSD_BE BIT3
#define WMM_IE_UAPSD_VO BIT0
#define WMM_IE_UAPSD_VI BIT1
#define WMM_IE_UAPSD_BK BIT2
#define WMM_IE_UAPSD_BE BIT3
#define WMM_TID0 BIT0
#define WMM_TID1 BIT1
#define WMM_TID2 BIT2
#define WMM_TID3 BIT3
#define WMM_TID4 BIT4
#define WMM_TID5 BIT5
#define WMM_TID6 BIT6
#define WMM_TID7 BIT7
#define AP_SUPPORTED_UAPSD BIT7
/* TC = Traffic Category, TID0~7 represents TC */
#define BIT_MASK_TID_TC 0xff
/* TS = Traffic Stream, TID8~15 represents TS */
#define BIT_MASK_TID_TS 0xff00
#define ALL_TID_TC_SUPPORTED_UAPSD 0xff
struct qos_priv {
unsigned int qos_option; /* bit mask option: u-apsd, s-apsd, ts, block ack... */
#ifdef CONFIG_WMMPS_STA
/* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
u8 uapsd_max_sp_len;
/* declare uapsd_tid as a bitmap for the uapsd setting of TID 0~15 */
u16 uapsd_tid;
/* declare uapsd_tid_delivery_enabled as a bitmap for the delivery-enabled setting of TID 0~7 */
u8 uapsd_tid_delivery_enabled;
/* declare uapsd_tid_trigger_enabled as a bitmap for the trigger-enabled setting of TID 0~7 */
u8 uapsd_tid_trigger_enabled;
/* declare uapsd_ap_supported to record whether the connected ap supports uapsd or not */
u8 uapsd_ap_supported;
#endif /* CONFIG_WMMPS_STA */
};
#endif /* _RTL871X_QOS_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_RECV_H_
#define _RTW_RECV_H_
#define RTW_RX_MSDU_ACT_NONE 0
#define RTW_RX_MSDU_ACT_INDICATE BIT0
#define RTW_RX_MSDU_ACT_FORWARD BIT1
#ifdef CONFIG_SINGLE_RECV_BUF
#define NR_RECVBUFF (1)
#else
#if defined(CONFIG_GSPI_HCI)
#define NR_RECVBUFF (32)
#elif defined(CONFIG_SDIO_HCI)
#define NR_RECVBUFF (8)
#else
#define NR_RECVBUFF (8)
#endif
#endif /* CONFIG_SINGLE_RECV_BUF */
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
#define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1)
#else /*!CONFIG_PREALLOC_RX_SKB_BUFFER */
#define NR_PREALLOC_RECV_SKB 8
#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
#ifdef CONFIG_RTW_NAPI
#define RTL_NAPI_WEIGHT (32)
#endif
#if defined(CONFIG_RTL8821C) && defined(CONFIG_SDIO_HCI) && defined(CONFIG_RECV_THREAD_MODE)
#ifdef NR_RECVBUFF
#undef NR_RECVBUFF
#define NR_RECVBUFF (32)
#endif
#endif
#define NR_RECVFRAME 256
#define RXFRAME_ALIGN 8
#define RXFRAME_ALIGN_SZ (1<<RXFRAME_ALIGN)
#define DRVINFO_SZ 4 /* unit is 8bytes */
#define MAX_RXFRAME_CNT 512
#define MAX_RX_NUMBLKS (32)
#define RECVFRAME_HDR_ALIGN 128
#define MAX_CONTINUAL_NORXPACKET_COUNT 4 /* In MAX_CONTINUAL_NORXPACKET_COUNT*2 sec , no rx traffict would issue DELBA*/
#define PHY_RSSI_SLID_WIN_MAX 100
#define PHY_LINKQUALITY_SLID_WIN_MAX 20
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define RX_MPDU_QUEUE 0
#define RX_CMD_QUEUE 1
#define RX_MAX_QUEUE 2
#define MAX_SUBFRAME_COUNT 64
/* Bridge-Tunnel header (for EtherTypes ETH_P_AARP and ETH_P_IPX) */
extern u8 rtw_bridge_tunnel_header[];
extern u8 rtw_rfc1042_header[];
enum addba_rsp_ack_state {
RTW_RECV_ACK_OR_TIMEOUT,
};
/* for Rx reordering buffer control */
struct recv_reorder_ctrl {
_adapter *padapter;
u8 tid;
u8 enable;
u16 indicate_seq;/* =wstart_b, init_value=0xffff */
u16 wend_b;
u8 wsize_b;
u8 ampdu_size;
_queue pending_recvframe_queue;
_timer reordering_ctrl_timer;
u8 bReorderWaiting;
unsigned long rec_abba_rsp_ack;
};
struct stainfo_rxcache {
u16 tid_rxseq[16];
u8 iv[16][8];
u8 last_tid;
#if 0
unsigned short tid0_rxseq;
unsigned short tid1_rxseq;
unsigned short tid2_rxseq;
unsigned short tid3_rxseq;
unsigned short tid4_rxseq;
unsigned short tid5_rxseq;
unsigned short tid6_rxseq;
unsigned short tid7_rxseq;
unsigned short tid8_rxseq;
unsigned short tid9_rxseq;
unsigned short tid10_rxseq;
unsigned short tid11_rxseq;
unsigned short tid12_rxseq;
unsigned short tid13_rxseq;
unsigned short tid14_rxseq;
unsigned short tid15_rxseq;
#endif
};
struct smooth_rssi_data {
u32 elements[100]; /* array to store values */
u32 index; /* index to current array to store */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
struct signal_stat {
u8 update_req; /* used to indicate */
u8 avg_val; /* avg of valid elements */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
struct rx_raw_rssi {
u8 data_rate;
u8 pwdball;
s8 pwr_all;
u8 mimo_signal_strength[4];/* in 0~100 index */
u8 mimo_signal_quality[4];
s8 ofdm_pwr[4];
u8 ofdm_snr[4];
};
#include "cmn_info/rtw_sta_info.h"
struct rx_pkt_attrib {
u16 pkt_len;
u8 physt;
u8 drvinfo_sz;
u8 shift_sz;
u8 hdrlen; /* the WLAN Header Len */
u8 to_fr_ds;
u8 amsdu;
u8 qos;
u8 priority;
u8 pw_save;
u8 mdata;
u16 seq_num;
u8 frag_num;
u8 mfrag;
u8 order;
u8 privacy; /* in frame_ctrl field */
u8 bdecrypted;
u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
u8 iv_len;
u8 icv_len;
u8 crc_err;
u8 icv_err;
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 bssid[ETH_ALEN];
#ifdef CONFIG_RTW_MESH
u8 msa[ETH_ALEN]; /* mesh sa */
u8 mda[ETH_ALEN]; /* mesh da */
u8 mesh_ctrl_present;
u8 mesh_ctrl_len; /* length of mesh control field */
#endif
u8 ack_policy;
u8 key_index;
u8 data_rate;
u8 ch; /* RX channel */
u8 bw;
u8 stbc;
u8 ldpc;
u8 sgi;
u8 pkt_rpt_type;
u32 MacIDValidEntry[2]; /* 64 bits present 64 entry. */
u8 ampdu;
u8 ppdu_cnt;
u8 ampdu_eof;
u32 free_cnt; /* free run counter */
struct phydm_phyinfo_struct phy_info;
#ifdef CONFIG_WIFI_MONITOR
u8 moif[16];
#endif
#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX
/* checksum offload realted varaiables */
u8 csum_valid; /* Checksum valid, 0: not check, 1: checked */
u8 csum_err; /* Checksum Error occurs */
#endif /* CONFIG_TCP_CSUM_OFFLOAD_RX */
};
#ifdef CONFIG_RTW_MESH
#define RATTRIB_GET_MCTRL_LEN(rattrib) ((rattrib)->mesh_ctrl_len)
#else
#define RATTRIB_GET_MCTRL_LEN(rattrib) 0
#endif
/* These definition is used for Rx packet reordering. */
#define SN_LESS(a, b) (((a-b) & 0x800) != 0)
#define SN_EQUAL(a, b) (a == b)
/* #define REORDER_WIN_SIZE 128 */
/* #define REORDER_ENTRY_NUM 128 */
#define REORDER_WAIT_TIME (50) /* (ms) */
#if defined(CONFIG_PLATFORM_RTK390X) && defined(CONFIG_USB_HCI)
#define RECVBUFF_ALIGN_SZ 32
#else
#define RECVBUFF_ALIGN_SZ 8
#endif
#ifdef CONFIG_TRX_BD_ARCH
#define RX_WIFI_INFO_SIZE 24
#elif (defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI)
#define RXBD_SIZE sizeof(struct recv_stat)
#endif
#define RXDESC_SIZE 24
#define RXDESC_OFFSET RXDESC_SIZE
#ifdef CONFIG_TRX_BD_ARCH
struct rx_buf_desc {
/* RX has exactly one segment */
#ifdef CONFIG_64BIT_DMA
unsigned int dword[4];
#else
unsigned int dword[2];
#endif
};
struct recv_stat {
unsigned int rxdw[8];
};
#else
struct recv_stat {
unsigned int rxdw0;
unsigned int rxdw1;
#if !((defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI)) /* exclude 8192ee, 8814ae, 8822be, 8821ce */
unsigned int rxdw2;
unsigned int rxdw3;
#endif
#ifndef BUF_DESC_ARCH
unsigned int rxdw4;
unsigned int rxdw5;
#ifdef CONFIG_PCI_HCI
unsigned int rxdw6;
unsigned int rxdw7;
#endif
#endif /* if BUF_DESC_ARCH is defined, rx_buf_desc occupy 4 double words */
};
#endif
#define EOR BIT(30)
#ifdef CONFIG_PCI_HCI
#define PCI_MAX_RX_QUEUE 1/* MSDU packet queue, Rx Command Queue */
#define PCI_MAX_RX_COUNT 128
#ifdef CONFIG_TRX_BD_ARCH
#define RX_BD_NUM PCI_MAX_RX_COUNT /* alias */
#endif
struct rtw_rx_ring {
#ifdef CONFIG_TRX_BD_ARCH
struct rx_buf_desc *buf_desc;
#else
struct recv_stat *desc;
#endif
dma_addr_t dma;
unsigned int idx;
struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
};
#endif
/*
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
; halt(passive) ;
using enter_critical section to protect
*/
#ifndef DBG_RX_BH_TRACKING
#define DBG_RX_BH_TRACKING 0
#endif
struct recv_priv {
_lock lock;
#ifdef CONFIG_RECV_THREAD_MODE
_sema recv_sema;
#endif
/* _queue blk_strms[MAX_RX_NUMBLKS]; */ /* keeping the block ack frame until return ack */
_queue free_recv_queue;
_queue recv_pending_queue;
_queue uc_swdec_pending_queue;
u8 *pallocated_frame_buf;
u8 *precv_frame_buf;
uint free_recvframe_cnt;
#if DBG_RX_BH_TRACKING
u32 rx_bh_stage;
u32 rx_bh_buf_dq_cnt;
void *rx_bh_lbuf;
void *rx_bh_cbuf;
void *rx_bh_cbuf_data;
u32 rx_bh_cbuf_dlen;
u32 rx_bh_cbuf_pos;
void *rx_bh_cframe;
#endif
_adapter *adapter;
u32 is_any_non_be_pkts;
u64 rx_bytes;
u64 rx_pkts;
u64 rx_drop;
u64 dbg_rx_drop_count;
u64 dbg_rx_ampdu_drop_count;
u64 dbg_rx_ampdu_forced_indicate_count;
u64 dbg_rx_ampdu_loss_count;
u64 dbg_rx_dup_mgt_frame_drop_count;
u64 dbg_rx_ampdu_window_shift_cnt;
u64 dbg_rx_conflic_mac_addr_cnt;
uint rx_icv_err;
uint rx_largepacket_crcerr;
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
#ifdef CONFIG_USB_HCI
/* u8 *pallocated_urb_buf; */
_sema allrxreturnevt;
uint ff_hwaddr;
ATOMIC_T rx_pending_cnt;
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
#ifdef PLATFORM_LINUX
PURB int_in_urb;
#endif
u8 *int_in_buf;
#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
#endif
#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
_tasklet irq_prepare_beacon_tasklet;
_tasklet recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
struct sk_buff_head rx_skb_queue;
#ifdef CONFIG_RTW_NAPI
struct sk_buff_head rx_napi_skb_queue;
#endif
#ifdef CONFIG_RX_INDICATE_QUEUE
_tasklet rx_indicate_tasklet;
struct ifqueue rx_indicate_queue;
#endif /* CONFIG_RX_INDICATE_QUEUE */
#endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */
u8 *pallocated_recv_buf;
u8 *precv_buf; /* 4 alignment */
_queue free_recv_buf_queue;
u32 free_recv_buf_queue_cnt;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI)
_queue recv_buf_pending_queue;
#endif
#if defined(CONFIG_SDIO_HCI)
#ifdef CONFIG_SDIO_RECVBUF_PWAIT
struct rtw_pwait_ctx recvbuf_pwait;
#endif
#ifdef CONFIG_SDIO_RECVBUF_AGGREGATION
bool recvbuf_agg;
#endif
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_PCI_HCI
/* Rx */
struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
int rxringcount; /* size should be PCI_MAX_RX_QUEUE */
u32 rxbuffersize;
#endif
/* For display the phy informatiom */
u8 is_signal_dbg; /* for debug */
u8 signal_strength_dbg; /* for debug */
u8 signal_strength;
u8 signal_qual;
s8 rssi; /* translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); */
struct rx_raw_rssi raw_rssi_info;
/* s8 rxpwdb; */
/* int RxSNRdB[2]; */
/* s8 RxRssi[2]; */
/* int FalseAlmCnt_all; */
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
_timer signal_stat_timer;
u32 signal_stat_sampling_interval;
/* u32 signal_stat_converging_constant; */
struct signal_stat signal_qual_data;
struct signal_stat signal_strength_data;
#else /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
struct smooth_rssi_data signal_qual_data;
struct smooth_rssi_data signal_strength_data;
#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
u16 sink_udpport, pre_rtp_rxseq, cur_rtp_rxseq;
BOOLEAN store_law_data_flag;
};
#ifdef CONFIG_SDIO_RECVBUF_AGGREGATION
#define recv_buf_agg(recvpriv) recvpriv->recvbuf_agg
#ifndef CONFIG_SDIO_RECVBUF_AGGREGATION_EN
#define CONFIG_SDIO_RECVBUF_AGGREGATION_EN 1
#endif
#else
#define recv_buf_agg(recvpriv) 0
#endif
#define RX_BH_STG_UNKNOWN 0
#define RX_BH_STG_HDL_ENTER 1
#define RX_BH_STG_HDL_EXIT 2
#define RX_BH_STG_NEW_BUF 3
#define RX_BH_STG_NEW_FRAME 4
#define RX_BH_STG_NORMAL_RX 5
#define RX_BH_STG_NORMAL_RX_END 6
#define RX_BH_STG_C2H 7
#define RX_BH_STG_C2H_END 8
#if DBG_RX_BH_TRACKING
void rx_bh_tk_set_stage(struct recv_priv *recv, u32 s);
void rx_bh_tk_set_buf(struct recv_priv *recv, void *buf, void *data, u32 dlen);
void rx_bh_tk_set_buf_pos(struct recv_priv *recv, void *pos);
void rx_bh_tk_set_frame(struct recv_priv *recv, void *frame);
void dump_rx_bh_tk(void *sel, struct recv_priv *recv);
#else
#define rx_bh_tk_set_stage(recv, s) do {} while (0)
#define rx_bh_tk_set_buf(recv, buf, data, dlen) do {} while (0)
#define rx_bh_tk_set_buf_pos(recv, pos) do {} while (0)
#define rx_bh_tk_set_frame(recv, frame) do {} while (0)
#define dump_rx_bh_tk(sel, recv) do {} while (0)
#endif
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
#define rtw_set_signal_stat_timer(recvpriv) _set_timer(&(recvpriv)->signal_stat_timer, (recvpriv)->signal_stat_sampling_interval)
#endif /* CONFIG_NEW_SIGNAL_STAT_PROCESS */
struct sta_recv_priv {
_lock lock;
sint option;
/* _queue blk_strms[MAX_RX_NUMBLKS]; */
_queue defrag_q; /* keeping the fragment frame until defrag */
struct stainfo_rxcache rxcache;
u16 bmc_tid_rxseq[16];
u16 nonqos_rxseq;
u16 nonqos_bmc_rxseq;
/* uint sta_rx_bytes; */
/* uint sta_rx_pkts; */
/* uint sta_rx_fail; */
};
#define RBUF_TYPE_PREALLOC 0
#define RBUF_TYPE_TMP 1
#define RBUF_TYPE_PWAIT_ADJ 2
struct recv_buf {
_list list;
#ifdef PLATFORM_WINDOWS
_lock recvbuf_lock;
#endif
#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST
u8 type;
#endif
u32 ref_cnt;
PADAPTER adapter;
u8 *pbuf;
u8 *pallocated_buf;
u32 len;
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
#ifdef CONFIG_USB_HCI
PURB purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz;
u8 irp_pending;
int transfer_len;
#endif
#if defined(PLATFORM_LINUX)
_pkt *pskb;
#elif defined(PLATFORM_FREEBSD) /* skb solution */
struct sk_buff *pskb;
#endif
};
#ifdef CONFIG_SDIO_RECVBUF_PWAIT_RUNTIME_ADJUST
#define RBUF_IS_PREALLOC(rbuf) ((rbuf)->type == RBUF_TYPE_PREALLOC)
#else
#define RBUF_IS_PREALLOC(rbuf) 1
#endif
/*
head ----->
data ----->
payload
tail ----->
end ----->
len = (unsigned int )(tail - data);
*/
struct recv_frame_hdr {
_list list;
_pkt *pkt;
_adapter *adapter;
u8 fragcnt;
int frame_tag;
int keytrack;
struct rx_pkt_attrib attrib;
uint len;
u8 *rx_head;
u8 *rx_data;
u8 *rx_tail;
u8 *rx_end;
void *precvbuf;
/* */
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl *preorder_ctrl;
#ifdef CONFIG_WAPI_SUPPORT
u8 UserPriority;
u8 WapiTempPN[16];
u8 WapiSrcAddr[6];
u8 bWapiCheckPNInDecrypt;
u8 bIsWaiPacket;
#endif
};
union recv_frame {
union {
_list list;
struct recv_frame_hdr hdr;
uint mem[RECVFRAME_HDR_ALIGN >> 2];
} u;
/* uint mem[MAX_RXSZ>>2]; */
};
enum rtw_rx_llc_hdl {
RTW_RX_LLC_KEEP = 0,
RTW_RX_LLC_REMOVE = 1,
RTW_RX_LLC_VLAN = 2,
};
bool rtw_rframe_del_wfd_ie(union recv_frame *rframe, u8 ies_offset);
typedef enum _RX_PACKET_TYPE {
NORMAL_RX,/* Normal rx packet */
TX_REPORT1,/* CCX */
TX_REPORT2,/* TX RPT */
HIS_REPORT,/* USB HISR RPT */
C2H_PACKET
} RX_PACKET_TYPE, *PRX_PACKET_TYPE;
extern union recv_frame *_rtw_alloc_recvframe(_queue *pfree_recv_queue); /* get a free recv_frame from pfree_recv_queue */
extern union recv_frame *rtw_alloc_recvframe(_queue *pfree_recv_queue); /* get a free recv_frame from pfree_recv_queue */
extern void rtw_init_recvframe(union recv_frame *precvframe , struct recv_priv *precvpriv);
extern int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue);
#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
extern int _rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue);
extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue);
extern void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(_adapter *adapter);
sint rtw_enqueue_recvbuf_to_head(struct recv_buf *precvbuf, _queue *queue);
sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue);
struct recv_buf *rtw_dequeue_recvbuf(_queue *queue);
void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame, struct sta_info *psta);
#if defined(CONFIG_80211N_HT) && defined(CONFIG_RECV_REORDERING_CTRL)
void rtw_reordering_ctrl_timeout_handler(void *pcontext);
#endif
void rx_query_phy_status(union recv_frame *rframe, u8 *phy_stat);
int rtw_inc_and_chk_continual_no_rx_packet(struct sta_info *sta, int tid_index);
void rtw_reset_continual_no_rx_packet(struct sta_info *sta, int tid_index);
#ifdef CONFIG_RECV_THREAD_MODE
thread_return rtw_recv_thread(thread_context context);
#endif
__inline static u8 *get_rxmem(union recv_frame *precvframe)
{
/* always return rx_head... */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_head;
}
__inline static u8 *get_rx_status(union recv_frame *precvframe)
{
return get_rxmem(precvframe);
}
__inline static u8 *get_recvframe_data(union recv_frame *precvframe)
{
/* alwasy return rx_data */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_data;
}
__inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz)
{
/* append data before rx_data */
/* add data to the start of recv_frame
*
* This function extends the used data area of the recv_frame at the buffer
* start. rx_data must be still larger than rx_head, after pushing.
*/
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data -= sz ;
if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) {
precvframe->u.hdr.rx_data += sz ;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_data;
}
__inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz)
{
/* rx_data += sz; move rx_data sz bytes hereafter */
/* used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller */
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data += sz;
if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) {
precvframe->u.hdr.rx_data -= sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_data;
}
__inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz)
{
/* rx_tai += sz; move rx_tail sz bytes hereafter */
/* used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller */
/* after putting, rx_tail must be still larger than rx_end. */
unsigned char *prev_rx_tail;
/* RTW_INFO("recvframe_put: len=%d\n", sz); */
if (precvframe == NULL)
return NULL;
prev_rx_tail = precvframe->u.hdr.rx_tail;
precvframe->u.hdr.rx_tail += sz;
if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) {
precvframe->u.hdr.rx_tail -= sz;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_tail;
}
__inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz)
{
/* rmv data from rx_tail (by yitsen) */
/* used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller */
/* after pulling, rx_end must be still larger than rx_data. */
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_tail -= sz;
if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) {
precvframe->u.hdr.rx_tail += sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_tail;
}
__inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem)
{
/* due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame */
/* from any given member of recv_frame. */
/* rxmem indicates the any member/address in recv_frame */
return (union recv_frame *)(((SIZE_PTR)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN);
}
__inline static union recv_frame *pkt_to_recvframe(_pkt *pkt)
{
u8 *buf_star;
union recv_frame *precv_frame;
precv_frame = rxmem_to_recvframe((unsigned char *)buf_star);
return precv_frame;
}
__inline static u8 *pkt_to_recvmem(_pkt *pkt)
{
/* return the rx_head */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_head;
}
__inline static u8 *pkt_to_recvdata(_pkt *pkt)
{
/* return the rx_data */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_data;
}
__inline static sint get_recvframe_len(union recv_frame *precvframe)
{
return precvframe->u.hdr.len;
}
__inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex)
{
s32 SignalPower; /* in dBm. */
/* Translate to dBm (x=y-100) */
SignalPower = SignalStrengthIndex - 100;
return SignalPower;
}
struct sta_info;
extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame);
u8 adapter_allow_bmc_data_rx(_adapter *adapter);
s32 pre_recv_entry(union recv_frame *precvframe, u8 *pphy_status);
void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info *sta);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_RF_H_
#define __RTW_RF_H_
#define NumRates (13)
#define B_MODE_RATE_NUM (4)
#define G_MODE_RATE_NUM (8)
#define G_MODE_BASIC_RATE_NUM (3)
/* slot time for 11g */
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
#define CENTER_CH_2G_40M_NUM 9
#define CENTER_CH_2G_NUM 14
#define CENTER_CH_5G_20M_NUM 28 /* 20M center channels */
#define CENTER_CH_5G_40M_NUM 14 /* 40M center channels */
#define CENTER_CH_5G_80M_NUM 7 /* 80M center channels */
#define CENTER_CH_5G_160M_NUM 3 /* 160M center channels */
#define CENTER_CH_5G_ALL_NUM (CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM + CENTER_CH_5G_80M_NUM)
#define MAX_CHANNEL_NUM_2G CENTER_CH_2G_NUM
#define MAX_CHANNEL_NUM_5G CENTER_CH_5G_20M_NUM
#define MAX_CHANNEL_NUM (MAX_CHANNEL_NUM_2G + MAX_CHANNEL_NUM_5G)
#define MAX_CHANNEL_NUM_OF_BAND rtw_max(MAX_CHANNEL_NUM_2G, MAX_CHANNEL_NUM_5G)
extern u8 center_ch_2g[CENTER_CH_2G_NUM];
extern u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM];
u8 center_chs_2g_num(u8 bw);
u8 center_chs_2g(u8 bw, u8 id);
extern u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM];
extern u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM];
extern u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM];
extern u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM];
extern u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM];
u8 center_chs_5g_num(u8 bw);
u8 center_chs_5g(u8 bw, u8 id);
u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset);
u8 rtw_get_scch_by_cch_opch(u8 cch, u8 bw, u8 opch);
u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num);
u8 rtw_get_offset_by_chbw(u8 ch, u8 bw, u8 *r_offset);
u8 rtw_get_center_ch(u8 ch, u8 bw, u8 offset);
u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group);
typedef enum _CAPABILITY {
cESS = 0x0001,
cIBSS = 0x0002,
cPollable = 0x0004,
cPollReq = 0x0008,
cPrivacy = 0x0010,
cShortPreamble = 0x0020,
cPBCC = 0x0040,
cChannelAgility = 0x0080,
cSpectrumMgnt = 0x0100,
cQos = 0x0200, /* For HCCA, use with CF-Pollable and CF-PollReq */
cShortSlotTime = 0x0400,
cAPSD = 0x0800,
cRM = 0x1000, /* RRM (Radio Request Measurement) */
cDSSS_OFDM = 0x2000,
cDelayedBA = 0x4000,
cImmediateBA = 0x8000,
} CAPABILITY, *PCAPABILITY;
enum _REG_PREAMBLE_MODE {
PREAMBLE_LONG = 1,
PREAMBLE_AUTO = 2,
PREAMBLE_SHORT = 3,
};
#define rf_path_char(path) (((path) >= RF_PATH_MAX) ? 'X' : 'A' + (path))
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
typedef enum _BAND_TYPE {
BAND_ON_2_4G = 0,
BAND_ON_5G = 1,
BAND_MAX,
} BAND_TYPE, *PBAND_TYPE;
#ifdef CONFIG_NARROWBAND_SUPPORTING
enum nb_config {
RTW_NB_CONFIG_NONE = 0,
RTW_NB_CONFIG_WIDTH_5 = 5,
RTW_NB_CONFIG_WIDTH_10 = 6,
};
#endif
extern const char *const _band_str[];
#define band_str(band) (((band) >= BAND_MAX) ? _band_str[BAND_MAX] : _band_str[(band)])
extern const u8 _band_to_band_cap[];
#define band_to_band_cap(band) (((band) >= BAND_MAX) ? _band_to_band_cap[BAND_MAX] : _band_to_band_cap[(band)])
extern const char *const _ch_width_str[];
#define ch_width_str(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_str[(bw)] : "CHANNEL_WIDTH_MAX")
extern const u8 _ch_width_to_bw_cap[];
#define ch_width_to_bw_cap(bw) (((bw) < CHANNEL_WIDTH_MAX) ? _ch_width_to_bw_cap[(bw)] : 0)
enum opc_bw {
OPC_BW20 = 0,
OPC_BW40PLUS = 1,
OPC_BW40MINUS = 2,
OPC_BW80 = 3,
OPC_BW160 = 4,
OPC_BW80P80 = 5,
OPC_BW_NUM,
};
extern const char *const _opc_bw_str[OPC_BW_NUM];
#define opc_bw_str(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_str[(bw)] : "N/A")
extern const u8 _opc_bw_to_ch_width[OPC_BW_NUM];
#define opc_bw_to_ch_width(bw) (((bw) < OPC_BW_NUM) ? _opc_bw_to_ch_width[(bw)] : CHANNEL_WIDTH_MAX)
/* global op class APIs */
bool is_valid_global_op_class_id(u8 gid);
s16 get_sub_op_class(u8 gid, u8 ch);
void dump_global_op_class(void *sel);
u8 rtw_get_op_class_by_chbw(u8 ch, u8 bw, u8 offset);
u8 rtw_get_bw_offset_by_op_class_ch(u8 gid, u8 ch, u8 *bw, u8 *offset);
struct op_ch_t {
u8 ch;
u8 static_non_op:1; /* not in channel list */
u8 no_ir:1;
s16 max_txpwr; /* mBm */
};
struct op_class_pref_t {
u8 class_id;
BAND_TYPE band;
enum opc_bw bw;
u8 ch_num; /* number of chs */
u8 op_ch_num; /* channel number which is not static non operable */
u8 ir_ch_num; /* channel number which can init radiation */
struct op_ch_t chs[MAX_CHANNEL_NUM_OF_BAND]; /* zero(ch) terminated array */
};
int op_class_pref_init(_adapter *adapter);
void op_class_pref_deinit(_adapter *adapter);
#define REG_BEACON_HINT 0
#define REG_TXPWR_CHANGE 1
#define REG_CHANGE 2
void op_class_pref_apply_regulatory(_adapter *adapter, u8 reason);
struct rf_ctl_t;
void dump_cap_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail);
void dump_reg_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail);
void dump_cur_spt_op_class_ch(void *sel, struct rf_ctl_t *rfctl, bool detail);
/*
* Represent Extention Channel Offset in HT Capabilities
* This is available only in 40Mhz mode.
* */
typedef enum _EXTCHNL_OFFSET {
EXTCHNL_OFFSET_NO_EXT = 0,
EXTCHNL_OFFSET_UPPER = 1,
EXTCHNL_OFFSET_NO_DEF = 2,
EXTCHNL_OFFSET_LOWER = 3,
} EXTCHNL_OFFSET, *PEXTCHNL_OFFSET;
typedef enum _VHT_DATA_SC {
VHT_DATA_SC_DONOT_CARE = 0,
VHT_DATA_SC_20_UPPER_OF_80MHZ = 1,
VHT_DATA_SC_20_LOWER_OF_80MHZ = 2,
VHT_DATA_SC_20_UPPERST_OF_80MHZ = 3,
VHT_DATA_SC_20_LOWEST_OF_80MHZ = 4,
VHT_DATA_SC_20_RECV1 = 5,
VHT_DATA_SC_20_RECV2 = 6,
VHT_DATA_SC_20_RECV3 = 7,
VHT_DATA_SC_20_RECV4 = 8,
VHT_DATA_SC_40_UPPER_OF_80MHZ = 9,
VHT_DATA_SC_40_LOWER_OF_80MHZ = 10,
} VHT_DATA_SC, *PVHT_DATA_SC_E;
typedef enum _PROTECTION_MODE {
PROTECTION_MODE_AUTO = 0,
PROTECTION_MODE_FORCE_ENABLE = 1,
PROTECTION_MODE_FORCE_DISABLE = 2,
} PROTECTION_MODE, *PPROTECTION_MODE;
#define RF_TYPE_VALID(rf_type) (rf_type < RF_TYPE_MAX)
extern const u8 _rf_type_to_rf_tx_cnt[];
#define rf_type_to_rf_tx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_tx_cnt[rf_type] : 0)
extern const u8 _rf_type_to_rf_rx_cnt[];
#define rf_type_to_rf_rx_cnt(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rf_rx_cnt[rf_type] : 0)
extern const char *const _rf_type_to_rfpath_str[];
#define rf_type_to_rfpath_str(rf_type) (RF_TYPE_VALID(rf_type) ? _rf_type_to_rfpath_str[rf_type] : "UNKNOWN")
void rf_type_to_default_trx_bmp(enum rf_type rf, enum bb_path *tx, enum bb_path *rx);
enum rf_type trx_num_to_rf_type(u8 tx_num, u8 rx_num);
enum rf_type trx_bmp_to_rf_type(u8 tx_bmp, u8 rx_bmp);
bool rf_type_is_a_in_b(enum rf_type a, enum rf_type b);
u8 rtw_restrict_trx_path_bmp_by_trx_num_lmt(u8 trx_path_bmp, u8 tx_num_lmt, u8 rx_num_lmt, u8 *tx_num, u8 *rx_num);
u8 rtw_restrict_trx_path_bmp_by_rftype(u8 trx_path_bmp, enum rf_type type, u8 *tx_num, u8 *rx_num);
void tx_path_nss_set_default(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath);
void tx_path_nss_set_full_tx(enum bb_path txpath_nss[], u8 txpath_num_nss[], u8 txpath);
int rtw_ch2freq(int chan);
int rtw_freq2ch(int freq);
bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo);
struct rf_ctl_t;
typedef enum _REGULATION_TXPWR_LMT {
TXPWR_LMT_NONE = 0, /* no limit */
TXPWR_LMT_FCC = 1,
TXPWR_LMT_MKK = 2,
TXPWR_LMT_ETSI = 3,
TXPWR_LMT_IC = 4,
TXPWR_LMT_KCC = 5,
TXPWR_LMT_NCC = 6,
TXPWR_LMT_ACMA = 7,
TXPWR_LMT_CHILE = 8,
TXPWR_LMT_UKRAINE = 9,
TXPWR_LMT_MEXICO = 10,
TXPWR_LMT_CN = 11,
TXPWR_LMT_WW, /* smallest of all available limit, keep last */
} REGULATION_TXPWR_LMT;
extern const char *const _regd_str[];
#define regd_str(regd) (((regd) > TXPWR_LMT_WW) ? _regd_str[TXPWR_LMT_WW] : _regd_str[(regd)])
void txpwr_idx_get_dbm_str(s8 idx, u8 txgi_max, u8 txgi_pdbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len);
#define MBM_PDBM 100
#define UNSPECIFIED_MBM 32767 /* maximum of s16 */
void txpwr_mbm_get_dbm_str(s16 mbm, SIZE_T cwidth, char dbm_str[], u8 dbm_str_len);
s16 mb_of_ntx(u8 ntx);
#if CONFIG_TXPWR_LIMIT
struct regd_exc_ent {
_list list;
char country[2];
u8 domain;
char regd_name[0];
};
void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl);
void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen);
void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name);
struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain);
void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl);
void dump_txpwr_lmt(void *sel, _adapter *adapter);
void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name
, u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt);
struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name);
void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl);
#endif /* CONFIG_TXPWR_LIMIT */
#define BB_GAIN_2G 0
#if CONFIG_IEEE80211_BAND_5GHZ
#define BB_GAIN_5GLB1 1
#define BB_GAIN_5GLB2 2
#define BB_GAIN_5GMB1 3
#define BB_GAIN_5GMB2 4
#define BB_GAIN_5GHB 5
#endif
#if CONFIG_IEEE80211_BAND_5GHZ
#define BB_GAIN_NUM 6
#else
#define BB_GAIN_NUM 1
#endif
int rtw_ch_to_bb_gain_sel(int ch);
void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset);
void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch);
/* only check channel ranges */
#define rtw_is_2g_ch(ch) (ch >= 1 && ch <= 14)
#define rtw_is_5g_ch(ch) ((ch) >= 36 && (ch) <= 177)
#define rtw_is_same_band(a, b) \
((rtw_is_2g_ch(a) && rtw_is_2g_ch(b)) \
|| (rtw_is_5g_ch(a) && rtw_is_5g_ch(b)))
#define rtw_is_5g_band1(ch) ((ch) >= 36 && (ch) <= 48)
#define rtw_is_5g_band2(ch) ((ch) >= 52 && (ch) <= 64)
#define rtw_is_5g_band3(ch) ((ch) >= 100 && (ch) <= 144)
#define rtw_is_5g_band4(ch) ((ch) >= 149 && (ch) <= 177)
#define rtw_is_same_5g_band(a, b) \
((rtw_is_5g_band1(a) && rtw_is_5g_band1(b)) \
|| (rtw_is_5g_band2(a) && rtw_is_5g_band2(b)) \
|| (rtw_is_5g_band3(a) && rtw_is_5g_band3(b)) \
|| (rtw_is_5g_band4(a) && rtw_is_5g_band4(b)))
bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region);
bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region);
#endif /* _RTL8711_RF_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_RM_H_
#define __RTW_RM_H_
u8 rm_post_event_hdl(_adapter *padapter, u8 *pbuf);
#define RM_TIMER_NUM 32
#define RM_ALL_MEAS BIT(1)
#define RM_ID_FOR_ALL(aid) ((aid<<16)|RM_ALL_MEAS)
#define RM_CAP_ARG(x) ((u8 *)(x))[4], ((u8 *)(x))[3], ((u8 *)(x))[2], ((u8 *)(x))[1], ((u8 *)(x))[0]
#define RM_CAP_FMT "%02x %02x%02x %02x%02x"
/* remember to modify rm_event_name() when adding new event */
enum RM_EV_ID {
RM_EV_state_in,
RM_EV_busy_timer_expire,
RM_EV_delay_timer_expire,
RM_EV_meas_timer_expire,
RM_EV_retry_timer_expire,
RM_EV_repeat_delay_expire,
RM_EV_request_timer_expire,
RM_EV_wait_report,
RM_EV_start_meas,
RM_EV_survey_done,
RM_EV_recv_rep,
RM_EV_cancel,
RM_EV_state_out,
RM_EV_max
};
struct rm_event {
u32 rmid;
enum RM_EV_ID evid;
_list list;
};
#ifdef CONFIG_RTW_80211K
struct rm_clock {
struct rm_obj *prm;
ATOMIC_T counter;
enum RM_EV_ID evid;
};
struct rm_priv {
u8 enable;
_queue ev_queue;
_queue rm_queue;
_timer rm_timer;
struct rm_clock clock[RM_TIMER_NUM];
u8 rm_en_cap_def[5];
u8 rm_en_cap_assoc[5];
u8 meas_token;
/* rm debug */
void *prm_sel;
};
#define MAX_CH_NUM_IN_OP_CLASS 11
typedef struct _RT_OPERATING_CLASS {
int global_op_class;
int Len;
u8 Channel[MAX_CH_NUM_IN_OP_CLASS];
} RT_OPERATING_CLASS, *PRT_OPERATING_CLASS;
int rtw_init_rm(_adapter *padapter);
int rtw_free_rm_priv(_adapter *padapter);
unsigned int rm_on_action(_adapter *padapter, union recv_frame *precv_frame);
void RM_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
void rtw_ap_parse_sta_rm_en_cap(_adapter *padapter,
struct sta_info *psta, struct rtw_ieee802_11_elems *elems);
int rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid);
void rm_handler(_adapter *padapter, struct rm_event *pev);
u8 rm_add_nb_req(_adapter *padapter, struct sta_info *psta);
/* from ioctl */
int rm_send_bcn_reqs(_adapter *padapter, u8 *sta_addr, u8 op_class, u8 ch,
u16 measure_duration, u8 measure_mode, u8 *bssid, u8 *ssid,
u8 reporting_detail,
u8 n_ap_ch_rpt, struct _RT_OPERATING_CLASS *rpt,
u8 n_elem_id, u8 *elem_id_list);
void indicate_beacon_report(u8 *sta_addr,
u8 n_measure_rpt, u32 elem_len, u8 *elem);
#endif /*CONFIG_RTW_80211K */
#endif /* __RTW_RM_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_RM_FSM_H_
#define __RTW_RM_FSM_H_
#ifdef CONFIG_RTW_80211K
#define RM_SUPPORT_IWPRIV_DBG 1
#define RM_MORE_DBG_MSG 0
#define DBG_BCN_REQ_DETAIL 0
#define DBG_BCN_REQ_WILDCARD 0
#define DBG_BCN_REQ_SSID 0
#define DBG_BCN_REQ_SSID_NAME "RealKungFu"
#define RM_REQ_TIMEOUT 10000 /* 10 seconds */
#define RM_MEAS_TIMEOUT 10000 /* 10 seconds */
#define RM_REPT_SCAN_INTVL 5000 /* 5 seconds */
#define RM_REPT_POLL_INTVL 2000 /* 2 seconds */
#define RM_COND_INTVL 2000 /* 2 seconds */
#define RM_SCAN_DENY_TIMES 10
#define RM_BUSY_TRAFFIC_TIMES 10
#define RM_WAIT_BUSY_TIMEOUT 1000 /* 1 seconds */
#define MEAS_REQ_MOD_PARALLEL BIT(0)
#define MEAS_REQ_MOD_ENABLE BIT(1)
#define MEAS_REQ_MOD_REQUEST BIT(2)
#define MEAS_REQ_MOD_REPORT BIT(3)
#define MEAS_REQ_MOD_DUR_MAND BIT(4)
#define MEAS_REP_MOD_LATE BIT(0)
#define MEAS_REP_MOD_INCAP BIT(1)
#define MEAS_REP_MOD_REFUSE BIT(2)
#define RM_MASTER BIT(0) /* STA who issue meas_req */
#define RM_SLAVE 0 /* STA who do measurement */
#define CLOCK_UNIT 10 /* ms */
#define RTW_MAX_NB_RPT_IE_NUM 16
#define RM_GET_AID(rmid) ((rmid&0xffff0000)>>16)
#define RM_IS_ID_FOR_ALL(rmid) (rmid&RM_ALL_MEAS)
/* IEEE 802.11-2012 Table 8-59 Measurement Type definitions
* for measurement request
* modify rm_meas_type_req_name() when adding new type
*/
enum meas_type_of_req {
basic_req, /* spectrum measurement */
cca_req,
rpi_histo_req,
ch_load_req,
noise_histo_req,
bcn_req,
frame_req,
sta_statis_req,
lci_req,
meas_type_req_max,
};
/* IEEE 802.11-2012 Table 8-81 Measurement Type definitions
* for measurement report
* modify rm_type_rep_name() when adding new type
*/
enum meas_type_of_rep {
basic_rep, /* spectrum measurement */
cca_rep,
rpi_histo_rep,
ch_load_rep, /* radio measurement */
noise_histo_rep,
bcn_rep,
frame_rep,
sta_statis_rep, /* Radio measurement and WNM */
lci_rep,
meas_type_rep_max
};
/*
* Beacon request
*/
/* IEEE 802.11-2012 Table 8-64 Measurement mode for Beacon Request element */
enum bcn_req_meas_mode {
bcn_req_passive,
bcn_req_active,
bcn_req_bcn_table
};
/* IEEE 802.11-2012 Table 8-65 optional subelement IDs for Beacon Request */
enum bcn_req_opt_sub_id{
bcn_req_ssid = 0, /* len 0-32 */
bcn_req_rep_info = 1, /* len 2 */
bcn_req_rep_detail = 2, /* len 1 */
bcn_req_req = 10, /* len 0-237 */
bcn_req_ap_ch_rep = 51 /* len 1-237 */
};
/* IEEE 802.11-2012 Table 8-66 Reporting condition of Beacon Report */
enum bcn_rep_cound_id{
bcn_rep_cond_immediately, /* default */
bcn_req_cond_rcpi_greater,
bcn_req_cond_rcpi_less,
bcn_req_cond_rsni_greater,
bcn_req_cond_rsni_less,
bcn_req_cond_max
};
struct opt_rep_info {
u8 cond;
u8 threshold;
};
#define BCN_REQ_OPT_MAX_NUM 16
#define BCN_REQ_REQ_OPT_MAX_NUM 16
#define BCN_REQ_OPT_AP_CH_RPT_MAX_NUM 12
struct bcn_req_opt {
/* all req cmd id */
u8 opt_id[BCN_REQ_OPT_MAX_NUM];
u8 opt_id_num;
u8 req_id_num;
u8 req_id[BCN_REQ_REQ_OPT_MAX_NUM];
u8 rep_detail;
NDIS_802_11_SSID ssid;
/* bcn report condition */
struct opt_rep_info rep_cond;
u8 ap_ch_rpt_num;
struct _RT_OPERATING_CLASS *ap_ch_rpt[BCN_REQ_OPT_AP_CH_RPT_MAX_NUM];
/* 0:default(Report to be issued after each measurement) */
u8 *req_start; /*id : 10 request;start */
u8 req_len; /*id : 10 request;length */
};
/*
* channel load
*/
/* IEEE 802.11-2012 Table 8-60 optional subelement IDs for channel load request */
enum ch_load_opt_sub_id{
ch_load_rsvd,
ch_load_rep_info
};
/* IEEE 802.11-2012 Table 8-61 Reporting condition for channel load Report */
enum ch_load_cound_id{
ch_load_cond_immediately, /* default */
ch_load_cond_anpi_equal_greater,
ch_load_cond_anpi_equal_less,
ch_load_cond_max
};
/*
* Noise histogram
*/
/* IEEE 802.11-2012 Table 8-62 optional subelement IDs for noise histogram */
enum noise_histo_opt_sub_id{
noise_histo_rsvd,
noise_histo_rep_info
};
/* IEEE 802.11-2012 Table 8-63 Reporting condition for noise historgarm Report */
enum noise_histo_cound_id{
noise_histo_cond_immediately, /* default */
noise_histo_cond_anpi_equal_greater,
noise_histo_cond_anpi_equal_less,
noise_histo_cond_max
};
struct meas_req_opt {
/* report condition */
struct opt_rep_info rep_cond;
};
/*
* State machine
*/
enum RM_STATE {
RM_ST_IDLE,
RM_ST_DO_MEAS,
RM_ST_WAIT_MEAS,
RM_ST_SEND_REPORT,
RM_ST_RECV_REPORT,
RM_ST_END,
RM_ST_MAX
};
struct rm_meas_req {
u8 category;
u8 action_code; /* T8-206 */
u8 diag_token;
u16 rpt;
u8 e_id;
u8 len;
u8 m_token;
u8 m_mode; /* req:F8-105, rep:F8-141 */
u8 m_type; /* T8-59 */
u8 op_class;
u8 ch_num;
u16 rand_intvl; /* units of TU */
u16 meas_dur; /* units of TU */
u8 bssid[6]; /* for bcn_req */
u8 *pssid;
u8 *opt_s_elem_start;
int opt_s_elem_len;
s8 tx_pwr_used; /* for link measurement */
s8 tx_pwr_max; /* for link measurement */
union {
struct bcn_req_opt bcn;
struct meas_req_opt clm;
struct meas_req_opt nhm;
}opt;
struct rtw_ieee80211_channel ch_set[RTW_CHANNEL_SCAN_AMOUNT];
u8 ch_set_ch_amount;
s8 rx_pwr; /* in dBm */
u8 rx_bw;
u8 rx_rate;
u8 rx_rsni;
};
struct rm_meas_rep {
u8 category;
u8 action_code; /* T8-206 */
u8 diag_token;
u8 e_id; /* T8-54, 38 request; 39 report */
u8 len;
u8 m_token;
u8 m_mode; /* req:F8-105, rep:F8-141 */
u8 m_type; /* T8-59 */
u8 op_class;
u8 ch_num;
u8 ch_load;
u8 anpi;
u8 ipi[11];
u16 rpt;
u8 bssid[6]; /* for bcn_req */
};
#define MAX_BUF_NUM 128
struct data_buf {
u8 *pbuf;
u16 len;
};
struct rm_obj {
/* aid << 16
|diag_token << 8
|B(1) 1/0:All_AID/UNIC
|B(0) 1/0:RM_MASTER/RM_SLAVE */
u32 rmid;
enum RM_STATE state;
struct rm_meas_req q;
struct rm_meas_rep p;
struct sta_info *psta;
struct rm_clock *pclock;
/* meas report */
u64 meas_start_time;
u64 meas_end_time;
int wait_busy;
u8 poll_mode;
u8 free_run_counter_valid; /* valid:_SUCCESS/invalid:_FAIL */
struct data_buf buf[MAX_BUF_NUM];
bool from_ioctl;
_list list;
};
/*
* Measurement
*/
struct opt_subelement {
u8 id;
u8 length;
u8 *data;
};
/* 802.11-2012 Table 8-206 Radio Measurment Action field */
enum rm_action_code {
RM_ACT_RADIO_MEAS_REQ,
RM_ACT_RADIO_MEAS_REP,
RM_ACT_LINK_MEAS_REQ,
RM_ACT_LINK_MEAS_REP,
RM_ACT_NB_REP_REQ, /* 4 */
RM_ACT_NB_REP_RESP,
RM_ACT_RESV,
RM_ACT_MAX
};
/* 802.11-2012 Table 8-119 RM Enabled Capabilities definition */
enum rm_cap_en {
RM_LINK_MEAS_CAP_EN,
RM_NB_REP_CAP_EN, /* neighbor report */
RM_PARAL_MEAS_CAP_EN, /* parallel report */
RM_REPEAT_MEAS_CAP_EN,
RM_BCN_PASSIVE_MEAS_CAP_EN,
RM_BCN_ACTIVE_MEAS_CAP_EN,
RM_BCN_TABLE_MEAS_CAP_EN,
RM_BCN_MEAS_REP_COND_CAP_EN, /* conditions */
RM_FRAME_MEAS_CAP_EN,
RM_CH_LOAD_CAP_EN,
RM_NOISE_HISTO_CAP_EN, /* noise historgram */
RM_STATIS_MEAS_CAP_EN, /* statistics */
RM_LCI_MEAS_CAP_EN, /* 12 */
RM_LCI_AMIMUTH_CAP_EN,
RM_TRANS_STREAM_CAT_MEAS_CAP_EN,
RM_TRIG_TRANS_STREAM_CAT_MEAS_CAP_EN,
RM_AP_CH_REP_CAP_EN,
RM_RM_MIB_CAP_EN,
RM_OP_CH_MAX_MEAS_DUR0, /* 18-20 */
RM_OP_CH_MAX_MEAS_DUR1,
RM_OP_CH_MAX_MEAS_DUR2,
RM_NONOP_CH_MAX_MEAS_DUR0, /* 21-23 */
RM_NONOP_CH_MAX_MEAS_DUR1,
RM_NONOP_CH_MAX_MEAS_DUR2,
RM_MEAS_PILOT_CAP0, /* 24-26 */
RM_MEAS_PILOT_CAP1,
RM_MEAS_PILOT_CAP2,
RM_MEAS_PILOT_TRANS_INFO_CAP_EN,
RM_NB_REP_TSF_OFFSET_CAP_EN,
RM_RCPI_MEAS_CAP_EN, /* 29 */
RM_RSNI_MEAS_CAP_EN,
RM_BSS_AVG_ACCESS_DELAY_CAP_EN,
RM_AVALB_ADMIS_CAPACITY_CAP_EN,
RM_ANT_CAP_EN,
RM_RSVD, /* 34-39 */
RM_MAX
};
char *rm_state_name(enum RM_STATE state);
char *rm_event_name(enum RM_EV_ID evid);
char *rm_type_req_name(u8 meas_type);
int _rm_post_event(_adapter *padapter, u32 rmid, enum RM_EV_ID evid);
int rm_enqueue_rmobj(_adapter *padapter, struct rm_obj *obj, bool to_head);
void rm_free_rmobj(struct rm_obj *prm);
struct rm_obj *rm_alloc_rmobj(_adapter *padapter);
struct rm_obj *rm_get_rmobj(_adapter *padapter, u32 rmid);
struct sta_info *rm_get_psta(_adapter *padapter, u32 rmid);
int retrieve_radio_meas_result(struct rm_obj *prm);
int rm_radio_meas_report_cond(struct rm_obj *prm);
int rm_recv_radio_mens_req(_adapter *padapter,
union recv_frame *precv_frame,struct sta_info *psta);
int rm_recv_radio_mens_rep(_adapter *padapter,
union recv_frame *precv_frame, struct sta_info *psta);
int rm_recv_link_mens_req(_adapter *padapter,
union recv_frame *precv_frame,struct sta_info *psta);
int rm_recv_link_mens_rep(_adapter *padapter,
union recv_frame *precv_frame, struct sta_info *psta);
int rm_radio_mens_nb_rep(_adapter *padapter,
union recv_frame *precv_frame, struct sta_info *psta);
int issue_null_reply(struct rm_obj *prm);
int issue_beacon_rep(struct rm_obj *prm);
int issue_nb_req(struct rm_obj *prm);
int issue_radio_meas_req(struct rm_obj *prm);
int issue_radio_meas_rep(struct rm_obj *prm);
int issue_link_meas_req(struct rm_obj *prm);
int issue_link_meas_rep(struct rm_obj *prm);
void rm_set_rep_mode(struct rm_obj *prm, u8 mode);
int ready_for_scan(struct rm_obj *prm);
int rm_sitesurvey(struct rm_obj *prm);
#endif /*CONFIG_RTW_80211K*/
#endif /*__RTW_RM_FSM_H_*/

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_RM_UTIL_H_
#define _RTW_RM_UTIL_H_
/*
* define the following channels as the max channels in each channel plan.
* 2G, total 14 chnls
* {1,2,3,4,5,6,7,8,9,10,11,12,13,14}
* 5G, total 25 chnls
* {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,144,149,153,157,161,165}
*/
#ifndef MAX
#define MAX(x, y) (((x) > (y)) ? (x) : (y))
#endif
u8 rm_get_oper_class_via_ch(u8 ch);
u8 rm_get_ch_set( struct rtw_ieee80211_channel *pch_set, u8 op_class, u8 ch_num);
u8 rm_get_ch_set_from_bcn_req_opt(
struct rtw_ieee80211_channel *pch_set, struct bcn_req_opt *opt);
u8 rm_get_bcn_rsni(struct rm_obj *prm, struct wlan_network *pnetwork);
u8 rm_get_bcn_rcpi(struct rm_obj *prm, struct wlan_network *pnetwork);
u8 rm_get_frame_rsni(struct rm_obj *prm, union recv_frame *pframe);
u8 translate_percentage_to_rcpi(u32 SignalStrengthIndex);
u8 translate_dbm_to_rcpi(s8 SignalPower);
u8 rm_gen_dialog_token(_adapter *padapter);
u8 rm_gen_meas_token(_adapter *padapter);
u32 rm_gen_rmid(_adapter *padapter, struct rm_obj *prm, u8 role);
int is_wildcard_bssid(u8 *bssid);
int rm_get_path_a_max_tx_power(_adapter *adapter, s8 *path_a);
int rm_get_tx_power(PADAPTER adapter, enum rf_path path, enum MGN_RATE rate, s8 *pwr);
int rm_get_rx_sensitivity(PADAPTER adapter, enum channel_width bw, enum MGN_RATE rate, s8 *pwr);
#endif /* _RTW_RM_UTIL_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2020 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_ROCH_H__
#define __RTW_ROCH_H__
#include <drv_types.h>
struct rtw_roch_parm;
#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211)
struct roch_info {
#ifdef CONFIG_CONCURRENT_MODE
_timer ap_roch_ch_switch_timer; /* Used to switch the channel between legacy AP and listen state. */
#ifdef CONFIG_IOCTL_CFG80211
u32 min_home_dur; /* min duration for traffic, home_time */
u32 max_away_dur; /* max acceptable away duration, home_away_time */
#endif
#endif
#ifdef CONFIG_IOCTL_CFG80211
_timer remain_on_ch_timer;
u8 restore_channel;
struct ieee80211_channel remain_on_ch_channel;
enum nl80211_channel_type remain_on_ch_type;
ATOMIC_T ro_ch_cookie_gen;
u64 remain_on_ch_cookie;
bool is_ro_ch;
struct wireless_dev *ro_ch_wdev;
systime last_ro_ch_time; /* this will be updated at the beginning and end of ro_ch */
#endif
};
#endif
#ifdef CONFIG_IOCTL_CFG80211
u8 rtw_roch_stay_in_cur_chan(_adapter *padapter);
#endif
#if (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211)
s32 rtw_roch_wk_hdl(_adapter *padapter, int intCmdType, u8 *buf);
u8 rtw_roch_wk_cmd(_adapter *padapter, int intCmdType, struct rtw_roch_parm *roch_parm, u8 flags);
#ifdef CONFIG_CONCURRENT_MODE
void rtw_concurrent_handler(_adapter *padapter);
#endif
void rtw_init_roch_info(_adapter *padapter);
#endif /* (defined(CONFIG_P2P) && defined(CONFIG_CONCURRENT_MODE)) || defined(CONFIG_IOCTL_CFG80211) */
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTW_RSON_H_
#define __RTW_RSON_H_
#define RTW_RSON_VER 1
#define RTW_RSON_SCORE_NOTSUP 0x0
#define RTW_RSON_SCORE_NOTCNNT 0x1
#define RTW_RSON_SCORE_MAX 0xFF
#define RTW_RSON_HC_NOTREADY 0xFF
#define RTW_RSON_HC_ROOT 0x0
#define RTW_RSON_ALLOWCONNECT 0x1
#define RTW_RSON_DENYCONNECT 0x0
/* for rtw self-origanization spec 1 */
struct rtw_rson_struct {
u8 ver;
u32 id;
u8 hopcnt;
u8 connectible;
u8 loading;
u8 res[16];
} __attribute__((__packed__));
void init_rtw_rson_data(struct dvobj_priv *dvobj);
void rtw_rson_get_property_str(_adapter *padapter, char *rson_data_str);
int rtw_rson_set_property(_adapter *padapter, char *field, char *value);
int rtw_rson_choose(struct wlan_network **candidate, struct wlan_network *competitor);
int rtw_get_rson_struct(WLAN_BSSID_EX *bssid, struct rtw_rson_struct *rson_data);
u8 rtw_cal_rson_score(struct rtw_rson_struct *cand_rson_data, NDIS_802_11_RSSI Rssi);
void rtw_rson_handle_ie(WLAN_BSSID_EX *bssid, u8 ie_offset);
u32 rtw_rson_append_ie(_adapter *padapter, unsigned char *pframe, u32 *len);
void rtw_rson_do_disconnect(_adapter *padapter);
void rtw_rson_join_done(_adapter *padapter);
int rtw_rson_isupdate_roamcan(struct mlme_priv *mlme, struct wlan_network **candidate, struct wlan_network *competitor);
void rtw_rson_show_survey_info(struct seq_file *m, _list *plist, _list *phead);
u8 rtw_rson_ap_check_sta(_adapter *padapter, u8 *pframe, uint pkt_len, unsigned short ie_offset);
u8 rtw_rson_scan_wk_cmd(_adapter *padapter, int op);
void rtw_rson_scan_cmd_hdl(_adapter *padapter, int op);
#endif /* __RTW_RSON_H_ */

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/******************************************************************************
*
* Copyright(c) 2015 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_SDIO_H_
#define _RTW_SDIO_H_
#include <drv_types.h> /* struct dvobj_priv and etc. */
u8 rtw_sdio_read_cmd52(struct dvobj_priv *, u32 addr, void *buf, size_t len);
u8 rtw_sdio_read_cmd53(struct dvobj_priv *, u32 addr, void *buf, size_t len);
u8 rtw_sdio_write_cmd52(struct dvobj_priv *, u32 addr, void *buf, size_t len);
u8 rtw_sdio_write_cmd53(struct dvobj_priv *, u32 addr, void *buf, size_t len);
u8 rtw_sdio_f0_read(struct dvobj_priv *, u32 addr, void *buf, size_t len);
#endif /* _RTW_SDIO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_SECURITY_H_
#define __RTW_SECURITY_H_
enum security_type {
/* TYPE */
_NO_PRIVACY_ = 0x00,
_WEP40_ = 0x01,
_TKIP_ = 0x02,
_TKIP_WTMIC_ = 0x03,
_AES_ = 0x04,
_WEP104_ = 0x05,
_SMS4_ = 0x06,
_GCMP_ = 0x07,
_SEC_TYPE_MAX_,
/* EXT_SECTYPE=1 */
_SEC_TYPE_256_ = 0x10,
_CCMP_256_ = (_AES_ | _SEC_TYPE_256_),
_GCMP_256_ = (_GCMP_ | _SEC_TYPE_256_),
#ifdef CONFIG_IEEE80211W
/* EXT_SECTYPE=0, MGNT=1, GK=0/1, KEYID=00/01 */
_SEC_TYPE_BIT_ = 0x20,
_BIP_CMAC_128_ = (_SEC_TYPE_BIT_),
_BIP_GMAC_128_ = (_SEC_TYPE_BIT_ + 1),
_BIP_GMAC_256_ = (_SEC_TYPE_BIT_ + 2),
/* EXT_SECTYPE=1, MGNT=1, GK=1, KEYID=00/01 */
_BIP_CMAC_256_ = (_SEC_TYPE_BIT_ + 3),
_BIP_MAX_,
#endif
};
/* 802.11W use wrong key */
#define IEEE80211W_RIGHT_KEY 0x0
#define IEEE80211W_WRONG_KEY 0x1
#define IEEE80211W_NO_KEY 0x2
#define CCMPH_2_PN(ch) ((ch) & 0x000000000000ffff) \
| (((ch) & 0xffffffff00000000) >> 16)
#define is_wep_enc(alg) (((alg) == _WEP40_) || ((alg) == _WEP104_))
const char *security_type_str(u8 value);
#ifdef CONFIG_IEEE80211W
u32 security_type_bip_to_gmcs(enum security_type type);
#endif
#define _WPA_IE_ID_ 0xdd
#define _WPA2_IE_ID_ 0x30
#define RTW_KEK_LEN 16
#define RTW_KCK_LEN 16
#define RTW_TKIP_MIC_LEN 8
#define RTW_REPLAY_CTR_LEN 8
#define INVALID_SEC_MAC_CAM_ID 0xFF
typedef enum {
ENCRYP_PROTOCOL_OPENSYS, /* open system */
ENCRYP_PROTOCOL_WEP, /* WEP */
ENCRYP_PROTOCOL_WPA, /* WPA */
ENCRYP_PROTOCOL_WPA2, /* WPA2 */
ENCRYP_PROTOCOL_WAPI, /* WAPI: Not support in this version */
ENCRYP_PROTOCOL_MAX
} ENCRYP_PROTOCOL_E;
#ifndef Ndis802_11AuthModeWPA2
#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1)
#endif
#ifndef Ndis802_11AuthModeWPA2PSK
#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2)
#endif
union pn48 {
u64 val;
#ifdef CONFIG_LITTLE_ENDIAN
struct {
u8 TSC0;
u8 TSC1;
u8 TSC2;
u8 TSC3;
u8 TSC4;
u8 TSC5;
u8 TSC6;
u8 TSC7;
} _byte_;
#elif defined(CONFIG_BIG_ENDIAN)
struct {
u8 TSC7;
u8 TSC6;
u8 TSC5;
u8 TSC4;
u8 TSC3;
u8 TSC2;
u8 TSC1;
u8 TSC0;
} _byte_;
#endif
};
union Keytype {
u8 skey[32];
};
typedef struct _RT_PMKID_LIST {
u8 bUsed;
u8 Bssid[6];
u8 PMKID[16];
u8 SsidBuf[33];
u8 *ssid_octet;
u16 ssid_length;
} RT_PMKID_LIST, *PRT_PMKID_LIST;
struct security_priv {
u32 dot11AuthAlgrthm; /* 802.11 auth, could be open, shared, 8021x and authswitch */
u32 dot11PrivacyAlgrthm; /* This specify the privacy for shared auth. algorithm. */
/* WEP */
u32 dot11PrivacyKeyIndex; /* this is only valid for legendary wep, 0~3 for key id. (tx key index) */
union Keytype dot11DefKey[6]; /* this is only valid for def. key */
u32 dot11DefKeylen[6];
u8 dot11Def_camid[6];
u8 key_mask; /* use to restore wep key after hal_init */
u32 dot118021XGrpPrivacy; /* This specify the privacy algthm. used for Grp key */
u32 dot118021XGrpKeyid; /* key id used for Grp Key ( tx key index) */
union Keytype dot118021XGrpKey[6]; /* 802.1x Group Key, for inx0 and inx1 */
union Keytype dot118021XGrptxmickey[6];
union Keytype dot118021XGrprxmickey[6];
union pn48 dot11Grptxpn; /* PN48 used for Grp Key xmit. */
union pn48 dot11Grprxpn; /* PN48 used for Grp Key recv. */
u8 iv_seq[4][8];
#ifdef CONFIG_IEEE80211W
enum security_type dot11wCipher;
u32 dot11wBIPKeyid; /* key id used for BIP Key ( tx key index) */
union Keytype dot11wBIPKey[6]; /* BIP Key, for index4 and index5 */
union pn48 dot11wBIPtxpn; /* PN48 used for BIP xmit. */
union pn48 dot11wBIPrxpn; /* PN48 used for BIP recv. */
#endif /* CONFIG_IEEE80211W */
#ifdef CONFIG_AP_MODE
/* extend security capabilities for AP_MODE */
unsigned int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
unsigned int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
unsigned int wpa_group_cipher;
unsigned int wpa2_group_cipher;
unsigned int wpa_pairwise_cipher;
unsigned int wpa2_pairwise_cipher;
unsigned int akmp; /* An authentication and key management protocol */
#endif
u8 mfp_opt;
u8 dot118021x_bmc_cam_id;
/*IEEE802.11-2012 Std. Table 8-101 AKM Suite Selectors*/
u32 rsn_akm_suite_type;
u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
int wps_ie_len;
u8 owe_ie[MAX_OWE_IE_LEN];/* added in assoc req */
int owe_ie_len;
u8 binstallGrpkey;
#ifdef CONFIG_GTK_OL
u8 binstallKCK_KEK;
#endif /* CONFIG_GTK_OL */
#ifdef CONFIG_IEEE80211W
u8 binstallBIPkey;
#endif /* CONFIG_IEEE80211W */
u8 busetkipkey;
u8 bcheck_grpkey;
u8 bgrpkey_handshake;
u8 auth_alg;
u8 auth_type;
u8 extauth_status;
/* u8 packet_cnt; */ /* unused, removed */
s32 sw_encrypt;/* from registry_priv */
s32 sw_decrypt;/* from registry_priv */
s32 hw_decrypted;/* if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready. */
/* keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc) */
u32 ndisauthtype; /* NDIS_802_11_AUTHENTICATION_MODE */
u32 ndisencryptstatus; /* NDIS_802_11_ENCRYPTION_STATUS */
NDIS_802_11_WEP ndiswep;
u8 assoc_info[600];
u8 szofcapability[256]; /* for wpa2 usage */
u8 oidassociation[512]; /* for wpa/wpa2 usage */
u8 authenticator_ie[256]; /* store ap security information element */
u8 supplicant_ie[256]; /* store sta security information element */
/* for tkip countermeasure */
systime last_mic_err_time;
u8 btkip_countermeasure;
u8 btkip_wait_report;
systime btkip_countermeasure_time;
/* --------------------------------------------------------------------------- */
/* For WPA2 Pre-Authentication. */
/* --------------------------------------------------------------------------- */
/* u8 RegEnablePreAuth; */ /* Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01. */
/* u8 EnablePreAuthentication; */ /* Current Value: Pre-Authentication enabled or not. */
RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE]; /* Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13. */
u8 PMKIDIndex;
/* u32 PMKIDCount; */ /* Added by Annie, 2006-10-13. */
/* u8 szCapability[256]; */ /* For WPA2-PSK using zero-config, by Annie, 2005-09-20. */
u8 bWepDefaultKeyIdxSet;
#define DBG_SW_SEC_CNT
#ifdef DBG_SW_SEC_CNT
u64 wep_sw_enc_cnt_bc;
u64 wep_sw_enc_cnt_mc;
u64 wep_sw_enc_cnt_uc;
u64 wep_sw_dec_cnt_bc;
u64 wep_sw_dec_cnt_mc;
u64 wep_sw_dec_cnt_uc;
u64 tkip_sw_enc_cnt_bc;
u64 tkip_sw_enc_cnt_mc;
u64 tkip_sw_enc_cnt_uc;
u64 tkip_sw_dec_cnt_bc;
u64 tkip_sw_dec_cnt_mc;
u64 tkip_sw_dec_cnt_uc;
u64 aes_sw_enc_cnt_bc;
u64 aes_sw_enc_cnt_mc;
u64 aes_sw_enc_cnt_uc;
u64 aes_sw_dec_cnt_bc;
u64 aes_sw_dec_cnt_mc;
u64 aes_sw_dec_cnt_uc;
u64 gcmp_sw_enc_cnt_bc;
u64 gcmp_sw_enc_cnt_mc;
u64 gcmp_sw_enc_cnt_uc;
u64 gcmp_sw_dec_cnt_bc;
u64 gcmp_sw_dec_cnt_mc;
u64 gcmp_sw_dec_cnt_uc;
#endif /* DBG_SW_SEC_CNT */
};
#ifdef CONFIG_IEEE80211W
#define SEC_IS_BIP_KEY_INSTALLED(sec) ((sec)->binstallBIPkey)
#else
#define SEC_IS_BIP_KEY_INSTALLED(sec) _FALSE
#endif
#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\
do {\
switch (psecuritypriv->dot11AuthAlgrthm) {\
case dot11AuthAlgrthm_Open:\
case dot11AuthAlgrthm_Shared:\
case dot11AuthAlgrthm_Auto:\
encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\
break;\
case dot11AuthAlgrthm_8021X:\
if (bmcst)\
encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\
else\
encry_algo = (u8) psta->dot118021XPrivacy;\
break;\
case dot11AuthAlgrthm_WAPI:\
encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\
break;\
} \
} while (0)
#define _AES_IV_LEN_ 8
#define SET_ICE_IV_LEN(iv_len, icv_len, encrypt)\
do {\
switch (encrypt) {\
case _WEP40_:\
case _WEP104_:\
iv_len = 4;\
icv_len = 4;\
break;\
case _TKIP_:\
iv_len = 8;\
icv_len = 4;\
break;\
case _AES_:\
iv_len = 8;\
icv_len = 8;\
break;\
case _GCMP_:\
case _GCMP_256_:\
iv_len = 8;\
icv_len = 16;\
break;\
case _CCMP_256_:\
iv_len = 8;\
icv_len = 16;\
break;\
case _SMS4_:\
iv_len = 18;\
icv_len = 16;\
break;\
default:\
iv_len = 0;\
icv_len = 0;\
break;\
} \
} while (0)
#define GET_TKIP_PN(iv, dot11txpn)\
do {\
dot11txpn._byte_.TSC0 = iv[2];\
dot11txpn._byte_.TSC1 = iv[0];\
dot11txpn._byte_.TSC2 = iv[4];\
dot11txpn._byte_.TSC3 = iv[5];\
dot11txpn._byte_.TSC4 = iv[6];\
dot11txpn._byte_.TSC5 = iv[7];\
} while (0)
#define ROL32(A, n) (((A) << (n)) | (((A)>>(32-(n))) & ((1UL << (n)) - 1)))
#define ROR32(A, n) ROL32((A), 32-(n))
struct mic_data {
u32 K0, K1; /* Key */
u32 L, R; /* Current state */
u32 M; /* Message accumulator (single word) */
u32 nBytesInM; /* # bytes in M */
};
void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key);
void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b);
void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes);
void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst);
void rtw_seccalctkipmic(
u8 *key,
u8 *header,
u8 *data,
u32 data_len,
u8 *Miccode,
u8 priority);
u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe);
u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe);
void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe);
u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe);
u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe);
void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe);
u32 rtw_gcmp_encrypt(_adapter *padapter, u8 *pxmitframe);
u32 rtw_gcmp_decrypt(_adapter *padapter, u8 *precvframe);
#ifdef CONFIG_RTW_MESH_AEK
int rtw_aes_siv_encrypt(const u8 *key, size_t key_len,
const u8 *pw, size_t pwlen, size_t num_elem,
const u8 *addr[], const size_t *len, u8 *out);
int rtw_aes_siv_decrypt(const u8 *key, size_t key_len,
const u8 *iv_crypt, size_t iv_c_len, size_t num_elem,
const u8 *addr[], const size_t *len, u8 *out);
#endif /* CONFIG_RTW_MESH_AEK */
#ifdef CONFIG_IEEE80211W
u8 rtw_calculate_bip_mic(enum security_type gmcs, u8 *whdr_pos, s32 len,
const u8 *key, const u8 *data, size_t data_len, u8 *mic);
u32 rtw_bip_verify(enum security_type gmcs, u16 pkt_len,
u8 *whdr_pos, sint flen, const u8 *key, u16 keyid, u64 *ipn);
#endif
#ifdef CONFIG_TDLS
void wpa_tdls_generate_tpk(_adapter *padapter, void *sta);
int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq,
u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie,
u8 *mic);
int wpa_tdls_teardown_ftie_mic(u8 *kck, u8 *lnkid, u16 reason,
u8 dialog_token, u8 trans_seq, u8 *ftie, u8 *mic);
int tdls_verify_mic(u8 *kck, u8 trans_seq,
u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie);
#endif /* CONFIG_TDLS */
void rtw_sec_restore_wep_key(_adapter *adapter);
u8 rtw_handle_tkip_countermeasure(_adapter *adapter, const char *caller);
#ifdef CONFIG_WOWLAN
u16 rtw_calc_crc(u8 *pdata, int length);
#endif /*CONFIG_WOWLAN*/
#define rtw_sec_chk_auth_alg(a, s) \
((a)->securitypriv.auth_alg == (s))
#define rtw_sec_chk_auth_type(a, s) \
((a)->securitypriv.auth_type == (s))
#endif /* __RTL871X_SECURITY_H_ */
u32 rtw_calc_crc32(u8 *data, size_t len);

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_SRESET_H_
#define _RTW_SRESET_H_
/* #include <drv_types.h> */
enum {
SRESET_TGP_NULL = 0,
SRESET_TGP_XMIT_STATUS = 1,
SRESET_TGP_LINK_STATUS = 2,
SRESET_TGP_INFO = 99,
};
struct sreset_priv {
_mutex silentreset_mutex;
u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
systime last_tx_time;
systime last_tx_complete_time;
s32 dbg_trigger_point;
u64 self_dect_tx_cnt;
u64 self_dect_rx_cnt;
u64 self_dect_fw_cnt;
u64 tx_dma_status_cnt;
u64 rx_dma_status_cnt;
u8 rx_cnt;
u8 self_dect_fw;
u8 self_dect_case;
u16 last_mac_rxff_ptr;
u8 dbg_sreset_ctrl;
};
#define WIFI_STATUS_SUCCESS 0
#define USB_VEN_REQ_CMD_FAIL BIT0
#define USB_READ_PORT_FAIL BIT1
#define USB_WRITE_PORT_FAIL BIT2
#define WIFI_MAC_TXDMA_ERROR BIT3
#define WIFI_TX_HANG BIT4
#define WIFI_RX_HANG BIT5
#define WIFI_IF_NOT_EXIST BIT6
void sreset_init_value(_adapter *padapter);
void sreset_reset_value(_adapter *padapter);
u8 sreset_get_wifi_status(_adapter *padapter);
void sreset_set_wifi_error_status(_adapter *padapter, u32 status);
void sreset_set_trigger_point(_adapter *padapter, s32 tgp);
bool sreset_inprogress(_adapter *padapter);
void sreset_reset(_adapter *padapter);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_SWCRYPTO_H_
#define __RTW_SWCRYPTO_H_
#define NEW_CRYPTO 1
int _rtw_ccmp_encrypt(_adapter *padapter, u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen);
int _rtw_ccmp_decrypt(_adapter *padapter, u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen);
int _rtw_gcmp_encrypt(_adapter *padapter, u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen);
int _rtw_gcmp_decrypt(_adapter *padapter, u8 *key, u32 key_len, uint hdrlen, u8 *frame, uint plen);
#ifdef CONFIG_RTW_MESH_AEK
int _aes_siv_encrypt(const u8 *key, size_t key_len,
const u8 *pw, size_t pwlen,
size_t num_elem, const u8 *addr[], const size_t *len, u8 *out);
int _aes_siv_decrypt(const u8 *key, size_t key_len,
const u8 *iv_crypt, size_t iv_c_len,
size_t num_elem, const u8 *addr[], const size_t *len, u8 *out);
#endif
#if defined(CONFIG_IEEE80211W) | defined(CONFIG_TDLS)
u8 _bip_ccmp_protect(const u8 *key, size_t key_len,
const u8 *data, size_t data_len, u8 *mic);
u8 _bip_gcmp_protect(u8 *whdr_pos, size_t len,
const u8 *key, size_t key_len,
const u8 *data, size_t data_len, u8 *mic);
#endif /* CONFIG_IEEE80211W */
#ifdef CONFIG_TDLS
void _tdls_generate_tpk(void *sta, const u8 *own_addr, const u8 *bssid);
#endif /* CONFIG_TDLS */
#endif /* __RTW_SWCRYPTO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_TDLS_H_
#define __RTW_TDLS_H_
#ifdef CONFIG_TDLS
/* TDLS STA state */
/* TDLS Diect Link Establishment */
#define TDLS_STATE_NONE 0x00000000 /* Default state */
#define TDLS_INITIATOR_STATE BIT(28) /* 0x10000000 */
#define TDLS_RESPONDER_STATE BIT(29) /* 0x20000000 */
#define TDLS_LINKED_STATE BIT(30) /* 0x40000000 */
/* TDLS PU Buffer STA */
#define TDLS_WAIT_PTR_STATE BIT(24) /* 0x01000000 */ /* Waiting peer's TDLS_PEER_TRAFFIC_RESPONSE frame */
/* TDLS Check ALive */
#define TDLS_ALIVE_STATE BIT(20) /* 0x00100000 */ /* Check if peer sta is alived. */
/* TDLS Channel Switch */
#define TDLS_CH_SWITCH_PREPARE_STATE BIT(15) /* 0x00008000 */
#define TDLS_CH_SWITCH_ON_STATE BIT(16) /* 0x00010000 */
#define TDLS_PEER_AT_OFF_STATE BIT(17) /* 0x00020000 */ /* Could send pkt on target ch */
#define TDLS_CH_SW_INITIATOR_STATE BIT(18) /* 0x00040000 */ /* Avoid duplicated or unconditional ch. switch rsp. */
#define TDLS_WAIT_CH_RSP_STATE BIT(19) /* 0x00080000 */ /* Wait Ch. response as we are TDLS channel switch initiator */
#define TDLS_TPK_RESEND_COUNT 86400 /*Unit: seconds */
#define TDLS_CH_SWITCH_TIME 15
#define TDLS_CH_SWITCH_TIMEOUT 30
#define TDLS_CH_SWITCH_OPER_OFFLOAD_TIMEOUT 10
#define TDLS_SIGNAL_THRESH 0x20
#define TDLS_WATCHDOG_PERIOD 10 /* Periodically sending tdls discovery request in TDLS_WATCHDOG_PERIOD * 2 sec */
#define TDLS_HANDSHAKE_TIME 3000
#define TDLS_PTI_TIME 7000
#define TDLS_CH_SW_STAY_ON_BASE_CHNL_TIMEOUT 20 /* ms */
#define TDLS_CH_SW_MONITOR_TIMEOUT 2000 /*ms */
#define TDLS_MIC_LEN 16
#define WPA_NONCE_LEN 32
#define TDLS_TIMEOUT_LEN 4
enum TDLS_CH_SW_CHNL {
TDLS_CH_SW_BASE_CHNL = 0,
TDLS_CH_SW_OFF_CHNL
};
#define TDLS_MIC_CTRL_LEN 2
#define TDLS_FTIE_DATA_LEN (TDLS_MIC_CTRL_LEN + TDLS_MIC_LEN + \
WPA_NONCE_LEN + WPA_NONCE_LEN)
struct wpa_tdls_ftie {
u8 ie_type; /* FTIE */
u8 ie_len;
union {
struct {
u8 mic_ctrl[TDLS_MIC_CTRL_LEN];
u8 mic[TDLS_MIC_LEN];
u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */
u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */
};
struct {
u8 data[TDLS_FTIE_DATA_LEN];
};
};
/* followed by optional elements */
} ;
struct wpa_tdls_lnkid {
u8 ie_type; /* Link Identifier IE */
u8 ie_len;
u8 bssid[ETH_ALEN];
u8 init_sta[ETH_ALEN];
u8 resp_sta[ETH_ALEN];
} ;
static u8 TDLS_RSNIE[20] = { 0x01, 0x00, /* Version shall be set to 1 */
0x00, 0x0f, 0xac, 0x07, /* Group sipher suite */
0x01, 0x00, /* Pairwise cipher suite count */
0x00, 0x0f, 0xac, 0x04, /* Pairwise cipher suite list; CCMP only */
0x01, 0x00, /* AKM suite count */
0x00, 0x0f, 0xac, 0x07, /* TPK Handshake */
0x0c, 0x02,
/* PMKID shall not be present */
};
static u8 TDLS_WMMIE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; /* Qos info all set zero */
static u8 TDLS_WMM_PARAM_IE[] = {0x00, 0x00, 0x03, 0xa4, 0x00, 0x00, 0x27, 0xa4, 0x00, 0x00, 0x42, 0x43, 0x5e, 0x00, 0x62, 0x32, 0x2f, 0x00};
static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20, 0x00, 0x00, 0x00}; /* bit(28), bit(30), bit(37) */
/* SRC: Supported Regulatory Classes */
static u8 TDLS_SRC[] = { 0x01, 0x01, 0x02, 0x03, 0x04, 0x0c, 0x16, 0x17, 0x18, 0x19, 0x1b, 0x1c, 0x1d, 0x1e, 0x20, 0x21 };
int check_ap_tdls_prohibited(u8 *pframe, u8 pkt_len);
int check_ap_tdls_ch_switching_prohibited(u8 *pframe, u8 pkt_len);
void rtw_set_tdls_enable(_adapter *padapter, u8 enable);
u8 rtw_is_tdls_enabled(_adapter *padapter);
u8 rtw_is_tdls_sta_existed(_adapter *padapter);
u8 rtw_tdls_is_setup_allowed(_adapter *padapter);
#ifdef CONFIG_TDLS_CH_SW
u8 rtw_tdls_is_chsw_allowed(_adapter *padapter);
#endif
void rtw_tdls_set_link_established(_adapter *adapter, bool en);
void rtw_reset_tdls_info(_adapter *padapter);
int rtw_init_tdls_info(_adapter *padapter);
void rtw_free_tdls_info(struct tdls_info *ptdlsinfo);
void rtw_free_all_tdls_sta(_adapter *padapter, u8 enqueue_cmd);
void rtw_enable_tdls_func(_adapter *padapter);
void rtw_disable_tdls_func(_adapter *padapter, u8 enqueue_cmd);
int issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, unsigned char *da, unsigned int power_mode, int try_cnt, int wait_ms);
void rtw_init_tdls_timer(_adapter *padapter, struct sta_info *psta);
void rtw_cancel_tdls_timer(struct sta_info *psta);
void rtw_tdls_teardown_pre_hdl(_adapter *padapter, struct sta_info *psta);
void rtw_tdls_teardown_post_hdl(_adapter *padapter, struct sta_info *psta, u8 enqueue_cmd);
#ifdef CONFIG_TDLS_CH_SW
void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable);
void rtw_tdls_ch_sw_back_to_base_chnl(_adapter *padapter);
s32 rtw_tdls_do_ch_sw(_adapter *padapter, struct sta_info *ptdls_sta, u8 chnl_type, u8 channel, u8 channel_offset, u16 bwmode, u16 ch_switch_time);
void rtw_tdls_chsw_oper_done(_adapter *padapter);
#endif
#ifdef CONFIG_WFD
int issue_tunneled_probe_req(_adapter *padapter);
int issue_tunneled_probe_rsp(_adapter *padapter, union recv_frame *precv_frame);
#endif /* CONFIG_WFD */
int issue_tdls_dis_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt);
int issue_tdls_setup_req(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack);
int issue_tdls_setup_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt);
int issue_tdls_setup_cfm(_adapter *padapter, struct tdls_txmgmt *ptxmgmt);
int issue_tdls_dis_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 privacy);
int issue_tdls_teardown(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, u8 wait_ack);
int issue_tdls_peer_traffic_rsp(_adapter *padapter, struct sta_info *psta, struct tdls_txmgmt *ptxmgmt);
int issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *psta);
#ifdef CONFIG_TDLS_CH_SW
int issue_tdls_ch_switch_req(_adapter *padapter, struct sta_info *ptdls_sta);
int issue_tdls_ch_switch_rsp(_adapter *padapter, struct tdls_txmgmt *ptxmgmt, int wait_ack);
#endif
sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame);
sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
int On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
int On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
int On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame);
int On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
int On_TDLS_Peer_Traffic_Indication(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
int On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
#ifdef CONFIG_TDLS_CH_SW
sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame, struct sta_info *ptdls_sta);
void rtw_build_tdls_ch_switch_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_ch_switch_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
#endif
void rtw_build_tdls_setup_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_setup_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_setup_cfm_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_teardown_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_dis_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt);
void rtw_build_tdls_dis_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, u8 privacy);
void rtw_build_tdls_peer_traffic_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tdls_peer_traffic_indication_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe, struct tdls_txmgmt *ptxmgmt, struct sta_info *ptdls_sta);
void rtw_build_tunneled_probe_req_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe);
void rtw_build_tunneled_probe_rsp_ies(_adapter *padapter, struct xmit_frame *pxmitframe, u8 *pframe);
int rtw_tdls_is_driver_setup(_adapter *padapter);
void rtw_tdls_set_key(_adapter *padapter, struct sta_info *ptdls_sta);
const char *rtw_tdls_action_txt(enum TDLS_ACTION_FIELD action);
#endif /* CONFIG_TDLS */
#endif

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#define DRIVERVERSION "v5.13.3-17-gb1925f81a.20210615"

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _RTW_VHT_H_
#define _RTW_VHT_H_
#define VHT_CAP_IE_LEN 12
#define VHT_OP_IE_LEN 5
#define LDPC_VHT_ENABLE_RX BIT0
#define LDPC_VHT_ENABLE_TX BIT1
#define LDPC_VHT_TEST_TX_ENABLE BIT2
#define LDPC_VHT_CAP_TX BIT3
#define STBC_VHT_ENABLE_RX BIT0
#define STBC_VHT_ENABLE_TX BIT1
#define STBC_VHT_TEST_TX_ENABLE BIT2
#define STBC_VHT_CAP_TX BIT3
/* VHT capability info */
#define SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val)
#define SET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 2, 2, _val)
#define SET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 1, _val)
#define SET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 5, 1, _val)
#define SET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 6, 1, _val)
#define SET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val)
#define SET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 0, 3, _val)
#define SET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 3, 1, _val)
#define SET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 4, 1, _val)
#define SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+1, 5, 3, _val)
#define SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 0, 3, _val)
#define SET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 3, 1, _val)
#define SET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 4, 1, _val)
#define SET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 5, 1, _val)
#define SET_VHT_CAPABILITY_ELE_HTC_VHT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 1, _val)
#define SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+2, 7, 3, _val) /* B23~B25 */
#define SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 2, 2, _val)
#define SET_VHT_CAPABILITY_ELE_MCS_RX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+4, 0, 16, _val) /* B0~B15 indicate Rx MCS MAP, we write 0 to indicate MCS0~7. by page */
#define SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+6, 0, 13, _val)
#define SET_VHT_CAPABILITY_ELE_MCS_TX_MAP(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+8, 0, 16, _val) /* B0~B15 indicate Tx MCS MAP, we write 0 to indicate MCS0~7. by page */
#define SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+10, 0, 13, _val)
#define GET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2)
#define GET_VHT_CAPABILITY_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 2, 2)
#define GET_VHT_CAPABILITY_ELE_RX_LDPC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 1)
#define GET_VHT_CAPABILITY_ELE_SHORT_GI80M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 5, 1)
#define GET_VHT_CAPABILITY_ELE_SHORT_GI160M(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 6, 1)
#define GET_VHT_CAPABILITY_ELE_TX_STBC(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1)
#define GET_VHT_CAPABILITY_ELE_RX_STBC(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 3)
#define GET_VHT_CAPABILITY_ELE_SU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 3, 1)
#define GET_VHT_CAPABILITY_ELE_SU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 4, 1)
/*phydm-beamforming*/
#define GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+1, 5, 3)
#define GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 0, 3)
#define GET_VHT_CAPABILITY_ELE_MU_BFER(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 3, 1)
#define GET_VHT_CAPABILITY_ELE_MU_BFEE(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 4, 1)
#define GET_VHT_CAPABILITY_ELE_TXOP_PS(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 5, 1)
#define GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+2, 7, 3)
#define GET_VHT_CAPABILITY_ELE_RX_MCS(_pEleStart) ((_pEleStart)+4)
#define GET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+6, 0, 13)
#define GET_VHT_CAPABILITY_ELE_TX_MCS(_pEleStart) ((_pEleStart)+8)
#define GET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(_pEleStart) LE_BITS_TO_2BYTE((_pEleStart)+10, 0, 13)
/* VHT Operation Information Element */
#define SET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 8, _val)
#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+1, 0, 8, _val)
#define SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart+2, 0, 8, _val)
#define SET_VHT_OPERATION_ELE_BASIC_MCS_SET(_pEleStart, _val) SET_BITS_TO_LE_2BYTE((_pEleStart)+3, 0, 16, _val)
#define GET_VHT_OPERATION_ELE_CHL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 8)
#define GET_VHT_OPERATION_ELE_CENTER_FREQ1(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+1, 0, 8)
#define GET_VHT_OPERATION_ELE_CENTER_FREQ2(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+2, 0, 8)
/* VHT Operating Mode */
#define SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 0, 2, _val)
#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 4, 3, _val)
#define SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart, _val) SET_BITS_TO_LE_1BYTE(_pEleStart, 7, 1, _val)
#define GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 0, 2)
#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 4, 3)
#define GET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(_pEleStart) LE_BITS_TO_1BYTE(_pEleStart, 7, 1)
#define SET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+7, 6, 1, _val)
#define GET_EXT_CAPABILITY_ELE_OP_MODE_NOTIF(_pEleStart) LE_BITS_TO_1BYTE((_pEleStart)+7, 6, 1)
#define VHT_MAX_MPDU_LEN_MAX 3
extern const u16 _vht_max_mpdu_len[];
#define vht_max_mpdu_len(val) (((val) >= VHT_MAX_MPDU_LEN_MAX) ? _vht_max_mpdu_len[VHT_MAX_MPDU_LEN_MAX] : _vht_max_mpdu_len[(val)])
#define VHT_SUP_CH_WIDTH_SET_MAX 3
extern const u8 _vht_sup_ch_width_set_to_bw_cap[];
#define vht_sup_ch_width_set_to_bw_cap(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_to_bw_cap[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_to_bw_cap[(set)])
#define VHT_MAX_AMPDU_LEN(f) ((1 << (13 + f)) - 1)
#ifdef CONFIG_RTW_DEBUG
extern const char *const _vht_sup_ch_width_set_str[];
#define vht_sup_ch_width_set_str(set) (((set) >= VHT_SUP_CH_WIDTH_SET_MAX) ? _vht_sup_ch_width_set_str[VHT_SUP_CH_WIDTH_SET_MAX] : _vht_sup_ch_width_set_str[(set)])
void dump_vht_cap_ie(void *sel, const u8 *ie, u32 ie_len);
#define VHT_OP_CH_WIDTH_MAX 4
extern const char *const _vht_op_ch_width_str[];
#define vht_op_ch_width_str(ch_width) (((ch_width) >= VHT_OP_CH_WIDTH_MAX) ? _vht_op_ch_width_str[VHT_OP_CH_WIDTH_MAX] : _vht_op_ch_width_str[(ch_width)])
void dump_vht_op_ie(void *sel, const u8 *ie, u32 ie_len);
#endif
struct vht_bf_cap {
u8 is_mu_bfer;
u8 su_sound_dim;
};
struct vht_priv {
u8 vht_option;
u8 ldpc_cap;
u8 stbc_cap;
u16 beamform_cap;
struct vht_bf_cap ap_bf_cap;
u8 sgi_80m;/* short GI */
u8 ampdu_len;
u8 vht_highest_rate;
u8 vht_mcs_map[2];
u8 op_present:1; /* vht_op is present */
u8 notify_present:1; /* vht_op_mode_notify is present */
u8 vht_cap[32];
u8 vht_op[VHT_OP_IE_LEN];
u8 vht_op_mode_notify;
};
#ifdef ROKU_PRIVATE
struct vht_priv_infra_ap {
/* Infra mode, only store for AP's info, not intersection of STA and AP*/
u8 ldpc_cap_infra_ap;
u8 stbc_cap_infra_ap;
u16 beamform_cap_infra_ap;
u8 vht_mcs_map_infra_ap[2];
u8 vht_mcs_map_tx_infra_ap[2];
u8 channel_width_infra_ap;
u8 number_of_streams_infra_ap;
};
#endif /* ROKU_PRIVATE */
u8 rtw_get_vht_highest_rate(u8 *pvht_mcs_map);
u16 rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate);
u64 rtw_vht_mcs_map_to_bitmap(u8 *mcs_map, u8 nss);
void rtw_vht_use_default_setting(_adapter *padapter);
u32 rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel);
u32 rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw);
u32 rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf);
void update_sta_vht_info_apmode(_adapter *padapter, void *psta);
void update_hw_vht_param(_adapter *padapter);
void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
#ifdef ROKU_PRIVATE
void VHT_caps_handler_infra_ap(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
#endif /* ROKU_PRIVATE */
void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, void *sta);
u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len);
void VHTOnAssocRsp(_adapter *padapter);
u8 rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map);
void rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map);
void rtw_vht_ies_attach(_adapter *padapter, WLAN_BSSID_EX *pcur_network);
void rtw_vht_ies_detach(_adapter *padapter, WLAN_BSSID_EX *pcur_network);
void rtw_check_for_vht20(_adapter *adapter, u8 *ies, int ies_len);
#endif /* _RTW_VHT_H_ */

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/******************************************************************************
*
* Copyright(c) 2016 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __INC_WAPI_H
#define __INC_WAPI_H
#define CONFIG_WAPI_SW_SMS4
#define WAPI_DEBUG
#define SMS4_MIC_LEN 16
#define WAPI_EXT_LEN 18
#define MAX_WAPI_IE_LEN 256
#define sMacHdrLng 24 /* octets in data header, no WEP */
#ifdef WAPI_DEBUG
/* WAPI trace debug */
extern u32 wapi_debug_component;
static inline void dump_buf(u8 *buf, u32 len)
{
u32 i;
printk("-----------------Len %d----------------\n", len);
for (i = 0; i < len; i++)
printk("%2.2x-", *(buf + i));
printk("\n");
}
#define WAPI_TRACE(component, x, args...) \
do { if (wapi_debug_component & (component)) \
printk(KERN_DEBUG "WAPI" ":" x "" , \
##args);\
} while (0);
#define WAPI_DATA(component, x, buf, len) \
do { if (wapi_debug_component & (component)) { \
printk("%s:\n", x);\
dump_buf((buf), (len)); } \
} while (0);
#define RT_ASSERT_RET(_Exp) \
if (!(_Exp)) { \
printk("RTWLAN: "); \
printk("Assertion failed! %s,%s, line=%d\n", \
#_Exp, __FUNCTION__, __LINE__); \
return; \
}
#define RT_ASSERT_RET_VALUE(_Exp, Ret) \
if (!(_Exp)) { \
printk("RTWLAN: "); \
printk("Assertion failed! %s,%s, line=%d\n", \
#_Exp, __FUNCTION__, __LINE__); \
return Ret; \
}
#else
#define RT_ASSERT_RET(_Exp) do {} while (0)
#define RT_ASSERT_RET_VALUE(_Exp, Ret) do {} while (0)
#define WAPI_TRACE(component, x, args...) do {} while (0)
#define WAPI_DATA(component, x, buf, len) do {} while (0)
#endif
enum WAPI_DEBUG {
WAPI_INIT = 1,
WAPI_API = 1 << 1,
WAPI_TX = 1 << 2,
WAPI_RX = 1 << 3,
WAPI_MLME = 1 << 4,
WAPI_IOCTL = 1 << 5,
WAPI_ERR = 1 << 31
};
#define WAPI_MAX_BKID_NUM 4
#define WAPI_MAX_STAINFO_NUM 4
#define WAPI_CAM_ENTRY_NUM 14 /* 28/2 = 14 */
typedef struct _RT_WAPI_BKID {
struct list_head list;
u8 bkid[16];
} RT_WAPI_BKID, *PRT_WAPI_BKID;
typedef struct _RT_WAPI_KEY {
u8 dataKey[16];
u8 micKey[16];
u8 keyId;
bool bSet;
bool bTxEnable;
} RT_WAPI_KEY, *PRT_WAPI_KEY;
typedef enum _RT_WAPI_PACKET_TYPE {
WAPI_NONE = 0,
WAPI_PREAUTHENTICATE = 1,
WAPI_STAKEY_REQUEST = 2,
WAPI_AUTHENTICATE_ACTIVE = 3,
WAPI_ACCESS_AUTHENTICATE_REQUEST = 4,
WAPI_ACCESS_AUTHENTICATE_RESPONSE = 5,
WAPI_CERTIFICATE_AUTHENTICATE_REQUEST = 6,
WAPI_CERTIFICATE_AUTHENTICATE_RESPONSE = 7,
WAPI_USK_REQUEST = 8,
WAPI_USK_RESPONSE = 9,
WAPI_USK_CONFIRM = 10,
WAPI_MSK_NOTIFICATION = 11,
WAPI_MSK_RESPONSE = 12
} RT_WAPI_PACKET_TYPE;
typedef struct _RT_WAPI_STA_INFO {
struct list_head list;
u8 PeerMacAddr[6];
RT_WAPI_KEY wapiUsk;
RT_WAPI_KEY wapiUskUpdate;
RT_WAPI_KEY wapiMsk;
RT_WAPI_KEY wapiMskUpdate;
u8 lastRxUnicastPN[16];
u8 lastTxUnicastPN[16];
u8 lastRxMulticastPN[16];
u8 lastRxUnicastPNBEQueue[16];
u8 lastRxUnicastPNBKQueue[16];
u8 lastRxUnicastPNVIQueue[16];
u8 lastRxUnicastPNVOQueue[16];
bool bSetkeyOk;
bool bAuthenticateInProgress;
bool bAuthenticatorInUpdata;
} RT_WAPI_STA_INFO, *PRT_WAPI_STA_INFO;
/* Added for HW wapi en/decryption */
typedef struct _RT_WAPI_CAM_ENTRY {
/* RT_LIST_ENTRY list; */
u8 IsUsed;
u8 entry_idx;/* for cam entry */
u8 keyidx; /* 0 or 1,new or old key */
u8 PeerMacAddr[6];
u8 type; /* should be 110,wapi */
} RT_WAPI_CAM_ENTRY, *PRT_WAPI_CAM_ENTRY;
typedef struct _RT_WAPI_T {
/* BKID */
RT_WAPI_BKID wapiBKID[WAPI_MAX_BKID_NUM];
struct list_head wapiBKIDIdleList;
struct list_head wapiBKIDStoreList;
/* Key for Tx Multicast/Broadcast */
RT_WAPI_KEY wapiTxMsk;
/* sec related */
u8 lastTxMulticastPN[16];
/* STA list */
RT_WAPI_STA_INFO wapiSta[WAPI_MAX_STAINFO_NUM];
struct list_head wapiSTAIdleList;
struct list_head wapiSTAUsedList;
/* */
bool bWapiEnable;
/* store WAPI IE */
u8 wapiIE[256];
u8 wapiIELength;
bool bWapiPSK;
/* last sequece number for wai packet */
u16 wapiSeqnumAndFragNum;
int extra_prefix_len;
int extra_postfix_len;
RT_WAPI_CAM_ENTRY wapiCamEntry[WAPI_CAM_ENTRY_NUM];
} RT_WAPI_T, *PRT_WAPI_T;
typedef struct _WLAN_HEADER_WAPI_EXTENSION {
u8 KeyIdx;
u8 Reserved;
u8 PN[16];
} WLAN_HEADER_WAPI_EXTENSION, *PWLAN_HEADER_WAPI_EXTENSION;
u32 WapiComparePN(u8 *PN1, u8 *PN2);
void rtw_wapi_init(_adapter *padapter);
void rtw_wapi_free(_adapter *padapter);
void rtw_wapi_disable_tx(_adapter *padapter);
u8 rtw_wapi_is_wai_packet(_adapter *padapter, u8 *pkt_data);
void rtw_wapi_update_info(_adapter *padapter, union recv_frame *precv_frame);
u8 rtw_wapi_check_for_drop(_adapter *padapter, union recv_frame *precv_frame, u8 *ehdr_ops);
void rtw_build_probe_resp_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib);
void rtw_build_beacon_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib);
void rtw_build_assoc_req_wapi_ie(_adapter *padapter, unsigned char *pframe, struct pkt_attrib *pattrib);
void rtw_wapi_on_assoc_ok(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE);
void rtw_wapi_return_one_sta_info(_adapter *padapter, u8 *MacAddr);
void rtw_wapi_return_all_sta_info(_adapter *padapter);
void rtw_wapi_clear_cam_entry(_adapter *padapter, u8 *pMacAddr);
void rtw_wapi_clear_all_cam_entry(_adapter *padapter);
void rtw_wapi_set_key(_adapter *padapter, RT_WAPI_KEY *pWapiKey, RT_WAPI_STA_INFO *pWapiSta, u8 bGroupKey, u8 bUseDefaultKey);
int rtw_wapi_create_event_send(_adapter *padapter, u8 EventId, u8 *MacAddr, u8 *Buff, u16 BufLen);
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe);
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe);
void rtw_wapi_get_iv(_adapter *padapter, u8 *pRA, u8 *IV);
u8 WapiIncreasePN(u8 *PN, u8 AddCount);
bool rtw_wapi_drop_for_key_absent(_adapter *padapter, u8 *pRA);
void rtw_wapi_set_set_encryption(_adapter *padapter, struct ieee_param *param);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __RTW_WNM_H_
#define __RTW_WNM_H_
#define RTW_RRM_NB_RPT_EN BIT(1)
#define RTW_MAX_NB_RPT_NUM 8
#define RTW_WNM_FEATURE_BTM_REQ_EN BIT(0)
#define rtw_roam_busy_scan(a, nb) \
(((a)->mlmepriv.LinkDetectInfo.bBusyTraffic == _TRUE) && \
(((a)->mlmepriv.ch_cnt) < ((nb)->nb_rpt_ch_list_num)))
#define rtw_wnm_btm_preference_cap(a) \
((a)->mlmepriv.nb_info.preference_en == _TRUE)
#define rtw_wnm_btm_roam_triggered(a) \
(((a)->mlmepriv.nb_info.preference_en == _TRUE) \
&& (rtw_ft_chk_flags((a), RTW_FT_BTM_ROAM)) \
)
#define rtw_wnm_btm_diff_bss(a) \
((rtw_wnm_btm_preference_cap(a)) && \
(is_zero_mac_addr((a)->mlmepriv.nb_info.roam_target_addr) == _FALSE) && \
(_rtw_memcmp((a)->mlmepriv.nb_info.roam_target_addr,\
(a)->mlmepriv.cur_network.network.MacAddress, ETH_ALEN) == _FALSE))
#define rtw_wnm_btm_roam_candidate(a, c) \
((rtw_wnm_btm_preference_cap(a)) && \
(is_zero_mac_addr((a)->mlmepriv.nb_info.roam_target_addr) == _FALSE) && \
(_rtw_memcmp((a)->mlmepriv.nb_info.roam_target_addr,\
(c)->network.MacAddress, ETH_ALEN)))
#define rtw_wnm_set_ext_cap_btm(_pEleStart, _val) \
SET_BITS_TO_LE_1BYTE(((u8 *)(_pEleStart))+2, 3, 1, _val)
#define wnm_btm_bss_term_inc(p) (*((u8 *)((p)+3)) & BSS_TERMINATION_INCLUDED)
#define wnm_btm_ess_disassoc_im(p) (*((u8 *)((p)+3)) & ESS_DISASSOC_IMMINENT)
#define wnm_btm_dialog_token(p) (*((u8 *)((p)+2)))
#define wnm_btm_req_mode(p) (*((u8 *)((p)+3)))
#define wnm_btm_disassoc_timer(p) (*((u16 *)((p)+4)))
#define wnm_btm_valid_interval(p) (*((u8 *)((p)+6)))
#define wnm_btm_term_duration_offset(p) ((p)+7)
#define wnm_btm_rsp_status(p) (*((u8 *)((p)+3)))
#define wnm_btm_rsp_term_delay(p) (*((u8 *)((p)+4)))
#define RTW_WLAN_ACTION_WNM_NB_RPT_ELEM 0x34
enum rtw_ieee80211_wnm_actioncode {
RTW_WLAN_ACTION_WNM_BTM_QUERY = 6,
RTW_WLAN_ACTION_WNM_BTM_REQ = 7,
RTW_WLAN_ACTION_WNM_BTM_RSP = 8,
RTW_WLAN_ACTION_WNM_NOTIF_REQ = 26,
RTW_WLAN_ACTION_WNM_NOTIF_RSP = 27,
};
/*IEEE Std 80211k Figure 7-95b Neighbor Report element format*/
struct nb_rpt_hdr {
u8 id; /*0x34: Neighbor Report Element ID*/
u8 len;
u8 bssid[ETH_ALEN];
u32 bss_info;
u8 reg_class;
u8 ch_num;
u8 phy_type;
};
/*IEEE Std 80211v, Figure 7-9 BSS Termination Duration subelement field format */
struct btm_term_duration {
u8 id;
u8 len;
u64 tsf; /* value of the TSF counter when BSS termination will occur in the future */
u16 duration; /* number of minutes for which the BSS is not present*/
};
/*IEEE Std 80211v, Figure 7-10 BSS Transition Management Request frame body format */
struct btm_req_hdr {
u8 dialog_token;
u8 req_mode;
/* number of TBTTs until the AP sends a Disassociation frame to this STA */
u16 disassoc_timer;
/* number of TBTTs until the BSS transition candidate list is no longer valid */
u8 validity_interval;
struct btm_term_duration term_duration;
};
struct btm_rsp_hdr {
u8 dialog_token;
u8 status;
/* the number of minutes that
the responding STA requests the BSS to delay termination */
u8 termination_delay;
u8 bssid[ETH_ALEN];
u8 *pcandidates;
u32 candidates_num;
};
struct btm_rpt_cache {
u8 dialog_token;
u8 req_mode;
u16 disassoc_timer;
u8 validity_interval;
struct btm_term_duration term_duration;
/* from BTM req */
u32 validity_time;
u32 disassoc_time;
systime req_stime;
};
/*IEEE Std 80211v, Table 7-43b Optional Subelement IDs for Neighbor Report*/
/* BSS Transition Candidate Preference */
#define WNM_BTM_CAND_PREF_SUBEID 0x03
/* BSS Termination Duration */
#define WNM_BTM_TERM_DUR_SUBEID 0x04
struct wnm_btm_cant {
struct nb_rpt_hdr nb_rpt;
u8 preference; /* BSS Transition Candidate Preference */
};
enum rtw_btm_req_mod {
PREFERRED_CANDIDATE_LIST_INCLUDED = BIT0,
ABRIDGED = BIT1,
DISASSOC_IMMINENT = BIT2,
BSS_TERMINATION_INCLUDED = BIT3,
ESS_DISASSOC_IMMINENT = BIT4,
};
struct roam_nb_info {
struct nb_rpt_hdr nb_rpt[RTW_MAX_NB_RPT_NUM];
struct rtw_ieee80211_channel nb_rpt_ch_list[RTW_MAX_NB_RPT_NUM];
struct btm_rpt_cache btm_cache;
bool nb_rpt_valid;
u8 nb_rpt_ch_list_num;
u8 preference_en;
u8 roam_target_addr[ETH_ALEN];
u32 last_nb_rpt_entries;
u8 nb_rpt_is_same;
s8 disassoc_waiting;
_timer roam_scan_timer;
_timer disassoc_chk_timer;
u32 features;
};
u8 rtw_wnm_btm_reassoc_req(_adapter *padapter);
void rtw_wnm_roam_scan_hdl(void *ctx);
void rtw_wnm_disassoc_chk_hdl(void *ctx);
u8 rtw_wnm_try_btm_roam_imnt(_adapter *padapter);
void rtw_wnm_process_btm_req(_adapter *padapter, u8* pframe, u32 frame_len);
void rtw_wnm_reset_btm_candidate(struct roam_nb_info *pnb);
void rtw_wnm_reset_btm_state(_adapter *padapter);
u32 rtw_wnm_btm_rsp_candidates_sz_get(
_adapter *padapter, u8* pframe, u32 frame_len);
void rtw_wnm_process_btm_rsp(_adapter *padapter,
u8* pframe, u32 frame_len, struct btm_rsp_hdr *prsp);
void rtw_wnm_issue_btm_req(_adapter *padapter,
u8 *pmac, struct btm_req_hdr *phdr, u8 *purl, u32 url_len,
u8 *pcandidates, u8 candidate_cnt);
void rtw_wnm_reset_btm_cache(_adapter *padapter);
void rtw_wnm_issue_action(_adapter *padapter, u8 action, u8 reason, u8 dialog);
void rtw_wnm_update_reassoc_req_ie(_adapter *padapter);
void rtw_roam_nb_info_init(_adapter *padapter);
u8 rtw_roam_nb_scan_list_set(_adapter *padapter,
struct sitesurvey_parm *pparm);
u32 rtw_wnm_btm_candidates_survey(_adapter *padapter,
u8* pframe, u32 elem_len, u8 is_preference);
#endif /* __RTW_WNM_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __SDIO_HAL_H__
#define __SDIO_HAL_H__
void sd_int_dpc(PADAPTER padapter);
u8 rtw_set_hal_ops(_adapter *padapter);
#ifdef CONFIG_RTL8188E
void rtl8188es_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8723B
void rtl8723bs_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8821A
void rtl8821as_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8192E
void rtl8192es_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8703B
void rtl8703bs_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8723D
void rtl8723ds_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8188F
void rtl8188fs_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8188GTV
void rtl8188gtvs_set_hal_ops(PADAPTER padapter);
#endif
#ifdef CONFIG_RTL8192F
void rtl8192fs_set_hal_ops(PADAPTER padapter);
#endif
#endif /* __SDIO_HAL_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __SDIO_OPS_H__
#define __SDIO_OPS_H__
/* Follow mac team suggestion, default I/O fail return value is 0xFF */
#define SDIO_ERR_VAL8 0xFF
#define SDIO_ERR_VAL16 0xFFFF
#define SDIO_ERR_VAL32 0xFFFFFFFF
#ifdef PLATFORM_LINUX
#include <sdio_ops_linux.h>
#endif
extern void sdio_set_intf_ops(_adapter *padapter, struct _io_ops *pops);
void dump_sdio_card_info(void *sel, struct dvobj_priv *dvobj);
u32 sdio_init(struct dvobj_priv *dvobj);
void sdio_deinit(struct dvobj_priv *dvobj);
int sdio_alloc_irq(struct dvobj_priv *dvobj);
void sdio_free_irq(struct dvobj_priv *dvobj);
u8 sdio_get_num_of_func(struct dvobj_priv *dvobj);
#if 0
extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
#endif
extern u8 SdioLocalCmd52Read1Byte(PADAPTER padapter, u32 addr);
extern void SdioLocalCmd52Write1Byte(PADAPTER padapter, u32 addr, u8 v);
extern s32 _sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 sdio_local_read(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 _sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
extern s32 sdio_local_write(PADAPTER padapter, u32 addr, u32 cnt, u8 *pbuf);
u32 _sdio_read32(PADAPTER padapter, u32 addr);
s32 _sdio_write32(PADAPTER padapter, u32 addr, u32 val);
extern void sd_int_hdl(PADAPTER padapter);
extern u8 CheckIPSStatus(PADAPTER padapter);
#ifdef CONFIG_RTL8188E
extern void InitInterrupt8188ESdio(PADAPTER padapter);
extern void EnableInterrupt8188ESdio(PADAPTER padapter);
extern void DisableInterrupt8188ESdio(PADAPTER padapter);
extern void UpdateInterruptMask8188ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR);
extern u8 HalQueryTxBufferStatus8189ESdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8189ESdio(PADAPTER padapter);
extern void ClearInterrupt8188ESdio(PADAPTER padapter);
#endif /* CONFIG_RTL8188E */
#ifdef CONFIG_RTL8821A
extern void InitInterrupt8821AS(PADAPTER padapter);
extern void EnableInterrupt8821AS(PADAPTER padapter);
extern void DisableInterrupt8821AS(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8821AS(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8821ASdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void ClearInterrupt8821AS(PADAPTER padapter);
#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */
#endif /* CONFIG_RTL8821A */
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
#if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) \
|| defined(CONFIG_RTL8723F)
u8 rtw_hal_enable_cpwm2(_adapter *adapter);
#endif
extern u8 RecvOnePkt(PADAPTER padapter);
#endif /* CONFIG_WOWLAN */
#ifdef CONFIG_RTL8723B
extern void InitInterrupt8723BSdio(PADAPTER padapter);
extern void InitSysInterrupt8723BSdio(PADAPTER padapter);
extern void EnableInterrupt8723BSdio(PADAPTER padapter);
extern void DisableInterrupt8723BSdio(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8723BSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8723BSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm28723BSdio(PADAPTER padapter);
extern void ClearInterrupt8723BSdio(PADAPTER padapter);
#endif /* CONFIG_WOWLAN */
#endif
#ifdef CONFIG_RTL8192E
extern void InitInterrupt8192ESdio(PADAPTER padapter);
extern void EnableInterrupt8192ESdio(PADAPTER padapter);
extern void DisableInterrupt8192ESdio(PADAPTER padapter);
extern void UpdateInterruptMask8192ESdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR);
extern u8 HalQueryTxBufferStatus8192ESdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8192ESdio(PADAPTER padapter);
extern void ClearInterrupt8192ESdio(PADAPTER padapter);
#endif /* CONFIG_RTL8192E */
#ifdef CONFIG_RTL8703B
extern void InitInterrupt8703BSdio(PADAPTER padapter);
extern void InitSysInterrupt8703BSdio(PADAPTER padapter);
extern void EnableInterrupt8703BSdio(PADAPTER padapter);
extern void DisableInterrupt8703BSdio(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8703BSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8703BSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm28703BSdio(PADAPTER padapter);
extern void ClearInterrupt8703BSdio(PADAPTER padapter);
#endif /* CONFIG_WOWLAN */
#endif
#ifdef CONFIG_RTL8723D
extern void InitInterrupt8723DSdio(PADAPTER padapter);
extern void InitSysInterrupt8723DSdio(PADAPTER padapter);
extern void EnableInterrupt8723DSdio(PADAPTER padapter);
extern void DisableInterrupt8723DSdio(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8723DSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8723DSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm28723dSdio(PADAPTER padapter);
extern void ClearInterrupt8723DSdio(PADAPTER padapter);
#endif /* CONFIG_WOWLAN */
#endif
#ifdef CONFIG_RTL8192F
extern void InitInterrupt8192FSdio(PADAPTER padapter);
extern void InitSysInterrupt8192FSdio(PADAPTER padapter);
extern void EnableInterrupt8192FSdio(PADAPTER padapter);
extern void DisableInterrupt8192FSdio(PADAPTER padapter);
extern void UpdateInterruptMask8192FSdio(PADAPTER padapter, u32 AddMSR, u32 RemoveMSR);
extern u8 HalQueryTxBufferStatus8192FSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8192FSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm2192fSdio(PADAPTER padapter);
extern void ClearInterrupt8192FSdio(PADAPTER padapter);
#endif /* CONFIG_WOWLAN */
#endif
#ifdef CONFIG_RTL8188F
extern void InitInterrupt8188FSdio(PADAPTER padapter);
extern void InitSysInterrupt8188FSdio(PADAPTER padapter);
extern void EnableInterrupt8188FSdio(PADAPTER padapter);
extern void DisableInterrupt8188FSdio(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8188FSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8188FSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm28188FSdio(PADAPTER padapter);
extern void ClearInterrupt8188FSdio(PADAPTER padapter);
#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */
#endif
#ifdef CONFIG_RTL8188GTV
extern void InitInterrupt8188GTVSdio(PADAPTER padapter);
extern void InitSysInterrupt8188GTVSdio(PADAPTER padapter);
extern void EnableInterrupt8188GTVSdio(PADAPTER padapter);
extern void DisableInterrupt8188GTVSdio(PADAPTER padapter);
extern u8 HalQueryTxBufferStatus8188GTVSdio(PADAPTER padapter);
extern u8 HalQueryTxOQTBufferStatus8188GTVSdio(PADAPTER padapter);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
extern void DisableInterruptButCpwm28188GTVSdio(PADAPTER padapter);
extern void ClearInterrupt8188GTVSdio(PADAPTER padapter);
#endif /* defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) */
#endif
/**
* rtw_sdio_get_block_size() - Get block size of SDIO transfer
* @d struct dvobj_priv*
*
* The unit of return value is byte.
*/
static inline u32 rtw_sdio_get_block_size(struct dvobj_priv *d)
{
return d->intf_data.block_transfer_len;
}
/**
* rtw_sdio_cmd53_align_size() - Align size to one CMD53 could complete
* @d struct dvobj_priv*
* @len length to align
*
* Adjust len to align block size, and the new size could be transfered by one
* CMD53.
* If len < block size, it would keep original value, otherwise the value
* would be rounded up by block size.
*
* Return adjusted length.
*/
static inline size_t rtw_sdio_cmd53_align_size(struct dvobj_priv *d, size_t len)
{
u32 blk_sz;
blk_sz = rtw_sdio_get_block_size(d);
if (len <= blk_sz)
return len;
return _RND(len, blk_sz);
}
#endif /* !__SDIO_OPS_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _SDIO_OPS_WINCE_H_
#define _SDIO_OPS_WINCE_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef PLATFORM_OS_CE
extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8);
uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async);
extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8);
extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata);
extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata);
extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __SDIO_OPS_LINUX_H__
#define __SDIO_OPS_LINUX_H__
#ifndef RTW_HALMAC
u8 sd_f0_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
void sd_f0_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err);
s32 _sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata);
s32 _sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata);
s32 sd_cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata);
s32 sd_cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pdata);
u8 _sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
u8 sd_read8(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
u16 sd_read16(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
u32 _sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
u32 sd_read32(struct intf_hdl *pintfhdl, u32 addr, s32 *err);
void sd_write8(struct intf_hdl *pintfhdl, u32 addr, u8 v, s32 *err);
void sd_write16(struct intf_hdl *pintfhdl, u32 addr, u16 v, s32 *err);
void _sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err);
void sd_write32(struct intf_hdl *pintfhdl, u32 addr, u32 v, s32 *err);
#endif /* RTW_HALMAC */
bool rtw_is_sdio30(_adapter *adapter);
/* The unit of return value is Hz */
static inline u32 rtw_sdio_get_clock(struct dvobj_priv *d)
{
return d->intf_data.clock;
}
s32 _sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
s32 sd_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
s32 _sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
s32 sd_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, void *pdata);
void rtw_sdio_set_irq_thd(struct dvobj_priv *dvobj, _thread_hdl_ thd_hdl);
int __must_check rtw_sdio_raw_read(struct dvobj_priv *d, unsigned int addr,
void *buf, size_t len, bool fixed);
int __must_check rtw_sdio_raw_write(struct dvobj_priv *d, unsigned int addr,
void *buf, size_t len, bool fixed);
#endif /* __SDIO_OPS_LINUX_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _SDIO_OPS_XP_H_
#define _SDIO_OPS_XP_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#ifdef PLATFORM_OS_XP
extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8);
uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf, u8 async);
extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf);
extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr);
extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8);
extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata);
extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata);
extern void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __SDIO_OSINTF_H__
#define __SDIO_OSINTF_H__
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2019 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __STA_INFO_H_
#define __STA_INFO_H_
#include <cmn_info/rtw_sta_info.h>
#define IBSS_START_MAC_ID 2
#define NUM_STA MACID_NUM_SW_LIMIT
#ifndef CONFIG_RTW_MACADDR_ACL
#ifdef CONFIG_AP_MODE
#define CONFIG_RTW_MACADDR_ACL 1
#else
#define CONFIG_RTW_MACADDR_ACL 0
#endif
#endif
#ifndef CONFIG_RTW_PRE_LINK_STA
#define CONFIG_RTW_PRE_LINK_STA 0
#endif
#define NUM_ACL 16
#define RTW_ACL_PERIOD_DEV 0
#define RTW_ACL_PERIOD_BSS 1
#define RTW_ACL_PERIOD_NUM 2
#define RTW_ACL_MODE_DISABLED 0
#define RTW_ACL_MODE_ACCEPT_UNLESS_LISTED 1
#define RTW_ACL_MODE_DENY_UNLESS_LISTED 2
#define RTW_ACL_MODE_MAX 3
#if CONFIG_RTW_MACADDR_ACL
extern const char *const _acl_period_str[RTW_ACL_PERIOD_NUM];
#define acl_period_str(mode) (((mode) >= RTW_ACL_PERIOD_NUM) ? "INVALID" : _acl_period_str[(mode)])
extern const char *const _acl_mode_str[RTW_ACL_MODE_MAX];
#define acl_mode_str(mode) (((mode) >= RTW_ACL_MODE_MAX) ? "INVALID" : _acl_mode_str[(mode)])
#endif
#ifndef RTW_PRE_LINK_STA_NUM
#define RTW_PRE_LINK_STA_NUM 8
#endif
struct pre_link_sta_node_t {
u8 valid;
u8 addr[ETH_ALEN];
};
struct pre_link_sta_ctl_t {
_lock lock;
u8 num;
struct pre_link_sta_node_t node[RTW_PRE_LINK_STA_NUM];
};
#ifdef CONFIG_TDLS
#define MAX_ALLOWED_TDLS_STA_NUM 4
#endif
enum sta_info_update_type {
STA_INFO_UPDATE_NONE = 0,
STA_INFO_UPDATE_BW = BIT(0),
STA_INFO_UPDATE_RATE = BIT(1),
STA_INFO_UPDATE_PROTECTION_MODE = BIT(2),
STA_INFO_UPDATE_CAP = BIT(3),
STA_INFO_UPDATE_HT_CAP = BIT(4),
STA_INFO_UPDATE_VHT_CAP = BIT(5),
STA_INFO_UPDATE_ALL = STA_INFO_UPDATE_BW
| STA_INFO_UPDATE_RATE
| STA_INFO_UPDATE_PROTECTION_MODE
| STA_INFO_UPDATE_CAP
| STA_INFO_UPDATE_HT_CAP
| STA_INFO_UPDATE_VHT_CAP,
STA_INFO_UPDATE_MAX
};
struct rtw_wlan_acl_node {
_list list;
u8 addr[ETH_ALEN];
u8 valid;
};
struct wlan_acl_pool {
int mode;
int num;
struct rtw_wlan_acl_node aclnode[NUM_ACL];
_queue acl_node_q;
};
struct stainfo_stats {
systime last_rx_time;
u64 rx_mgnt_pkts;
u64 rx_beacon_pkts;
u64 rx_probereq_pkts;
u64 rx_probersp_pkts; /* unicast to self */
u64 rx_probersp_bm_pkts;
u64 rx_probersp_uo_pkts; /* unicast to others */
u64 rx_ctrl_pkts;
u64 rx_data_pkts;
u64 rx_data_bc_pkts;
u64 rx_data_mc_pkts;
u64 rx_data_qos_pkts[TID_NUM]; /* unicast only */
u64 last_rx_mgnt_pkts;
u64 last_rx_beacon_pkts;
u64 last_rx_probereq_pkts;
u64 last_rx_probersp_pkts; /* unicast to self */
u64 last_rx_probersp_bm_pkts;
u64 last_rx_probersp_uo_pkts; /* unicast to others */
u64 last_rx_ctrl_pkts;
u64 last_rx_data_pkts;
u64 last_rx_data_bc_pkts;
u64 last_rx_data_mc_pkts;
u64 last_rx_data_qos_pkts[TID_NUM]; /* unicast only */
#ifdef CONFIG_TDLS
u64 rx_tdls_disc_rsp_pkts;
u64 last_rx_tdls_disc_rsp_pkts;
#endif
u64 rx_bytes;
u64 rx_bc_bytes;
u64 rx_mc_bytes;
u64 last_rx_bytes;
u64 last_rx_bc_bytes;
u64 last_rx_mc_bytes;
u64 rx_drops; /* TBD */
u32 rx_tp_kbits;
u32 smooth_rx_tp_kbits;
u64 tx_pkts;
u64 last_tx_pkts;
u64 tx_bytes;
u64 last_tx_bytes;
u64 tx_drops; /* TBD */
u32 tx_tp_kbits;
u32 smooth_tx_tp_kbits;
#ifdef CONFIG_LPS_CHK_BY_TP
u64 acc_tx_bytes;
u64 acc_rx_bytes;
#endif
/* unicast only */
u64 last_rx_data_uc_pkts; /* For Read & Clear requirement in proc_get_rx_stat() */
u32 duplicate_cnt; /* Read & Clear, in proc_get_rx_stat() */
u32 rxratecnt[128]; /* Read & Clear, in proc_get_rx_stat() */
u32 tx_ok_cnt; /* Read & Clear, in proc_get_tx_stat() */
u32 tx_fail_cnt; /* Read & Clear, in proc_get_tx_stat() */
u32 tx_retry_cnt; /* Read & Clear, in proc_get_tx_stat() */
#ifdef CONFIG_RTW_MESH
u32 rx_hwmp_pkts;
u32 last_rx_hwmp_pkts;
#endif
};
#ifndef DBG_SESSION_TRACKER
#define DBG_SESSION_TRACKER 0
#endif
/* session tracker status */
#define ST_STATUS_NONE 0
#define ST_STATUS_CHECK BIT0
#define ST_STATUS_ESTABLISH BIT1
#define ST_STATUS_EXPIRE BIT2
#define ST_EXPIRE_MS (10 * 1000)
struct session_tracker {
_list list; /* session_tracker_queue */
u32 local_naddr;
u16 local_port;
u32 remote_naddr;
u16 remote_port;
systime set_time;
u8 status;
};
/* session tracker cmd */
#define ST_CMD_ADD 0
#define ST_CMD_DEL 1
#define ST_CMD_CHK 2
struct st_cmd_parm {
u8 cmd;
struct sta_info *sta;
u32 local_naddr; /* TODO: IPV6 */
u16 local_port;
u32 remote_naddr; /* TODO: IPV6 */
u16 remote_port;
};
typedef bool (*st_match_rule)(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
struct st_register {
u8 s_proto;
st_match_rule rule;
};
#define SESSION_TRACKER_REG_ID_WFD 0
#define SESSION_TRACKER_REG_ID_NUM 1
struct st_ctl_t {
struct st_register reg[SESSION_TRACKER_REG_ID_NUM];
_queue tracker_q;
};
void rtw_st_ctl_init(struct st_ctl_t *st_ctl);
void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl);
void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg);
void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id);
bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto);
bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port);
void rtw_st_ctl_rx(struct sta_info *sta, u8 *ehdr_pos);
void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl);
#ifdef CONFIG_TDLS
struct TDLS_PeerKey {
u8 kck[16]; /* TPK-KCK */
u8 tk[16]; /* TPK-TK; only CCMP will be used */
} ;
#endif /* CONFIG_TDLS */
#ifdef DBG_RX_DFRAME_RAW_DATA
struct sta_recv_dframe_info {
u8 sta_data_rate;
u8 sta_sgi;
u8 sta_bw_mode;
s8 sta_mimo_signal_strength[4];
s8 sta_RxPwr[4];
u8 sta_ofdm_snr[4];
};
#endif
#ifdef CONFIG_RTW_MESH
struct mesh_plink_ent;
struct rtw_ewma_err_rate {
unsigned long internal;
};
/* Mesh airtime link metrics parameters */
struct rtw_atlm_param {
struct rtw_ewma_err_rate err_rate; /* Now is PACKET error rate */
u16 data_rate; /* The unit is 100Kbps */
u16 total_pkt;
u16 overhead; /* Channel access overhead */
};
#endif
struct sta_info {
_lock lock;
_list list; /* free_sta_queue */
_list hash_list; /* sta_hash */
/* _list asoc_list; */ /* 20061114 */
/* _list sleep_list; */ /* sleep_q */
/* _list wakeup_list; */ /* wakeup_q */
_adapter *padapter;
struct cmn_sta_info cmn;
struct sta_xmit_priv sta_xmitpriv;
struct sta_recv_priv sta_recvpriv;
#ifdef DBG_RX_DFRAME_RAW_DATA
struct sta_recv_dframe_info sta_dframe_info;
struct sta_recv_dframe_info sta_dframe_info_bmc;
#endif
_queue sleep_q;
unsigned int sleepq_len;
#ifdef CONFIG_RTW_MGMT_QUEUE
_queue mgmt_sleep_q;
unsigned int mgmt_sleepq_len;
#endif
uint state;
uint qos_option;
u16 hwseq;
#ifdef CONFIG_RTW_80211K
u8 rm_en_cap[5];
u8 rm_diag_token;
#endif /* CONFIG_RTW_80211K */
systime resp_nonenc_eapol_key_starttime;
uint ieee8021x_blocked; /* 0: allowed, 1:blocked */
uint dot118021XPrivacy; /* aes, tkip... */
union Keytype dot11tkiptxmickey;
union Keytype dot11tkiprxmickey;
union Keytype dot118021x_UncstKey;
union pn48 dot11txpn; /* PN48 used for Unicast xmit */
union pn48 dot11rxpn; /* PN48 used for Unicast recv. */
ATOMIC_T keytrack;
#ifdef CONFIG_RTW_MESH
/* peer's GTK, RX only */
u8 group_privacy;
u8 gtk_bmp;
union Keytype gtk;
union pn48 gtk_pn;
#ifdef CONFIG_IEEE80211W
/* peer's IGTK, RX only */
enum security_type dot11wCipher;
u8 igtk_bmp;
u8 igtk_id;
union Keytype igtk;
union pn48 igtk_pn;
#endif /* CONFIG_IEEE80211W */
#endif /* CONFIG_RTW_MESH */
#ifdef CONFIG_GTK_OL
u8 kek[RTW_KEK_LEN];
u8 kck[RTW_KCK_LEN];
u8 replay_ctr[RTW_REPLAY_CTR_LEN];
#endif /* CONFIG_GTK_OL */
#ifdef CONFIG_IEEE80211W
_timer dot11w_expire_timer;
#endif /* CONFIG_IEEE80211W */
u8 bssrateset[16];
u32 bssratelen;
u8 cts2self;
u8 rtsen;
u8 init_rate;
u8 wireless_mode; /* NETWORK_TYPE */
struct stainfo_stats sta_stats;
#ifdef CONFIG_TDLS
u32 tdls_sta_state;
u8 SNonce[32];
u8 ANonce[32];
u32 TDLS_PeerKey_Lifetime;
u32 TPK_count;
_timer TPK_timer;
struct TDLS_PeerKey tpk;
#ifdef CONFIG_TDLS_CH_SW
u16 ch_switch_time;
u16 ch_switch_timeout;
/* u8 option; */
_timer ch_sw_timer;
_timer delay_timer;
_timer stay_on_base_chnl_timer;
_timer ch_sw_monitor_timer;
#endif
_timer handshake_timer;
u8 alive_count;
_timer pti_timer;
u8 TDLS_RSNIE[20]; /* Save peer's RSNIE, used for sending TDLS_SETUP_RSP */
#endif /* CONFIG_TDLS */
/* for A-MPDU TX, ADDBA timeout check */
_timer addba_retry_timer;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl recvreorder_ctrl[TID_NUM];
ATOMIC_T continual_no_rx_packet[TID_NUM];
/* for A-MPDU Tx */
/* unsigned char ampdu_txen_bitmap; */
u16 BA_starting_seqctrl[16];
#ifdef CONFIG_80211N_HT
struct ht_priv htpriv;
#endif
#ifdef CONFIG_80211AC_VHT
struct vht_priv vhtpriv;
#endif
/* Notes: */
/* STA_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO */
/* scan_q: AP CAP/INFO */
/* AP_Mode: */
/* curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO */
/* sta_info: (AP & STA) CAP/INFO */
unsigned int expire_to;
int flags;
u8 bpairwise_key_installed;
#ifdef CONFIG_AP_MODE
_list asoc_list;
_list auth_list;
unsigned int auth_seq;
unsigned int authalg;
unsigned char chg_txt[128];
u16 capability;
int dot8021xalg;/* 0:disable, 1:psk, 2:802.1x */
int wpa_psk;/* 0:disable, bit(0): WPA, bit(1):WPA2 */
int wpa_group_cipher;
int wpa2_group_cipher;
int wpa_pairwise_cipher;
int wpa2_pairwise_cipher;
u32 akm_suite_type;
#ifdef CONFIG_RTW_80211R
u8 ft_pairwise_key_installed;
#endif
#ifdef CONFIG_NATIVEAP_MLME
u8 wpa_ie[32];
u8 nonerp_set;
u8 no_short_slot_time_set;
u8 no_short_preamble_set;
u8 no_ht_gf_set;
u8 no_ht_set;
u8 ht_20mhz_set;
u8 ht_40mhz_intolerant;
#endif /* CONFIG_NATIVEAP_MLME */
#ifdef CONFIG_ATMEL_RC_PATCH
u8 flag_atmel_rc;
#endif
u8 qos_info;
u8 max_sp_len;
u8 uapsd_bk;/* BIT(0): Delivery enabled, BIT(1): Trigger enabled */
u8 uapsd_be;
u8 uapsd_vi;
u8 uapsd_vo;
u8 has_legacy_ac;
unsigned int sleepq_ac_len;
#ifdef CONFIG_P2P
/* p2p priv data */
u8 is_p2p_device;
u8 p2p_status_code;
/* p2p client info */
u8 dev_addr[ETH_ALEN];
/* u8 iface_addr[ETH_ALEN]; */ /* = hwaddr[ETH_ALEN] */
u8 dev_cap;
u16 config_methods;
u8 primary_dev_type[8];
u8 num_of_secdev_type;
u8 secdev_types_list[32];/* 32/8 == 4; */
u16 dev_name_len;
u8 dev_name[32];
#endif /* CONFIG_P2P */
#ifdef CONFIG_WFD
u8 op_wfd_mode;
#endif
#if !defined(CONFIG_ACTIVE_KEEP_ALIVE_CHECK) && defined(CONFIG_80211N_HT)
u8 under_exist_checking;
#endif
u8 keep_alive_trycnt;
#ifdef CONFIG_AUTO_AP_MODE
u8 isrc; /* this device is rc */
u16 pid; /* pairing id */
#endif
#endif /* CONFIG_AP_MODE */
#ifdef CONFIG_RTW_MESH
struct mesh_plink_ent *plink;
u8 local_mps;
u8 peer_mps;
u8 nonpeer_mps;
struct rtw_atlm_param metrics;
/* The reference for nexthop_lookup */
BOOLEAN alive;
#endif
#ifdef CONFIG_IOCTL_CFG80211
u8 *pauth_frame;
u32 auth_len;
u8 *passoc_req;
u32 assoc_req_len;
#endif
u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
#ifdef CONFIG_LPS_PG
u8 lps_pg_rssi_lv;
#endif
/* To store the sequence number of received management frame */
u16 RxMgmtFrameSeqNum;
struct st_ctl_t st_ctl;
u8 max_agg_num_minimal_record; /*keep minimal tx desc max_agg_num setting*/
u8 curr_rx_rate;
u8 curr_rx_rate_bmc;
#ifdef CONFIG_RTS_FULL_BW
bool vendor_8812;
#endif
#ifdef CONFIG_RTW_TOKEN_BASED_XMIT
u8 tbtx_enable; /* Does this sta_info support & enable TBTX function? */
// u8 tbtx_timeslot; /* This sta_info belong to which time slot. */
#endif
/*
* Vaiables for queuing TX pkt a short period of time
* to wait something ready.
*/
u8 tx_q_enable;
struct __queue tx_queue;
_workitem tx_q_work;
};
#ifdef CONFIG_RTW_MESH
#define STA_SET_MESH_PLINK(sta, link) (sta)->plink = link
#else
#define STA_SET_MESH_PLINK(sta, link) do {} while (0)
#endif
#define sta_tx_pkts(sta) \
(sta->sta_stats.tx_pkts)
#define sta_last_tx_pkts(sta) \
(sta->sta_stats.last_tx_pkts)
#define sta_rx_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts \
+ sta->sta_stats.rx_ctrl_pkts \
+ sta->sta_stats.rx_data_pkts)
#define sta_last_rx_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts \
+ sta->sta_stats.last_rx_ctrl_pkts \
+ sta->sta_stats.last_rx_data_pkts)
#define sta_rx_data_pkts(sta) (sta->sta_stats.rx_data_pkts)
#define sta_last_rx_data_pkts(sta) (sta->sta_stats.last_rx_data_pkts)
#define sta_rx_data_uc_pkts(sta) (sta->sta_stats.rx_data_pkts - sta->sta_stats.rx_data_bc_pkts - sta->sta_stats.rx_data_mc_pkts)
#define sta_last_rx_data_uc_pkts(sta) (sta->sta_stats.last_rx_data_pkts - sta->sta_stats.last_rx_data_bc_pkts - sta->sta_stats.last_rx_data_mc_pkts)
#define sta_rx_data_qos_pkts(sta, i) \
(sta->sta_stats.rx_data_qos_pkts[i])
#define sta_last_rx_data_qos_pkts(sta, i) \
(sta->sta_stats.last_rx_data_qos_pkts[i])
#define sta_rx_mgnt_pkts(sta) \
(sta->sta_stats.rx_mgnt_pkts)
#define sta_last_rx_mgnt_pkts(sta) \
(sta->sta_stats.last_rx_mgnt_pkts)
#define sta_rx_beacon_pkts(sta) \
(sta->sta_stats.rx_beacon_pkts)
#define sta_last_rx_beacon_pkts(sta) \
(sta->sta_stats.last_rx_beacon_pkts)
#define sta_rx_probereq_pkts(sta) \
(sta->sta_stats.rx_probereq_pkts)
#define sta_last_rx_probereq_pkts(sta) \
(sta->sta_stats.last_rx_probereq_pkts)
#define sta_rx_probersp_pkts(sta) \
(sta->sta_stats.rx_probersp_pkts)
#define sta_last_rx_probersp_pkts(sta) \
(sta->sta_stats.last_rx_probersp_pkts)
#define sta_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.rx_probersp_bm_pkts)
#define sta_last_rx_probersp_bm_pkts(sta) \
(sta->sta_stats.last_rx_probersp_bm_pkts)
#define sta_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.rx_probersp_uo_pkts)
#define sta_last_rx_probersp_uo_pkts(sta) \
(sta->sta_stats.last_rx_probersp_uo_pkts)
#ifdef CONFIG_RTW_MESH
#define update_last_rx_hwmp_pkts(sta) \
do { \
sta->sta_stats.last_rx_hwmp_pkts = sta->sta_stats.rx_hwmp_pkts; \
} while(0)
#else
#define update_last_rx_hwmp_pkts(sta) do {} while(0)
#endif
#define sta_update_last_rx_pkts(sta) \
do { \
int __i; \
\
sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \
sta->sta_stats.last_rx_beacon_pkts = sta->sta_stats.rx_beacon_pkts; \
sta->sta_stats.last_rx_probereq_pkts = sta->sta_stats.rx_probereq_pkts; \
sta->sta_stats.last_rx_probersp_pkts = sta->sta_stats.rx_probersp_pkts; \
sta->sta_stats.last_rx_probersp_bm_pkts = sta->sta_stats.rx_probersp_bm_pkts; \
sta->sta_stats.last_rx_probersp_uo_pkts = sta->sta_stats.rx_probersp_uo_pkts; \
sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \
update_last_rx_hwmp_pkts(sta); \
\
sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \
sta->sta_stats.last_rx_data_bc_pkts = sta->sta_stats.rx_data_bc_pkts; \
sta->sta_stats.last_rx_data_mc_pkts = sta->sta_stats.rx_data_mc_pkts; \
for (__i = 0; __i < TID_NUM; __i++) \
sta->sta_stats.last_rx_data_qos_pkts[__i] = sta->sta_stats.rx_data_qos_pkts[__i]; \
} while (0)
#define STA_RX_PKTS_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts
#define STA_LAST_RX_PKTS_ARG(sta) \
sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.last_rx_data_pkts
#define STA_RX_PKTS_DIFF_ARG(sta) \
sta->sta_stats.rx_mgnt_pkts - sta->sta_stats.last_rx_mgnt_pkts \
, sta->sta_stats.rx_ctrl_pkts - sta->sta_stats.last_rx_ctrl_pkts \
, sta->sta_stats.rx_data_pkts - sta->sta_stats.last_rx_data_pkts
#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)"
#define sta_rx_uc_bytes(sta) (sta->sta_stats.rx_bytes - sta->sta_stats.rx_bc_bytes - sta->sta_stats.rx_mc_bytes)
#define sta_last_rx_uc_bytes(sta) (sta->sta_stats.last_rx_bytes - sta->sta_stats.last_rx_bc_bytes - sta->sta_stats.last_rx_mc_bytes)
#ifdef CONFIG_WFD
#define STA_OP_WFD_MODE(sta) (sta)->op_wfd_mode
#define STA_SET_OP_WFD_MODE(sta, mode) (sta)->op_wfd_mode = (mode)
#else
#define STA_OP_WFD_MODE(sta) 0
#define STA_SET_OP_WFD_MODE(sta, mode) do {} while (0)
#endif
#define AID_BMP_LEN(max_aid) ((max_aid + 1) / 8 + (((max_aid + 1) % 8) ? 1 : 0))
struct sta_priv {
u8 *pallocated_stainfo_buf;
u8 *pstainfo_buf;
_queue free_sta_queue;
_lock sta_hash_lock;
_list sta_hash[NUM_STA];
int asoc_sta_count;
_queue sleep_q;
_queue wakeup_q;
_adapter *padapter;
u32 adhoc_expire_to;
int rx_chk_limit;
#ifdef CONFIG_AP_MODE
_list asoc_list;
_list auth_list;
_lock asoc_list_lock;
_lock auth_list_lock;
u8 asoc_list_cnt;
u8 auth_list_cnt;
unsigned int auth_to; /* sec, time to expire in authenticating. */
unsigned int assoc_to; /* sec, time to expire before associating. */
unsigned int expire_to; /* sec , time to expire after associated. */
/*
* pointers to STA info; based on allocated AID or NULL if AID free
* AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1
*/
struct sta_info **sta_aid;
u16 max_aid;
u16 started_aid; /* started AID for allocation search */
bool rr_aid; /* round robin AID allocation, will modify started_aid */
u8 aid_bmp_len; /* in byte */
u8 *sta_dz_bitmap;
u8 *tim_bitmap;
u16 max_num_sta;
#if CONFIG_RTW_MACADDR_ACL
struct wlan_acl_pool acl_list[RTW_ACL_PERIOD_NUM];
#endif
#if CONFIG_RTW_PRE_LINK_STA
struct pre_link_sta_ctl_t pre_link_sta_ctl;
#endif
#ifdef CONFIG_RTW_TOKEN_BASED_XMIT
u8 tbtx_asoc_list_cnt;
struct sta_info *token_holder[NR_MAXSTA_INSLOT];
struct sta_info *last_token_holder;
ATOMIC_T nr_token_keeper;
#endif
#endif /* CONFIG_AP_MODE */
#ifdef CONFIG_ATMEL_RC_PATCH
u8 atmel_rc_pattern[6];
#endif
u8 c2h_sta_mac[ETH_ALEN];
u8 c2h_adapter_id;
struct submit_ctx *gotc2h;
};
__inline static u32 wifi_mac_hash(const u8 *mac)
{
u32 x;
x = mac[0];
x = (x << 2) ^ mac[1];
x = (x << 2) ^ mac[2];
x = (x << 2) ^ mac[3];
x = (x << 2) ^ mac[4];
x = (x << 2) ^ mac[5];
x ^= x >> 8;
x = x & (NUM_STA - 1);
return x;
}
extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv);
extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv);
#define stainfo_offset_valid(offset) (offset < NUM_STA && offset >= 0)
int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta);
struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset);
extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr);
extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta);
extern void rtw_free_all_stainfo(_adapter *padapter);
extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr);
extern u32 rtw_init_bcmc_stainfo(_adapter *padapter);
extern struct sta_info *rtw_get_bcmc_stainfo(_adapter *padapter);
#ifdef CONFIG_AP_MODE
u16 rtw_aid_alloc(_adapter *adapter, struct sta_info *sta);
void dump_aid_status(void *sel, _adapter *adapter);
#endif
#if CONFIG_RTW_MACADDR_ACL
extern u8 rtw_access_ctrl(_adapter *adapter, const u8 *mac_addr);
void dump_macaddr_acl(void *sel, _adapter *adapter);
#endif
bool rtw_is_pre_link_sta(struct sta_priv *stapriv, u8 *addr);
#if CONFIG_RTW_PRE_LINK_STA
struct sta_info *rtw_pre_link_sta_add(struct sta_priv *stapriv, u8 *hwaddr);
void rtw_pre_link_sta_del(struct sta_priv *stapriv, u8 *hwaddr);
void rtw_pre_link_sta_ctl_reset(struct sta_priv *stapriv);
void rtw_pre_link_sta_ctl_init(struct sta_priv *stapriv);
void rtw_pre_link_sta_ctl_deinit(struct sta_priv *stapriv);
void dump_pre_link_sta_ctl(void *sel, struct sta_priv *stapriv);
#endif /* CONFIG_RTW_PRE_LINK_STA */
#endif /* _STA_INFO_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __USB_HAL_H__
#define __USB_HAL_H__
int usb_init_recv_priv(_adapter *padapter, u16 ini_in_buf_sz);
void usb_free_recv_priv(_adapter *padapter, u16 ini_in_buf_sz);
#ifdef CONFIG_FW_C2H_REG
void usb_c2h_hisr_hdl(_adapter *adapter, u8 *buf);
#endif
u8 rtw_set_hal_ops(_adapter *padapter);
#ifdef CONFIG_RTL8188E
void rtl8188eu_set_hal_ops(_adapter *padapter);
#endif
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
void rtl8812au_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8192E
void rtl8192eu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8723B
void rtl8723bu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8814A
void rtl8814au_set_hal_ops(_adapter *padapter);
#endif /* CONFIG_RTL8814A */
#ifdef CONFIG_RTL8188F
void rtl8188fu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8188GTV
void rtl8188gtvu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8703B
void rtl8703bu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8723D
void rtl8723du_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8710B
void rtl8710bu_set_hal_ops(_adapter *padapter);
#endif
#ifdef CONFIG_RTL8192F
void rtl8192fu_set_hal_ops(_adapter *padapter);
#endif /* CONFIG_RTL8192F */
#endif /* __USB_HAL_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __USB_OPS_H_
#define __USB_OPS_H_
#define REALTEK_USB_VENQT_READ 0xC0
#define REALTEK_USB_VENQT_WRITE 0x40
#define REALTEK_USB_VENQT_CMD_REQ 0x05
#define REALTEK_USB_VENQT_CMD_IDX 0x00
#define REALTEK_USB_IN_INT_EP_IDX 1
enum {
VENDOR_WRITE = 0x00,
VENDOR_READ = 0x01,
};
#define ALIGNMENT_UNIT 16
#define MAX_VENDOR_REQ_CMD_SIZE 254 /* 8188cu SIE Support */
#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE + ALIGNMENT_UNIT)
#ifdef PLATFORM_LINUX
#include <usb_ops_linux.h>
#endif /* PLATFORM_LINUX */
#ifdef CONFIG_RTL8188E
void rtl8188eu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
void rtl8812au_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8812au(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#ifdef CONFIG_RTL8814A
void rtl8814au_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8814au(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif /* CONFIG_RTL8814 */
#ifdef CONFIG_RTL8192E
void rtl8192eu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8192eu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#ifdef CONFIG_RTL8188F
void rtl8188fu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8188fu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#ifdef CONFIG_RTL8188GTV
void rtl8188gtvu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8188gtvu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#ifdef CONFIG_RTL8723B
void rtl8723bu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8723bu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif
#endif
#ifdef CONFIG_RTL8703B
void rtl8703bu_set_hw_type(struct dvobj_priv *pdvobj);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8703bu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif /* CONFIG_SUPPORT_USB_INT */
#endif /* CONFIG_RTL8703B */
void usb_set_intf_ops(_adapter *padapter, struct _io_ops *pops);
#ifdef CONFIG_RTL8723D
void rtl8723du_set_hw_type(struct dvobj_priv *pdvobj);
void rtl8723du_set_intf_ops(struct _io_ops *pops);
void rtl8723du_recv_tasklet(void *priv);
void rtl8723du_xmit_tasklet(void *priv);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8723du(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif /* CONFIG_SUPPORT_USB_INT */
#endif /* CONFIG_RTL8723D */
#ifdef CONFIG_RTL8710B
void rtl8710bu_set_hw_type(struct dvobj_priv *pdvobj);
void rtl8710bu_set_intf_ops(struct _io_ops *pops);
void rtl8710bu_recv_tasklet(void *priv);
void rtl8710bu_xmit_tasklet(void *priv);
#ifdef CONFIG_SUPPORT_USB_INT
void interrupt_handler_8710bu(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif /* CONFIG_SUPPORT_USB_INT */
#endif /* CONFIG_RTL8710B */
#ifdef CONFIG_RTL8192F
void rtl8192fu_set_hw_type(struct dvobj_priv *pdvobj);
void rtl8192fu_xmit_tasklet(void *priv);
#ifdef CONFIG_SUPPORT_USB_INT
void rtl8192fu_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif /* CONFIG_SUPPORT_USB_INT */
#endif /* CONFIG_RTL8192F */
enum RTW_USB_SPEED {
RTW_USB_SPEED_UNKNOWN = 0,
RTW_USB_SPEED_1_1 = 1,
RTW_USB_SPEED_2 = 2,
RTW_USB_SPEED_3 = 3,
};
#define IS_FULL_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_1_1)
#define IS_HIGH_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_2)
#define IS_SUPER_SPEED_USB(Adapter) (adapter_to_dvobj(Adapter)->usb_speed == RTW_USB_SPEED_3)
#define USB_SUPER_SPEED_BULK_SIZE 1024 /* usb 3.0 */
#define USB_HIGH_SPEED_BULK_SIZE 512 /* usb 2.0 */
#define USB_FULL_SPEED_BULK_SIZE 64 /* usb 1.1 */
static inline u8 rtw_usb_bulk_size_boundary(_adapter *padapter, int buf_len)
{
u8 rst = _TRUE;
if (IS_SUPER_SPEED_USB(padapter))
rst = (0 == (buf_len) % USB_SUPER_SPEED_BULK_SIZE) ? _TRUE : _FALSE;
else if (IS_HIGH_SPEED_USB(padapter))
rst = (0 == (buf_len) % USB_HIGH_SPEED_BULK_SIZE) ? _TRUE : _FALSE;
else
rst = (0 == (buf_len) % USB_FULL_SPEED_BULK_SIZE) ? _TRUE : _FALSE;
return rst;
}
#endif /* __USB_OPS_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __USB_OPS_LINUX_H__
#define __USB_OPS_LINUX_H__
#define VENDOR_CMD_MAX_DATA_LEN 254
#define FW_START_ADDRESS 0x1000
#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10/* ms */
#define RTW_USB_CONTROL_MSG_TIMEOUT 500/* ms */
#define RECV_BULK_IN_ADDR 0x80/* assign by drv, not real address */
#define RECV_INT_IN_ADDR 0x81/* assign by drv, not real address */
#define INTERRUPT_MSG_FORMAT_LEN 60
#if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX)
/* vendor req retry should be in the situation when each vendor req is atomically submitted from others */
#define MAX_USBCTRL_VENDORREQ_TIMES 10
#else
#define MAX_USBCTRL_VENDORREQ_TIMES 1
#endif
#define RTW_USB_BULKOUT_TIMEOUT 5000/* ms */
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 18))
#define _usbctrl_vendorreq_async_callback(urb, regs) _usbctrl_vendorreq_async_callback(urb)
#define usb_bulkout_zero_complete(purb, regs) usb_bulkout_zero_complete(purb)
#define usb_write_mem_complete(purb, regs) usb_write_mem_complete(purb)
#define usb_write_port_complete(purb, regs) usb_write_port_complete(purb)
#define usb_read_port_complete(purb, regs) usb_read_port_complete(purb)
#define usb_read_interrupt_complete(purb, regs) usb_read_interrupt_complete(purb)
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 12))
#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \
usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms))
#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms))
#else
#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \
usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \
((timeout_ms) == 0) || ((timeout_ms) * HZ / 1000 > 0) ? ((timeout_ms) * HZ / 1000) : 1)
#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \
usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \
((timeout_ms) == 0) || ((timeout_ms) * HZ / 1000 > 0) ? ((timeout_ms) * HZ / 1000) : 1)
#endif
#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val);
#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */
unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr);
void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
void usb_read_port_cancel(struct intf_hdl *pintfhdl);
u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem);
void usb_write_port_cancel(struct intf_hdl *pintfhdl);
int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype);
#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request,
u16 value, u16 index, void *pdata, u16 len, u8 requesttype);
#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */
u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr);
u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr);
u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr);
int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem);
void usb_recv_tasklet(void *priv);
#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs);
u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __USB_OSINTF_H
#define __USB_OSINTF_H
#include <usb_vendor_req.h>
#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3)
u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void *data, u8 datalen, u8 isdirectionin);
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef _USB_VENDOR_REQUEST_H_
#define _USB_VENDOR_REQUEST_H_
/* 4 Set/Get Register related wIndex/Data */
#define RT_USB_RESET_MASK_OFF 0
#define RT_USB_RESET_MASK_ON 1
#define RT_USB_SLEEP_MASK_OFF 0
#define RT_USB_SLEEP_MASK_ON 1
#define RT_USB_LDO_ON 1
#define RT_USB_LDO_OFF 0
/* 4 Set/Get SYSCLK related wValue or Data */
#define RT_USB_SYSCLK_32KHZ 0
#define RT_USB_SYSCLK_40MHZ 1
#define RT_USB_SYSCLK_60MHZ 2
typedef enum _RT_USB_BREQUEST {
RT_USB_SET_REGISTER = 1,
RT_USB_SET_SYSCLK = 2,
RT_USB_GET_SYSCLK = 3,
RT_USB_GET_REGISTER = 4
} RT_USB_BREQUEST;
typedef enum _RT_USB_WVALUE {
RT_USB_RESET_MASK = 1,
RT_USB_SLEEP_MASK = 2,
RT_USB_USB_HRCPWM = 3,
RT_USB_LDO = 4,
RT_USB_BOOT_TYPE = 5
} RT_USB_WVALUE;
#if 0
BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, u8 wIndex, void *Data, u8 DataLength, BOOLEAN isDirectionIn);
BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 Index, void *Data);
BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, u16 Op, u16 FeatureSelector, u16 Index);
BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, short urbLength, u8 DescriptorType, u8 Index, u16 LanguageId, void *TransferBuffer, u32 TransferBufferLength);
#endif
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __WLAN_BSSDEF_H__
#define __WLAN_BSSDEF_H__
#define MAX_IE_SZ 768
#ifdef PLATFORM_LINUX
#define NDIS_802_11_LENGTH_SSID 32
#define NDIS_802_11_LENGTH_RATES 8
#define NDIS_802_11_LENGTH_RATES_EX 16
typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
typedef long NDIS_802_11_RSSI; /* in dBm */
typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */
typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */
typedef struct _NDIS_802_11_SSID {
u32 SsidLength;
u8 Ssid[32];
} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
/*
FW will only save the channel number in DSConfig.
ODI Handler will convert the channel number to freq. number.
*/
typedef struct _NDIS_802_11_CONFIGURATION {
u32 Length; /* Length of structure */
u32 BeaconPeriod; /* units are Kusec */
u32 ATIMWindow; /* units are Kusec */
u32 DSConfig; /* channel number */
} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
Ndis802_11IBSS,
Ndis802_11Infrastructure,
Ndis802_11AutoUnknown,
Ndis802_11InfrastructureMax, /* Not a real value, defined as upper bound */
Ndis802_11APMode,
Ndis802_11Monitor,
Ndis802_11_mesh,
} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
typedef struct _NDIS_802_11_FIXED_IEs {
u8 Timestamp[8];
u16 BeaconInterval;
u16 Capabilities;
} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs;
typedef struct _NDIS_802_11_VARIABLE_IEs {
u8 ElementID;
u8 Length;
u8 data[1];
} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
Ndis802_11AuthModeOpen,
Ndis802_11AuthModeShared,
Ndis802_11AuthModeAutoSwitch,
Ndis802_11AuthModeWPA,
Ndis802_11AuthModeWPAPSK,
Ndis802_11AuthModeWPANone,
Ndis802_11AuthModeWAPI,
Ndis802_11AuthModeMax /* Not a real mode, defined as upper bound */
} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
typedef enum _NDIS_802_11_WEP_STATUS {
Ndis802_11WEPEnabled,
Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
Ndis802_11WEPDisabled,
Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
Ndis802_11WEPKeyAbsent,
Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
Ndis802_11WEPNotSupported,
Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
Ndis802_11Encryption2Enabled,
Ndis802_11Encryption2KeyAbsent,
Ndis802_11Encryption3Enabled,
Ndis802_11Encryption3KeyAbsent,
Ndis802_11_EncrypteionWAPI
} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
typedef struct _NDIS_802_11_WEP {
u32 Length; /* Length of this structure */
u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */
u32 KeyLength; /* length of key in bytes */
u8 KeyMaterial[16];/* variable length depending on above field */
} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
#endif /* end of #ifdef PLATFORM_LINUX */
#ifdef PLATFORM_FREEBSD
#define NDIS_802_11_LENGTH_SSID 32
#define NDIS_802_11_LENGTH_RATES 8
#define NDIS_802_11_LENGTH_RATES_EX 16
typedef unsigned char NDIS_802_11_MAC_ADDRESS[ETH_ALEN];
typedef long NDIS_802_11_RSSI; /* in dBm */
typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; /* Set of 8 data rates */
typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; /* Set of 16 data rates */
typedef struct _NDIS_802_11_SSID {
u32 SsidLength;
u8 Ssid[32];
} NDIS_802_11_SSID, *PNDIS_802_11_SSID;
/*
FW will only save the channel number in DSConfig.
ODI Handler will convert the channel number to freq. number.
*/
typedef struct _NDIS_802_11_CONFIGURATION {
u32 Length; /* Length of structure */
u32 BeaconPeriod; /* units are Kusec */
u32 ATIMWindow; /* units are Kusec */
u32 DSConfig; /* channel number */
} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION;
typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE {
Ndis802_11IBSS,
Ndis802_11Infrastructure,
Ndis802_11AutoUnknown,
Ndis802_11InfrastructureMax, /* Not a real value, defined as upper bound */
Ndis802_11APMode
} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE;
typedef struct _NDIS_802_11_FIXED_IEs {
u8 Timestamp[8];
u16 BeaconInterval;
u16 Capabilities;
} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs;
typedef struct _NDIS_802_11_VARIABLE_IEs {
u8 ElementID;
u8 Length;
u8 data[1];
} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs;
typedef enum _NDIS_802_11_AUTHENTICATION_MODE {
Ndis802_11AuthModeOpen,
Ndis802_11AuthModeShared,
Ndis802_11AuthModeAutoSwitch,
Ndis802_11AuthModeWPA,
Ndis802_11AuthModeWPAPSK,
Ndis802_11AuthModeWPANone,
Ndis802_11AuthModeMax /* Not a real mode, defined as upper bound */
} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE;
typedef enum _NDIS_802_11_WEP_STATUS {
Ndis802_11WEPEnabled,
Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled,
Ndis802_11WEPDisabled,
Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled,
Ndis802_11WEPKeyAbsent,
Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent,
Ndis802_11WEPNotSupported,
Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported,
Ndis802_11Encryption2Enabled,
Ndis802_11Encryption2KeyAbsent,
Ndis802_11Encryption3Enabled,
Ndis802_11Encryption3KeyAbsent
} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS,
NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS;
typedef struct _NDIS_802_11_WEP {
u32 Length; /* Length of this structure */
u32 KeyIndex; /* 0 is the per-client key, 1-N are the global keys */
u32 KeyLength; /* length of key in bytes */
u8 KeyMaterial[16];/* variable length depending on above field */
} NDIS_802_11_WEP, *PNDIS_802_11_WEP;
#endif /* PLATFORM_FREEBSD */
#ifndef Ndis802_11APMode
#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1)
#endif
typedef struct _WLAN_PHY_INFO {
u8 SignalStrength;/* (in percentage) */
u8 SignalQuality;/* (in percentage) */
u8 Optimum_antenna; /* for Antenna diversity */
u8 is_cck_rate; /* 1:cck_rate */
s8 rx_snr[4];
#ifdef CONFIG_RTW_80211K
u32 free_cnt; /* freerun counter */
u8 rm_en_cap[5];
#endif
} WLAN_PHY_INFO, *PWLAN_PHY_INFO;
typedef struct _WLAN_BCN_INFO {
/* these infor get from rtw_get_encrypt_info when
* * translate scan to UI */
u8 encryp_protocol;/* ENCRYP_PROTOCOL_E: OPEN/WEP/WPA/WPA2/WAPI */
int group_cipher; /* WPA/WPA2 group cipher */
int pairwise_cipher;/* //WPA/WPA2/WEP pairwise cipher */
int is_8021x;
/* bwmode 20/40 and ch_offset UP/LOW */
unsigned short ht_cap_info;
unsigned char ht_info_infos_0;
} WLAN_BCN_INFO, *PWLAN_BCN_INFO;
enum bss_type {
BSS_TYPE_UNDEF,
BSS_TYPE_PROB_REQ = 1,
BSS_TYPE_BCN = 2,
BSS_TYPE_PROB_RSP = 3,
};
/* temporally add #pragma pack for structure alignment issue of
* WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz()
*/
typedef struct _WLAN_BSSID_EX {
u32 Length;
NDIS_802_11_MAC_ADDRESS MacAddress;
u8 Reserved[2];/* [0]: IS beacon frame , bss_type*/
NDIS_802_11_SSID Ssid;
NDIS_802_11_SSID mesh_id;
u32 Privacy;
NDIS_802_11_RSSI Rssi;/* (in dBM,raw data ,get from PHY) */
NDIS_802_11_CONFIGURATION Configuration;
NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
NDIS_802_11_RATES_EX SupportedRates;
WLAN_PHY_INFO PhyInfo;
u32 IELength;
u8 IEs[MAX_IE_SZ]; /* (timestamp, beacon interval, and capability information) */
#ifdef CONFIG_LAYER2_ROAMING
u64 tsf;
#endif
}
__attribute__((packed)) WLAN_BSSID_EX, *PWLAN_BSSID_EX;
#define BSS_EX_IES(bss_ex) ((bss_ex)->IEs)
#define BSS_EX_IES_LEN(bss_ex) ((bss_ex)->IELength)
#define BSS_EX_FIXED_IE_OFFSET(bss_ex) ((bss_ex)->Reserved[0] == BSS_TYPE_PROB_REQ ? 0 : 12)
#define BSS_EX_TLV_IES(bss_ex) (BSS_EX_IES((bss_ex)) + BSS_EX_FIXED_IE_OFFSET((bss_ex)))
#define BSS_EX_TLV_IES_LEN(bss_ex) (BSS_EX_IES_LEN((bss_ex)) - BSS_EX_FIXED_IE_OFFSET((bss_ex)))
__inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss)
{
return sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + bss->IELength;
}
struct beacon_keys {
u8 ssid[IW_ESSID_MAX_SIZE];
u32 ssid_len;
u8 ch;
u8 bw;
u8 offset;
u8 proto_cap; /* PROTO_CAP_XXX */
u8 rate_set[12];
u8 rate_num;
int encryp_protocol;
int pairwise_cipher;
int group_cipher;
u32 akm;
};
struct wlan_network {
_list list;
int network_type; /* refer to ieee80211.h for WIRELESS_11A/B/G */
int fixed; /* set to fixed when not to be removed as site-surveying */
systime last_scanned; /* timestamp for the network */
systime last_non_hidden_ssid_ap;
#ifdef CONFIG_RTW_MESH
#if CONFIG_RTW_MESH_ACNODE_PREVENT
systime acnode_stime;
systime acnode_notify_etime;
#endif
#endif
int aid; /* will only be valid when a BSS is joinned. */
int join_res;
struct beacon_keys bcn_keys;
bool bcn_keys_valid;
WLAN_BSSID_EX network; /* must be the last item */
};
enum VRTL_CARRIER_SENSE {
DISABLE_VCS,
ENABLE_VCS,
AUTO_VCS
};
enum VCS_TYPE {
NONE_VCS,
RTS_CTS,
CTS_TO_SELF
};
#define PWR_CAM 0
#define PWR_MINPS 1
#define PWR_MAXPS 2
#define PWR_UAPSD 3
#define PWR_VOIP 4
enum UAPSD_MAX_SP {
NO_LIMIT,
TWO_MSDU,
FOUR_MSDU,
SIX_MSDU
};
/* john */
#define NUM_PRE_AUTH_KEY 16
#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY
#endif /* #ifndef WLAN_BSSDEF_H_ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#ifndef __XMIT_OSDEP_H_
#define __XMIT_OSDEP_H_
struct pkt_file {
_pkt *pkt;
SIZE_T pkt_len; /* the remainder length of the open_file */
_buffer *cur_buffer;
u8 *buf_start;
u8 *cur_addr;
SIZE_T buf_len;
};
#ifdef PLATFORM_WINDOWS
#ifdef PLATFORM_OS_XP
#ifdef CONFIG_USB_HCI
#include <usb.h>
#include <usbdlib.h>
#include <usbioctl.h>
#endif
#endif
#ifdef CONFIG_GSPI_HCI
#define NR_XMITFRAME 64
#else
#define NR_XMITFRAME 128
#endif
#define ETH_ALEN 6
extern NDIS_STATUS rtw_xmit_entry(
_nic_hdl cnxt,
NDIS_PACKET *pkt,
u32 flags
);
#endif /* PLATFORM_WINDOWS */
#ifdef PLATFORM_FREEBSD
#define NR_XMITFRAME 256
extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev);
extern void rtw_xmit_entry_wrap(struct ifnet *pifp);
#endif /* PLATFORM_FREEBSD */
#ifdef PLATFORM_LINUX
#define NR_XMITFRAME 256
struct xmit_priv;
struct pkt_attrib;
struct sta_xmit_priv;
struct xmit_frame;
struct xmit_buf;
extern int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32))
extern netdev_tx_t rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev);
#else
extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev);
#endif
#endif /* PLATFORM_LINUX */
void rtw_os_xmit_schedule(_adapter *padapter);
int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 alloc_sz, u8 flag);
void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf, u32 free_sz, u8 flag);
extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib);
extern uint rtw_remainder_len(struct pkt_file *pfile);
extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile);
extern uint _rtw_pktfile_read(struct pkt_file *pfile, u8 *rmem, uint rlen);
extern sint rtw_endofpktfile(struct pkt_file *pfile);
extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt);
extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe);
void rtw_os_check_wakup_queue(_adapter *adapter, u16 os_qid);
bool rtw_os_check_stop_queue(_adapter *adapter, u16 os_qid);
void rtw_os_wake_queue_at_free_stainfo(_adapter *padapter, int *qcnt_freed);
void dump_os_queue(void *sel, _adapter *padapter);
#endif /* __XMIT_OSDEP_H_ */